1 /* FCE Ultra - NES/Famicom Emulator
3 * Copyright notice for this file:
4 * Copyright (C) 2002 Ben Parnell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 void FP_FASTAPASS(1) (*MapIRQHook)(int a);
40 //#define _PZ X.PZ // unused?
42 #define _count X.count
43 #define _tcount X.tcount
44 #define _IRQlow X.IRQlow
45 #define _jammed X.jammed
48 static INLINE uint8 RdMem(unsigned int A)
50 // notaz: try to avoid lookup of every address at least for ROM and RAM areas
51 // I've verified that if ARead[0xfff0] points to CartBR, it is always normal ROM read.
53 if ((A&0x8000)/* && ARead[0xfff0] == CartBR*/) {
54 return (_DB=Page[A>>11][A]);
57 #if 0 // enabling this causes 4fps slowdown. Why?
58 if ((A&0xe000) == 0) { // RAM area (always 0-0x1fff)
59 return (_DB=RAM[A&0x7FF]);
62 return((_DB=ARead[A](A)));
65 static INLINE void WrMem(unsigned int A, uint8 V)
67 if ((A&0xe000) == 0) { // RAM area (always 0-0x1fff)
74 static INLINE uint8 RdRAM(unsigned int A)
79 static INLINE void WrRAM(unsigned int A, uint8 V)
84 static INLINE void ADDCYC(int x)
91 void FASTAPASS(1) X6502_AddCycles_c(int x)
96 static INLINE void PUSH(uint8 V)
102 static INLINE uint8 POP(void)
105 return(RdRAM(0x100+_S));
109 static uint8 ZNTable[256] = {
110 Z_FLAG,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
111 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
112 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
113 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
114 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
115 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
116 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
117 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
118 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
119 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
120 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
121 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
122 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
123 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
124 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,
125 N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG,N_FLAG
128 /* Some of these operations will only make sense if you know what the flag
130 //#define X_ZN(zort) _P&=~(Z_FLAG|N_FLAG);_P|=ZNTable[zort]
131 //#define X_ZNT(zort) _P|=ZNTable[zort]
132 #define X_ZN(zort) _P&=~(Z_FLAG|N_FLAG);if(!zort) _P|=Z_FLAG;else _P|=zort&N_FLAG
133 #define X_ZNT(zort) if(!zort) _P|=Z_FLAG;else _P|=zort&N_FLAG
135 /* Care must be taken if you want to turn this into a macro. Use { and }. */
144 if((tmp^_PC)&0x100) \
148 #define LDA _A=x;X_ZN(_A)
149 #define LDX _X=x;X_ZN(_X)
150 #define LDY _Y=x;X_ZN(_Y)
152 /* All of the freaky arithmetic operations. */
153 #define AND _A&=x;X_ZN(_A)
154 //#define BIT _P&=~(Z_FLAG|V_FLAG|N_FLAG);_P|=ZNTable[x&_A]&Z_FLAG;_P|=x&(V_FLAG|N_FLAG)
155 #define BIT _P&=~(Z_FLAG|V_FLAG|N_FLAG);if(!(x&_A)) _P|=Z_FLAG;_P|=x&(V_FLAG|N_FLAG)
156 #define EOR _A^=x;X_ZN(_A)
157 #define ORA _A|=x;X_ZN(_A)
160 uint32 l=_A+x+(_P&1); \
161 _P&=~(Z_FLAG|C_FLAG|N_FLAG|V_FLAG); \
162 _P|=((((_A^x)&0x80)^0x80) & ((_A^l)&0x80))>>1; \
168 uint32 l=_A-x-((_P&1)^1); \
169 _P&=~(Z_FLAG|C_FLAG|N_FLAG|V_FLAG); \
170 _P|=((_A^l)&(_A^x)&0x80)>>1; \
171 _P|=((l>>8)&C_FLAG)^C_FLAG; \
176 #define CMPL(a1,a2) { \
180 _P|=((t>>8)&C_FLAG)^C_FLAG; \
183 /* Special undocumented operation. Very similar to CMP. */
185 uint32 t=(_A&_X)-x; \
188 _P|=((t>>8)&C_FLAG)^C_FLAG; \
192 #define CMP CMPL(_A,x)
193 #define CPX CMPL(_X,x)
194 #define CPY CMPL(_Y,x)
196 /* The following operations modify the byte being worked on. */
197 #define DEC x--;X_ZN(x)
198 #define INC x++;X_ZN(x)
200 #define ASL _P&=~C_FLAG;_P|=x>>7;x<<=1;X_ZN(x)
201 #define LSR _P&=~(C_FLAG|N_FLAG|Z_FLAG);_P|=x&1;x>>=1;X_ZNT(x)
203 /* For undocumented instructions, maybe for other things later... */
204 #define LSRA _P&=~(C_FLAG|N_FLAG|Z_FLAG);_P|=_A&1;_A>>=1;X_ZNT(_A)
210 _P&=~(Z_FLAG|N_FLAG|C_FLAG); \
218 _P&=~(Z_FLAG|N_FLAG|C_FLAG); \
223 /* Icky icky thing for some undocumented instructions. Can easily be
224 broken if names of local variables are changed.
228 #define GetAB(target) \
230 target=RdMem(_PC++); \
231 target|=RdMem(_PC++)<<8; \
234 /* Absolute Indexed(for reads) */
235 #define GetABIRD(target, i) \
241 if((target^tmp)&0x100) \
244 RdMem(target^0x100); \
249 /* Absolute Indexed(for writes and rmws) */
250 #define GetABIWR(target, i) \
257 RdMem((target&0x00FF)|(rt&0xFF00)); \
261 #define GetZP(target) \
263 target=RdMem(_PC++); \
266 /* Zero Page Indexed */
267 #define GetZPI(target,i) \
269 target=i+RdMem(_PC++); \
272 /* Indexed Indirect */
273 #define GetIX(target) \
278 target=RdRAM(tmp++); \
279 target|=RdRAM(tmp)<<8; \
282 /* Indirect Indexed(for reads) */
283 #define GetIYRD(target) \
292 if((target^rt)&0x100) \
295 RdMem(target^0x100); \
300 /* Indirect Indexed(for writes and rmws) */
301 #define GetIYWR(target) \
310 RdMem((target&0x00FF)|(rt&0xFF00)); \
313 /* Now come the macros to wrap up all of the above stuff addressing mode functions
314 and operation macros. Note that operation macros will always operate(redundant
315 redundant) on the variable "x".
318 #define RMW_A(op) {uint8 x=_A; op; _A=x; break; } /* Meh... */
319 #define RMW_AB(op) {unsigned int A; uint8 x; GetAB(A); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
320 #define RMW_ABI(reg,op) {unsigned int A; uint8 x; GetABIWR(A,reg); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
321 #define RMW_ABX(op) RMW_ABI(_X,op)
322 #define RMW_ABY(op) RMW_ABI(_Y,op)
323 #define RMW_IX(op) {unsigned int A; uint8 x; GetIX(A); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
324 #define RMW_IY(op) {unsigned int A; uint8 x; GetIYWR(A); x=RdMem(A); WrMem(A,x); op; WrMem(A,x); break; }
325 #define RMW_ZP(op) {uint8 A; uint8 x; GetZP(A); x=RdRAM(A); op; WrRAM(A,x); break; }
326 #define RMW_ZPX(op) {uint8 A; uint8 x; GetZPI(A,_X); x=RdRAM(A); op; WrRAM(A,x); break;}
328 #define LD_IM(op) {uint8 x; x=RdMem(_PC++); op; break;}
329 #define LD_ZP(op) {uint8 A; uint8 x; GetZP(A); x=RdRAM(A); op; break;}
330 #define LD_ZPX(op) {uint8 A; uint8 x; GetZPI(A,_X); x=RdRAM(A); op; break;}
331 #define LD_ZPY(op) {uint8 A; uint8 x; GetZPI(A,_Y); x=RdRAM(A); op; break;}
332 #define LD_AB(op) {unsigned int A; uint8 x; GetAB(A); x=RdMem(A); op; break; }
333 #define LD_ABI(reg,op) {unsigned int A; uint8 x; GetABIRD(A,reg); x=RdMem(A); op; break;}
334 #define LD_ABX(op) LD_ABI(_X,op)
335 #define LD_ABY(op) LD_ABI(_Y,op)
336 #define LD_IX(op) {unsigned int A; uint8 x; GetIX(A); x=RdMem(A); op; break;}
337 #define LD_IY(op) {unsigned int A; uint8 x; GetIYRD(A); x=RdMem(A); op; break;}
339 #define ST_ZP(r) {uint8 A; GetZP(A); WrRAM(A,r); break;}
340 #define ST_ZPX(r) {uint8 A; GetZPI(A,_X); WrRAM(A,r); break;}
341 #define ST_ZPY(r) {uint8 A; GetZPI(A,_Y); WrRAM(A,r); break;}
342 #define ST_AB(r) {unsigned int A; GetAB(A); WrMem(A,r); break;}
343 #define ST_ABI(reg,r) {unsigned int A; GetABIWR(A,reg); WrMem(A,r); break; }
344 #define ST_ABX(r) ST_ABI(_X,r)
345 #define ST_ABY(r) ST_ABI(_Y,r)
346 #define ST_IX(r) {unsigned int A; GetIX(A); WrMem(A,r); break; }
347 #define ST_IY(r) {unsigned int A; GetIYWR(A); WrMem(A,r); break; }
349 static uint8 CycTable[256] =
351 /*0x00*/ 7,6,2,8,3,3,5,5,3,2,2,2,4,4,6,6,
352 /*0x10*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
353 /*0x20*/ 6,6,2,8,3,3,5,5,4,2,2,2,4,4,6,6,
354 /*0x30*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
355 /*0x40*/ 6,6,2,8,3,3,5,5,3,2,2,2,3,4,6,6,
356 /*0x50*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
357 /*0x60*/ 6,6,2,8,3,3,5,5,4,2,2,2,5,4,6,6,
358 /*0x70*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
359 /*0x80*/ 2,6,2,6,3,3,3,3,2,2,2,2,4,4,4,4,
360 /*0x90*/ 2,6,2,6,4,4,4,4,2,5,2,5,5,5,5,5,
361 /*0xA0*/ 2,6,2,6,3,3,3,3,2,2,2,2,4,4,4,4,
362 /*0xB0*/ 2,5,2,5,4,4,4,4,2,4,2,4,4,4,4,4,
363 /*0xC0*/ 2,6,2,8,3,3,5,5,2,2,2,2,4,4,6,6,
364 /*0xD0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
365 /*0xE0*/ 2,6,3,8,3,3,5,5,2,2,2,2,4,4,6,6,
366 /*0xF0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
369 void FASTAPASS(1) X6502_IRQBegin_c(int w)
374 void FASTAPASS(1) X6502_IRQEnd_c(int w)
379 void TriggerIRQ_c(void) /* This function should probably be phased out. */
381 _IRQlow|=FCEU_IQTEMP;
384 void TriggerNMINSF_c(void)
389 PUSH((_P&~B_FLAG)|(U_FLAG));
393 void TriggerNMI_c(void)
398 static void TriggerNMIReal(void)
405 PUSH((_P&~B_FLAG)|(U_FLAG));
407 _PC|=RdMem(0xFFFB)<<8;
411 void TriggerIRQReal(void)
413 if(!(_PI&I_FLAG) && !_jammed)
418 PUSH((_P&~B_FLAG)|(U_FLAG));
421 _PC|=RdMem(0xFFFF)<<8;
425 void X6502_Reset_c(void)
428 _PC|=RdMem(0xFFFD)<<8;
429 if(FCEUGameInfo.type==GIT_NSF) _PC=0x3830;
434 void X6502_Power_c(void)
436 memset((void *)&X,0,sizeof(X));
444 void X6502_Run_c(void/*int32 cycles*/)
448 cycles*=15; // 15*4=60
450 cycles*=16; // 16*4=64
454 // if (_count <= 0) asdc++;
463 if(_IRQlow&FCEU_IQNMI)
468 _IRQlow&=~(FCEU_IQTEMP|FCEU_IQNMI);
469 if(_count<=0) {_PI=_P;return;} /* Should increase accuracy without a */
470 /* major speed hit. */
479 if(MapIRQHook) MapIRQHook(temp);
496 if((PSG[0x10]&0x80) && !(PSG[0x10]&0x40))
498 extern uint8 SIRQStat;
500 X6502_IRQBegin_c(FCEU_IQDPCM);
505 //printf("$%04x:$%02x\n",_PC,b1);
507 //printf("$%02x\n",b1);
514 #ifdef DEBUG_ASM_6502