#define FCEU_IQDPCM 0x10
#define FCEU_IQFCOUNT 0x20
#define FCEU_IQTEMP 0x80
+// from 0.98.15
+#define FCEU_IQEXT2 0x02
#if defined(DEBUG_ASM_6502)
#define TriggerIRQ TriggerIRQ_d
#define X6502_IRQBegin X6502_IRQBegin_d
#define X6502_IRQEnd X6502_IRQEnd_d
#define X6502_Rebase X6502_Rebase_d
+#define X6502_GetCycleCount() 0
#define X6502_C
#define X6502_A
#define X6502_D
#define X6502_IRQBegin X6502_IRQBegin_a
#define X6502_IRQEnd X6502_IRQEnd_a
#define X6502_Rebase X6502_Rebase_a
+#define X6502_GetCycleCount() ((int32)nes_registers[7]>>16)
#define X6502_A
#define X6502_Run(c) \
#define X6502_IRQBegin X6502_IRQBegin_c
#define X6502_IRQEnd X6502_IRQEnd_c
#define X6502_Rebase(...)
+#define X6502_GetCycleCount() X.count
#define X6502_C
#define X6502_Run(c) \