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support a few ARMv6 instructions
[cyclone68000.git]
/
OpLogic.cpp
diff --git
a/OpLogic.cpp
b/OpLogic.cpp
index
19ec569
..
012e35a
100644
(file)
--- a/
OpLogic.cpp
+++ b/
OpLogic.cpp
@@
-126,9
+126,9
@@
int OpBtstReg(int op)
if(size>=2) Cycles+=2;
\r
}
\r
\r
if(size>=2) Cycles+=2;
\r
}
\r
\r
- EaCalcRead
NoSE(-1,11,sea,0,0x0e00
);
\r
+ EaCalcRead
(-1,11,sea,0,0x0e00,earwt_msb_dont_care
);
\r
\r
\r
- EaCalcRead
NoSE((type>0)?8:-1,0,tea,size,0x003f
);
\r
+ EaCalcRead
((type>0)?8:-1,0,tea,size,0x003f,earwt_msb_dont_care
);
\r
\r
if (tea>=0x10)
\r
ot(" and r11,r11,#7 ;@ mem - do mod 8\n"); // size always 0
\r
\r
if (tea>=0x10)
\r
ot(" and r11,r11,#7 ;@ mem - do mod 8\n"); // size always 0
\r
@@
-147,7
+147,7
@@
int OpBtstReg(int op)
if (type==2) ot(" bic r1,r0,r1,lsl r11 ;@ Clear bit\n");
\r
if (type==3) ot(" orr r1,r0,r1,lsl r11 ;@ Set bit\n");
\r
ot("\n");
\r
if (type==2) ot(" bic r1,r0,r1,lsl r11 ;@ Clear bit\n");
\r
if (type==3) ot(" orr r1,r0,r1,lsl r11 ;@ Set bit\n");
\r
ot("\n");
\r
- EaWrite(8,1,tea,size,0x003f,
0,0
);
\r
+ EaWrite(8,1,tea,size,0x003f,
earwt_msb_dont_care
);
\r
}
\r
OpEnd(tea);
\r
\r
}
\r
OpEnd(tea);
\r
\r
@@
-181,7
+181,7
@@
int OpBtstImm(int op)
OpStart(op,sea,tea);
\r
\r
ot("\n");
\r
OpStart(op,sea,tea);
\r
\r
ot("\n");
\r
- EaCalcRead
NoSE(-1,0,sea,0,0
);
\r
+ EaCalcRead
(-1,0,sea,0,0,earwt_msb_dont_care
);
\r
ot(" mov r11,#1\n");
\r
ot(" bic r10,r10,#0x40000000 ;@ Blank Z flag\n");
\r
if (tea>=0x10)
\r
ot(" mov r11,#1\n");
\r
ot(" bic r10,r10,#0x40000000 ;@ Blank Z flag\n");
\r
if (tea>=0x10)
\r
@@
-197,7
+197,7
@@
int OpBtstImm(int op)
if(size>=2) Cycles+=2;
\r
}
\r
\r
if(size>=2) Cycles+=2;
\r
}
\r
\r
- EaCalcRead
NoSE((type>0)?8:-1,0,tea,size,0x003f
);
\r
+ EaCalcRead
((type>0)?8:-1,0,tea,size,0x003f,earwt_msb_dont_care
);
\r
ot(" tst r0,r11 ;@ Do arithmetic\n");
\r
ot(" orreq r10,r10,#0x40000000 ;@ Get Z flag\n");
\r
ot("\n");
\r
ot(" tst r0,r11 ;@ Do arithmetic\n");
\r
ot(" orreq r10,r10,#0x40000000 ;@ Get Z flag\n");
\r
ot("\n");
\r
@@
-208,7
+208,7
@@
int OpBtstImm(int op)
if (type==2) ot(" bic r1,r0,r11 ;@ Clear bit\n");
\r
if (type==3) ot(" orr r1,r0,r11 ;@ Set bit\n");
\r
ot("\n");
\r
if (type==2) ot(" bic r1,r0,r11 ;@ Clear bit\n");
\r
if (type==3) ot(" orr r1,r0,r11 ;@ Set bit\n");
\r
ot("\n");
\r
- EaWrite(8,
1,tea,size,0x003f,0,0
);
\r
+ EaWrite(8,
1,tea,size,0x003f,earwt_msb_dont_care
);
\r
#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES
\r
// this is a bit hacky (device handlers might modify cycles)
\r
if (tea==0x38||tea==0x39)
\r
#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES
\r
// this is a bit hacky (device handlers might modify cycles)
\r
if (tea==0x38||tea==0x39)
\r
@@
-241,9
+241,9
@@
int OpNeg(int op)
OpStart(op,ea); Cycles=size<2?4:6;
\r
if(ea >= 0x10) Cycles*=2;
\r
\r
OpStart(op,ea); Cycles=size<2?4:6;
\r
if(ea >= 0x10) Cycles*=2;
\r
\r
- EaCalc (11,0x003f,ea,size,
0,0
);
\r
+ EaCalc (11,0x003f,ea,size,
earwt_msb_dont_care
);
\r
\r
\r
- if (type!=1) EaRead (11,0,ea,size,0x003f,
0,0
); // Don't need to read for 'clr' (or do we, for a dummy read?)
\r
+ if (type!=1) EaRead (11,0,ea,size,0x003f,
earwt_msb_dont_care
); // Don't need to read for 'clr' (or do we, for a dummy read?)
\r
if (type==1) ot("\n");
\r
\r
if (type==0)
\r
if (type==1) ot("\n");
\r
\r
if (type==0)
\r
@@
-285,17
+285,16
@@
int OpNeg(int op)
ot(";@ Not:\n");
\r
if(size!=2) {
\r
ot(" mov r0,r0,asl #%i\n",size?16:24);
\r
ot(";@ Not:\n");
\r
if(size!=2) {
\r
ot(" mov r0,r0,asl #%i\n",size?16:24);
\r
- ot(" mvn r1,r0,asr #%i\n",size?16:24);
\r
+ ot(" mvn
s
r1,r0,asr #%i\n",size?16:24);
\r
}
\r
else
\r
}
\r
else
\r
- ot(" mvn r1,r0\n");
\r
- ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
- OpGetFlags(0,0);
\r
+ ot(" mvns r1,r0\n");
\r
+ OpGetFlagsNZ(1);
\r
ot("\n");
\r
}
\r
\r
if (type==1) eawrite_check_addrerr=1;
\r
ot("\n");
\r
}
\r
\r
if (type==1) eawrite_check_addrerr=1;
\r
- EaWrite(11,
1,ea,size,0x003f,0,0
);
\r
+ EaWrite(11,
1,ea,size,0x003f,earwt_msb_dont_care
);
\r
\r
OpEnd(ea);
\r
\r
\r
OpEnd(ea);
\r
\r
@@
-315,14
+314,13
@@
int OpSwap(int op)
\r
OpStart(op); Cycles=4;
\r
\r
\r
OpStart(op); Cycles=4;
\r
\r
- EaCalc (11,0x0007,ea,2,
1
);
\r
- EaRead (11, 0,ea,2,0x0007,
1
);
\r
+ EaCalc (11,0x0007,ea,2,
earwt_shifted_up
);
\r
+ EaRead (11, 0,ea,2,0x0007,
earwt_shifted_up
);
\r
\r
\r
- ot(" mov r1,r0,ror #16\n");
\r
- ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
- OpGetFlags(0,0);
\r
+ ot(" movs r1,r0,ror #16\n");
\r
+ OpGetFlagsNZ(1);
\r
\r
\r
- EaWrite(11, 1,8,2,0x0007,
1
);
\r
+ EaWrite(11, 1,8,2,0x0007,
earwt_shifted_up
);
\r
\r
OpEnd();
\r
\r
\r
OpEnd();
\r
\r
@@
-347,11
+345,10
@@
int OpTst(int op)
\r
OpStart(op,sea); Cycles=4;
\r
\r
\r
OpStart(op,sea); Cycles=4;
\r
\r
- EaCalc (
0,0x003f,sea,size,1
);
\r
- EaRead (
0, 0,sea,size,0x003f
,1);
\r
+ EaCalc (
0,0x003f,sea,size,earwt_shifted_up
);
\r
+ EaRead (
0, 0,sea,size,0x003f,earwt_shifted_up
,1);
\r
\r
\r
- ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
\r
- ot(" mrs r10,cpsr ;@ r10=flags\n");
\r
+ OpGetFlagsNZ(0);
\r
ot("\n");
\r
\r
OpEnd(sea);
\r
ot("\n");
\r
\r
OpEnd(sea);
\r
@@
-375,16
+372,15
@@
int OpExt(int op)
\r
OpStart(op); Cycles=4;
\r
\r
\r
OpStart(op); Cycles=4;
\r
\r
- EaCalc (11,0x0007,ea,size+1,
0,0
);
\r
- EaRead (11, 0,ea,size+1,0x0007,
0,0
);
\r
+ EaCalc (11,0x0007,ea,size+1,
earwt_msb_dont_care
);
\r
+ EaRead (11, 0,ea,size+1,0x0007,
earwt_msb_dont_care
);
\r
\r
\r
- ot(" mov r0,r0,asl #%d\n",shift);
\r
- ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
\r
- ot(" mrs r10,cpsr ;@ r10=flags\n");
\r
+ ot(" movs r0,r0,asl #%d\n",shift);
\r
+ OpGetFlagsNZ(0);
\r
ot(" mov r1,r0,asr #%d\n",shift);
\r
ot("\n");
\r
\r
ot(" mov r1,r0,asr #%d\n",shift);
\r
ot("\n");
\r
\r
- EaWrite(11, 1,ea,size+1,0x0007,
0,0
);
\r
+ EaWrite(11, 1,ea,size+1,0x0007,
earwt_msb_dont_care
);
\r
\r
OpEnd();
\r
return 0;
\r
\r
OpEnd();
\r
return 0;
\r
@@
-433,8
+429,8
@@
int OpSet(int op)
ot("\n");
\r
\r
eawrite_check_addrerr=1;
\r
ot("\n");
\r
\r
eawrite_check_addrerr=1;
\r
- EaCalc (0,0x003f, ea,size,
0,0
);
\r
- EaWrite(0, 1, ea,size,0x003f,
0,0
);
\r
+ EaCalc (0,0x003f, ea,size,
earwt_msb_dont_care
);
\r
+ EaWrite(0, 1, ea,size,0x003f,
earwt_msb_dont_care
);
\r
\r
opend_op_changes_cycles=changed_cycles;
\r
OpEnd(ea,0);
\r
\r
opend_op_changes_cycles=changed_cycles;
\r
OpEnd(ea,0);
\r
@@
-596,8
+592,8
@@
static int EmitAsr(int op,int type,int dir,int count,int size,int usereg)
ot(" b nozerox%.4x\n",op);
\r
ot("norotx_%.4x%s\n",op,ms?"":":");
\r
ot(" ldr r2,[r7,#0x4c]\n");
\r
ot(" b nozerox%.4x\n",op);
\r
ot("norotx_%.4x%s\n",op,ms?"":":");
\r
ot(" ldr r2,[r7,#0x4c]\n");
\r
- ot(" adds r0,r0,#0 ;@ Define
s NZ, clears CV
\n");
\r
- OpGetFlags
(0,
0);
\r
+ ot(" adds r0,r0,#0 ;@ Define
flags
\n");
\r
+ OpGetFlags
NZ(
0);
\r
ot(" and r2,r2,#0x20000000\n");
\r
ot(" orr r10,r10,r2 ;@ C = old_X\n");
\r
ot("nozerox%.4x%s\n",op,ms?"":":");
\r
ot(" and r2,r2,#0x20000000\n");
\r
ot(" orr r10,r10,r2 ;@ C = old_X\n");
\r
ot("nozerox%.4x%s\n",op,ms?"":":");
\r
@@
-682,12
+678,12
@@
int OpAsr(int op)
\r
OpStart(op,ea,0,count<0); Cycles=size<2?6:8;
\r
\r
\r
OpStart(op,ea,0,count<0); Cycles=size<2?6:8;
\r
\r
- EaCalc(11,0x0007, ea,size,
1
);
\r
- EaRead(11, 0, ea,size,0x0007,
1
);
\r
+ EaCalc(11,0x0007, ea,size,
earwt_shifted_up
);
\r
+ EaRead(11, 0, ea,size,0x0007,
earwt_shifted_up
);
\r
\r
EmitAsr(op,type,dir,count, size,usereg);
\r
\r
\r
EmitAsr(op,type,dir,count, size,usereg);
\r
\r
- EaWrite(11, 0, ea,size,0x0007,
1
);
\r
+ EaWrite(11, 0, ea,size,0x0007,
earwt_shifted_up
);
\r
\r
opend_op_changes_cycles = (count<0);
\r
OpEnd(ea,0);
\r
\r
opend_op_changes_cycles = (count<0);
\r
OpEnd(ea,0);
\r
@@
-714,12
+710,12
@@
int OpAsrEa(int op)
\r
OpStart(op,ea); Cycles=6; // EmitAsr() will add 2
\r
\r
\r
OpStart(op,ea); Cycles=6; // EmitAsr() will add 2
\r
\r
- EaCalc (11,0x003f,ea,size,
1
);
\r
- EaRead (11, 0,ea,size,0x003f,
1
);
\r
+ EaCalc (11,0x003f,ea,size,
earwt_shifted_up
);
\r
+ EaRead (11, 0,ea,size,0x003f,
earwt_shifted_up
);
\r
\r
EmitAsr(op,type,dir,1,size,0);
\r
\r
\r
EmitAsr(op,type,dir,1,size,0);
\r
\r
- EaWrite(11, 0,ea,size,0x003f,
1
);
\r
+ EaWrite(11, 0,ea,size,0x003f,
earwt_shifted_up
);
\r
\r
OpEnd(ea);
\r
return 0;
\r
\r
OpEnd(ea);
\r
return 0;
\r
@@
-745,11
+741,10
@@
int OpTas(int op, int gen_special)
Cycles=4;
\r
if(ea>=8) Cycles+=10;
\r
\r
Cycles=4;
\r
if(ea>=8) Cycles+=10;
\r
\r
- EaCalc (11,0x003f,ea,0,
1
);
\r
- EaRead (11, 1,ea,0,0x003f,1);
\r
+ EaCalc (11,0x003f,ea,0,
earwt_shifted_up
);
\r
+ EaRead (11, 1,ea,0,0x003f,
earwt_shifted_up,
1);
\r
\r
\r
- ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
- OpGetFlags(0,0);
\r
+ OpGetFlagsNZ(1);
\r
ot("\n");
\r
\r
#if CYCLONE_FOR_GENESIS
\r
ot("\n");
\r
\r
#if CYCLONE_FOR_GENESIS
\r
@@
-758,7
+753,7
@@
int OpTas(int op, int gen_special)
#endif
\r
ot(" orr r1,r1,#0x80000000 ;@ set bit7\n");
\r
\r
#endif
\r
ot(" orr r1,r1,#0x80000000 ;@ set bit7\n");
\r
\r
- EaWrite(11,
1,ea,0,0x003f,1
);
\r
+ EaWrite(11,
1,ea,0,0x003f,earwt_shifted_up
);
\r
#if CYCLONE_FOR_GENESIS
\r
}
\r
#endif
\r
#if CYCLONE_FOR_GENESIS
\r
}
\r
#endif
\r