+op83: @ SAX/AAX ($nn, X)
+ CYCLE_PRE 6
+ INDX_ADDR
+ and r0, REG_X, REG_A, lsr #24
+ WRITE_1
+ CYCLE_NEXT 6,1,0
+
+op87: @ SAX/AAX $nn
+ ZERO_ADDR
+ and r0, REG_X, REG_A, lsr #24
+ ZP_WRITE
+ CYCLE_NEXT 3
+
+op8B: @ ANE/XAA #$nn
+ orr REG_A, REG_A, #0xee000000
+ and REG_A, REG_A, REG_X, lsl #24
+ IMM_VALUE
+ OP_AND
+ CYCLE_NEXT 2
+
+op8F: @ SAX/AAX $nnnn
+ CYCLE_PRE 4
+ ABS_ADDR
+ and r0, REG_X, REG_A, lsr #24
+ WRITE_1
+ CYCLE_NEXT 4,1,0
+
+.macro AMY_MSB
+ sub r0, REG_ADDR, REG_Y
+ mov r0, r0, lsr #8
+ add r0, r0, #1
+.endm
+
+op93: @ SHA/AXA ($nn), Y
+ CYCLE_PRE 6
+ INDY_ADDR_W
+ AMY_MSB
+ and r0, r0, REG_X
+ and r0, r0, REG_A, lsr #24
+ WRITE_1
+ CYCLE_NEXT 6,1,0
+
+op97: @ SAX,AAX $nn, Y
+ ZEROY_ADDR
+ and r0, REG_X, REG_A, lsr #24
+ ZP_WRITE
+ CYCLE_NEXT 4
+
+op9B: @ SHS/XAS $nnnn, Y
+ and r0, REG_X, REG_A, lsr #24
+ bic REG_S, REG_S, #0xFF << 24
+ orr REG_S, REG_S, r0, lsl #24
+ ABSY_ADDR_W
+ AMY_MSB
+ and r0, r0, REG_S, lsr #24
+ WRITE_1
+ CYCLE_NEXT 5
+
+op9C: @ SHY/SYA $nnnn, X
+ CYCLE_PRE 5
+ ABSX_ADDR_W
+ sub r0, REG_ADDR, REG_X
+ mov r0, r0, lsr #8
+ add r0, r0, #1
+ and r0, r0, REG_Y
+ WRITE_1
+ CYCLE_NEXT 5,1,0
+
+op9E: @ SHX/SXA $nnnn, Y
+ ABSY_ADDR_W
+ AMY_MSB
+ and r0, r0, REG_X
+ WRITE_1
+ CYCLE_NEXT 5
+
+op9F: @ SHA/AXA $nnnn, Y
+ CYCLE_PRE 5
+ ABSY_ADDR_W
+ AMY_MSB
+ and r0, r0, REG_X
+ and r0, r0, REG_A, lsr #24
+ WRITE_1
+ CYCLE_NEXT 5,1,0
+
+opAB: @ LXA/ATX/OAL #$nn
+ IMM_VALUE
+ orr REG_A, REG_A, #0xee000000
+ OP_AND
+ mov REG_X, REG_A, lsr #24
+ CYCLE_NEXT 2
+
+opBB: @ LAS/LAR $nnnn,Y
+ CYCLE_PRE 4
+ ABSY_ADDR_W
+ READ_WRITE_1
+ READ_WRITE_2
+ b opBB_
+ READ_WRITE_3
+ READ_WRITE_4
+opBB_: and REG_X, r0, REG_S, lsr #24
+ bic REG_S, REG_S, #0xff<<24
+ orr REG_S, REG_S, REG_X, lsl #24
+ mov REG_A, REG_X, lsl #24
+ orr REG_NZ, REG_A, REG_A, lsr #24
+ CYCLE_NEXT 4,1,0
+
+