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Gradius fixed
[fceu.git]
/
ncpu.S
diff --git
a/ncpu.S
b/ncpu.S
index
2a7fafe
..
d649f9a
100644
(file)
--- a/
ncpu.S
+++ b/
ncpu.S
@@
-16,7
+16,8
@@
#define OTOFFS_NES_REGS (nes_registers - cpu_exec_table)
#define OTOFFS_PC_BASE (pc_base - cpu_exec_table)
#define OTOFFS_IRQ_HOOK (MapIRQHook - cpu_exec_table)
#define OTOFFS_NES_REGS (nes_registers - cpu_exec_table)
#define OTOFFS_PC_BASE (pc_base - cpu_exec_table)
#define OTOFFS_IRQ_HOOK (MapIRQHook - cpu_exec_table)
-#define OTOFFS_X (X - cpu_exec_table)
+#define OTOFFS_IRQH_CYC (MapIRQHookCyc - cpu_exec_table)
+#define OTOFFS_X (X_ - cpu_exec_table)
@ fceu
#define FCEU_IQNMI 0x08
@ fceu
#define FCEU_IQNMI 0x08
@@
-30,7
+31,12
@@
SECTION_TEXT
ALIGN
SECTION_TEXT
ALIGN
-
+/*
+bbbb:
+.ascii "rebase: %04x"
+.byte 0x0a,0
+.align 4
+*/
@@@
@@@ r0 = Address (unbased)
@@@
@@@ r0 = Address (unbased)
@@
-38,6
+44,12
@@
@@@
.macro REBASE_PC
@ FIXME: do something with mem not in Page[].
@@@
.macro REBASE_PC
@ FIXME: do something with mem not in Page[].
+@ stmfd sp!, {r0-r3,r12,lr}
+@ mov r1, r0
+@ ldr r0, =bbbb
+@ bl printf
+@ ldmfd sp!, {r0-r3,r12,lr}
+
cmp r0, #0x2000
ldrge r1, =Page
movge r2, r0, lsr #11
cmp r0, #0x2000
ldrge r1, =Page
movge r2, r0, lsr #11
@@
-61,14
+73,15
@@
@@@
@@@ ¤Ê¤ó¤«Ì¾Á°¤¬ÊѤÀ¤Ê(¤É¡¼¤Ç¤â¤¤¡¼¤±¤É¡¼
@@@
@@@
@@@ ¤Ê¤ó¤«Ì¾Á°¤¬ÊѤÀ¤Ê(¤É¡¼¤Ç¤â¤¤¡¼¤±¤É¡¼
@@@
-.macro CYCLE_NEXT n
+.macro CYCLE_NEXT n
, hook_check=1
@@DEBUG_INFO
subs REG_CYCLE, REG_CYCLE, #\n*48
ble cpu_exec_end
@@DEBUG_INFO
subs REG_CYCLE, REG_CYCLE, #\n*48
ble cpu_exec_end
+.if \hook_check
tst REG_P_REST, #1<<16
tst REG_P_REST, #1<<16
- movne r0, #\n
blne do_irq_hook
blne do_irq_hook
+.endif
ldrb r0, [REG_PC], #1
tst REG_P_REST, #0xff<<8
ldreq pc, [REG_OP_TABLE, r0, lsl #2]
ldrb r0, [REG_PC], #1
tst REG_P_REST, #0xff<<8
ldreq pc, [REG_OP_TABLE, r0, lsl #2]
@@
-2751,7
+2764,18
@@
do_int:
subne REG_ADDR, REG_ADDR, #NMI_VECTOR
READ_WORD
REBASE_PC
subne REG_ADDR, REG_ADDR, #NMI_VECTOR
READ_WORD
REBASE_PC
- CYCLE_NEXT 7
+@ CYCLE_NEXT 7
+
+ subs REG_CYCLE, REG_CYCLE, #7*48
+ ble cpu_exec_end
+ ldrb r0, [REG_PC], #1
+ tst REG_P_REST, #0xff<<8
+ ldreq pc, [REG_OP_TABLE, r0, lsl #2]
+
+ tst REG_P_REST, #P_REST_I_FLAG
+ ldrne pc, [REG_OP_TABLE, r0, lsl #2]
+ b do_int
+
@@@
@@@ ¥ê¥»¥Ã¥È¤Î½èÍý
@@@
@@@ ¥ê¥»¥Ã¥È¤Î½èÍý
@@
-2797,6
+2821,7
@@
reset_cpu:
@@@
read_rom_byte:
@@@
read_rom_byte:
+#ifndef DEBUG_ASM_6502
ldr r0, =CartBR
ldr r2, =ARead
mov r1, #0xff00
ldr r0, =CartBR
ldr r2, =ARead
mov r1, #0xff00
@@
-2809,6
+2834,7
@@
read_rom_byte:
ldr r2, [r2, r1, lsl #2]
ldrb r0, [r2, REG_ADDR]
bx lr
ldr r2, [r2, r1, lsl #2]
ldrb r0, [r2, REG_ADDR]
bx lr
+#endif
read_ppu_reg:
read_ppu_reg:
@@
-2822,10
+2848,19
@@
read_save_ram:
mov REG_PC, lr @ r7
mov REG_P_REST, r3 @ r8
mov REG_PC, lr @ r7
mov REG_P_REST, r3 @ r8
+#ifndef DEBUG_ASM_6502
ldr r2, =ARead
bic r0, REG_ADDR, #0x00ff0000
mov lr, pc
ldr pc, [r2, r0, lsl #2]
ldr r2, =ARead
bic r0, REG_ADDR, #0x00ff0000
mov lr, pc
ldr pc, [r2, r0, lsl #2]
+#else
+ ldr r2, =dread_count_a
+ ldr r0, =dreads
+ ldr r1, [r2]
+ ldrb r0, [r0, r1]
+ add r1, r1, #1
+ str r1, [r2]
+#endif
ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12
mov lr, REG_PC
ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12
mov lr, REG_PC
@@
-2841,6
+2876,7
@@
write_ppu_reg:
write_high_reg:
write_save_ram:
write_rom_byte:
write_high_reg:
write_save_ram:
write_rom_byte:
+#ifndef DEBUG_ASM_6502
@ must preserve r3 for the callers too
str REG_PC, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x0c)] @ might get rebased
str REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
@ must preserve r3 for the callers too
str REG_PC, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x0c)] @ might get rebased
str REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
@@
-2860,6
+2896,17
@@
write_rom_byte:
ldr REG_PC, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x0c)] @ might get rebased
ldr REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
ldr REG_CYCLE, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x1c)] @ might get used
ldr REG_PC, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x0c)] @ might get rebased
ldr REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
ldr REG_CYCLE, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x1c)] @ might get used
+#else
+ ldr r1, =dwrite_count_a
+ ldr r2, =dwrites_a
+ ldr r1, [r1]
+ and r0, r0, #0xff
+ orr r0, r0, REG_ADDR, lsl #8
+ str r0, [r2, r1, lsl #2]
+ ldr r2, =dwrite_count_a
+ add r1, r1, #1
+ str r1, [r2]
+#endif
bx lr
bx lr
@@
-2883,9
+2930,15
@@
cpu_exec:
@ ldr REG_OP_TABLE, = cpu_exec_table @ set on init
@ ldr REG_OP_TABLE, = cpu_exec_table @ set on init
- CYCLE_NEXT 0
+ tst REG_P_REST, #1<<16
+ strne REG_CYCLE, [REG_OP_TABLE, #OTOFFS_IRQH_CYC]
+
+ CYCLE_NEXT 0, 0
cpu_exec_end:
cpu_exec_end:
+ tst REG_P_REST, #1<<16
+ blne do_irq_hook
+
ldr r0, =nes_registers
stmia r0, {r4-r12}
ldr r0, =nes_registers
stmia r0, {r4-r12}
@@
-2958,9
+3011,7
@@
cpu_exec_table:
@@@
nes_registers:
.fill 0x40, 1, 0
@@@
nes_registers:
.fill 0x40, 1, 0
-#ifndef DEBUG_ASM_6502
RAM:
RAM:
-#endif
nes_internal_ram:
.fill 0x100, 1, 0
nes_stack:
nes_internal_ram:
.fill 0x100, 1, 0
nes_stack:
@@
-2968,13
+3019,16
@@
nes_stack:
@ TODO: write code which keeps it up-to-date
pc_base:
.long 0
@ TODO: write code which keeps it up-to-date
pc_base:
.long 0
-#ifndef DEBUG_ASM_6502
MapIRQHook:
.long 0
MapIRQHook:
.long 0
+MapIRQHookCyc:
+ .long 0
timestamp:
.long 0
timestamp:
.long 0
-X: .fill 0x20, 1, 0
+#ifndef DEBUG_ASM_6502
+X:
#endif
#endif
+X_: .fill 0x20, 1, 0
.pool
.pool
@@
-3085,11
+3139,13
@@
op9E: @ SHX $nnnn, Y
ALIGN
.globl nes_registers @ TODO: hide?
.globl pc_base
ALIGN
.globl nes_registers @ TODO: hide?
.globl pc_base
+ .globl MapIRQHook @ (int a)
#ifndef DEBUG_ASM_6502
.globl X
.globl RAM
.globl timestamp
#ifndef DEBUG_ASM_6502
.globl X
.globl RAM
.globl timestamp
- .globl MapIRQHook @ (int a)
+#else
+ .globl nes_internal_ram
#endif
.globl X6502_Reset_a @ (void);
.globl X6502_Power_a @ (void);
#endif
.globl X6502_Reset_a @ (void);
.globl X6502_Power_a @ (void);
@@
-3100,7
+3156,7
@@
op9E: @ SHX $nnnn, Y
.globl X6502_AddCycles_a @ (int x);
.globl X6502_IRQBegin_a @ (int w);
.globl X6502_IRQEnd_a @ (int w);
.globl X6502_AddCycles_a @ (int x);
.globl X6502_IRQBegin_a @ (int w);
.globl X6502_IRQEnd_a @ (int w);
- .globl X6502_
r
ebase_a @ (void);
+ .globl X6502_
R
ebase_a @ (void);
SECTION_TEXT
ALIGN
SECTION_TEXT
ALIGN
@@
-3166,7
+3222,7
@@
X6502_AddCycles_a:
@ rebase PC when not executing or in memhandlers
@ rebase PC when not executing or in memhandlers
-X6502_
r
ebase_a:
+X6502_
R
ebase_a:
stmfd sp!,{REG_PC,REG_OP_TABLE}
ldr REG_OP_TABLE, =cpu_exec_table
ldr r0, [REG_OP_TABLE, #(OTOFFS_NES_REGS+0x0c)] @ PC
stmfd sp!,{REG_PC,REG_OP_TABLE}
ldr REG_OP_TABLE, =cpu_exec_table
ldr r0, [REG_OP_TABLE, #(OTOFFS_NES_REGS+0x0c)] @ PC
@@
-3180,7
+3236,17
@@
X6502_rebase_a:
@ the nasty MapIRQHook thing from FCE..
@ the nasty MapIRQHook thing from FCE..
+@ test Gradius 2 (J) if you change this
do_irq_hook:
do_irq_hook:
+ @ ((cycles >> 4) * 43) >> 7; // aproximating /= 48
+ ldr r1, [REG_OP_TABLE, #OTOFFS_IRQH_CYC]
+ str REG_CYCLE, [REG_OP_TABLE, #OTOFFS_IRQH_CYC]
+ mov r0, #43
+ sub r1, r1, REG_CYCLE
+ mul r0, r1, r0
+ mov r0, r0, lsr #11
+
+#ifndef DEBUG_ASM_6502
@ I have reviewed all MapIRQHook functions, they only seem to cause IRQs, not messing cycles or something
str REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
mov REG_P_REST, lr @ r8
@ I have reviewed all MapIRQHook functions, they only seem to cause IRQs, not messing cycles or something
str REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
mov REG_P_REST, lr @ r8
@@
-3192,6
+3258,11
@@
do_irq_hook:
ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12
mov lr, REG_P_REST
ldr REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
ldr REG_OP_TABLE, =cpu_exec_table @ got trashed because was in r12
mov lr, REG_P_REST
ldr REG_P_REST, [REG_OP_TABLE, #(OTOFFS_NES_REGS + 0x10)] @ might set irq
+#else
+ ldr r1, =mapirq_cyc_a
+ str r0, [r1]
+ mov r1, r0
+#endif
bx lr
bx lr