--- /dev/null
+\r
+#include "app.h"\r
+\r
+static FILE *AsmFile=NULL;\r
+\r
+static int CycloneVer=0x0069; // Version number of library\r
+int *CyJump=NULL; // Jump table\r
+int ms=0; // If non-zero, output in Microsoft ARMASM format\r
+char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2\r
+char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
+int Cycles=0; // Current cycles for opcode\r
+int Amatch=1; // If one, try to match A68K timing\r
+int Accu=-1; // Accuracy\r
+int Debug=0; // Debug info\r
+\r
+void ot(char *format, ...)\r
+{\r
+ va_list valist=NULL;\r
+ va_start(valist,format);\r
+ if (AsmFile) vfprintf(AsmFile,format,valist);\r
+ va_end(valist);\r
+}\r
+\r
+void ltorg()\r
+{\r
+ if (ms) ot(" LTORG\n");\r
+ else ot(" .ltorg\n");\r
+}\r
+\r
+static void PrintException()\r
+{\r
+ ot(" ;@ Cause an Exception - Vector in [r7,#0x50]\n");\r
+ ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ OpPush32();\r
+ OpPushSr(1);\r
+ ot(" ldr r0,[r7,#0x50] ;@ Get Vector\n");\r
+ ot(";@ Read IRQ Vector:\n");\r
+ MemHandler(0,2);\r
+ ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");\r
+ ot(" mov lr,pc\n");\r
+ ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ ot(" mov r4,r0\n");\r
+ ot("\n");\r
+\r
+ // todo - make Interrupt code use this function as well\r
+}\r
+\r
+// Trashes r0\r
+void CheckInterrupt()\r
+{\r
+ ot(";@ CheckInterrupt:\n");\r
+ ot(" ldrb r0,[r7,#0x47] ;@ Get IRQ level\n");\r
+ ot(" tst r0,r0\n");\r
+ ot(" blne DoInterrupt\n");\r
+ ot("\n");\r
+}\r
+\r
+static void PrintFramework()\r
+{\r
+ ot(";@ --------------------------- Framework --------------------------\n");\r
+ if (ms) ot("CycloneRun\n");\r
+ else ot("CycloneRun:\n");\r
+\r
+ ot(" stmdb sp!,{r4-r11,lr}\n");\r
+\r
+ ot(" mov r7,r0 ;@ r7 = Pointer to Cpu Context\n");\r
+ ot(" ;@ r0-3 = Temporary registers\n");\r
+ ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");\r
+ ot(" ldr r6,=JumpTab ;@ r6 = Opcode Jump table\n");\r
+ ot(" ldr r5,[r7,#0x5c] ;@ r5 = Cycles\n");\r
+ ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
+ ot(" ;@ r8 = Current Opcode\n");\r
+ ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");\r
+ ot(" ;@ r10 = Source value / Memory Base\n");\r
+ ot("\n");\r
+ CheckInterrupt();\r
+ ot(";@ Check if interrupt used up all the cycles:\n");\r
+ ot(" subs r5,r5,#0\n");\r
+ ot(" blt CycloneEndNoBack\n");\r
+\r
+ OpFirst();\r
+ ltorg();\r
+ ot("\n");\r
+\r
+ ot(";@ We come back here after execution\n");\r
+ ot("CycloneEnd%s\n", ms?"":":");\r
+ ot(" sub r4,r4,#2\n");\r
+ ot("CycloneEndNoBack%s\n", ms?"":":");\r
+ ot(" mov r9,r9,lsr #28\n");\r
+ ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
+ ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
+ ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
+ ot(" ldmia sp!,{r4-r11,pc}\n");\r
+ ot("\n");\r
+\r
+ ot(";@ DoInterrupt - r0=IRQ number\n");\r
+ ot("DoInterrupt%s\n", ms?"":":");\r
+ ot("\n");\r
+ ot(" ldrb r1,[r7,#0x44] ;@ Get SR high: T_S__III\n");\r
+ ot(" and r1,r1,#7 ;@ Get interrupt mask\n");\r
+ ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
+ ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
+ ot(" movle pc,lr ;@ irq<=6 and mask, not allowed\n");\r
+ ot("\n");\r
+ ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" mov r11,lr ;@ Preserve ARM return address\n");\r
+ ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ OpPush32();\r
+ OpPushSr(1);\r
+ ot(";@ Get IRQ Vector address:\n");\r
+ ot(" ldrb r1,[r7,#0x47] ;@ IRQ\n");\r
+ ot(" mov r0,r1,asl #2\n");\r
+ ot(" add r0,r0,#0x60\n");\r
+ ot(";@ Read IRQ Vector:\n");\r
+ MemHandler(0,2);\r
+ ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");\r
+ ot(" mov lr,pc\n");\r
+ ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ ot(" mov r4,r0\n");\r
+ ot("\n");\r
+ ot(";@ todo - swap OSP and A7 if not in Supervisor mode\n");\r
+ ot(" ldrb r0,[r7,#0x47] ;@ IRQ\n");\r
+ ot(" orr r0,r0,#0x20 ;@ Supervisor mode + IRQ number\n");\r
+ ot(" strb r0,[r7,#0x44] ;@ Put SR high\n");\r
+ ot("\n");\r
+ ot(";@ Clear irq:\n");\r
+ ot(" mov r0,#0\n");\r
+ ot(" strb r0,[r7,#0x47]\n");\r
+ ot(" subs r5,r5,#%d ;@ Subtract cycles\n",46);\r
+ ot(" mov pc,r11 ;@ Return\n");\r
+ ot("\n");\r
+\r
+ ot("Exception%s\n", ms?"":":");\r
+ ot("\n");\r
+ ot(" mov r11,lr ;@ Preserve ARM return address\n");\r
+ PrintException();\r
+ ot(" mov pc,r11 ;@ Return\n");\r
+ ot("\n");\r
+}\r
+\r
+// ---------------------------------------------------------------------------\r
+// Call Read(r0), Write(r0,r1) or Fetch(r0)\r
+// Trashes r0-r3\r
+int MemHandler(int type,int size)\r
+{\r
+ int func=0;\r
+ func=0x68+type*0xc+(size<<2); // Find correct offset\r
+\r
+ if (Debug&4) ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
+ if (Debug&3) ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
+\r
+ ot(" mov lr,pc\n");\r
+ ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);\r
+\r
+ // Document what we are calling:\r
+ if (type==0) ot("read");\r
+ if (type==1) ot("write");\r
+ if (type==2) ot("fetch");\r
+\r
+ if (type==1) ot("%d(r0,r1)",8<<size);\r
+ else ot("%d(r0)", 8<<size);\r
+ ot(" handler\n");\r
+\r
+ if (Debug&2) ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+ return 0;\r
+}\r
+\r
+static void PrintOpcodes()\r
+{\r
+ int op=0;\r
+ \r
+ printf("Creating Opcodes: [");\r
+\r
+ ot(";@ ---------------------------- Opcodes ---------------------------\n");\r
+\r
+ // Emit null opcode:\r
+ ot("Op____%s ;@ Called if an opcode is not recognised\n", ms?"":":");\r
+ OpStart(-1); Cycles=4; OpEnd(); //test\r
+\r
+ ot(" b CycloneEnd\n\n");\r
+\r
+ for (op=0;op<0x10000;op++)\r
+ {\r
+ if ((op&0xfff)==0) { printf("%x",op>>12); fflush(stdout); } // Update progress\r
+\r
+ OpAny(op);\r
+ }\r
+\r
+ ot("\n");\r
+\r
+ printf("]\n");\r
+}\r
+\r
+static void PrintJumpTable()\r
+{\r
+ int i=0,op=0,len=0;\r
+\r
+ ot(";@ -------------------------- Jump Table --------------------------\n");\r
+ ot("JumpTab%s\n", ms?"":":");\r
+\r
+ len=0xfffe; // Hmmm, armasm 2.50.8684 messes up with a 0x10000 long jump table\r
+ for (i=0;i<len;i++)\r
+ {\r
+ op=CyJump[i];\r
+\r
+ if ((i&7)==0) ot(ms?" dcd ":" .long ");\r
+ if (op<0) ot("Op____"); else ot("Op%.4x",op);\r
+ \r
+ if ((i&7)==7) ot(" ;@ %.4x\n",i-7);\r
+ else if (i+1<len) ot(",");\r
+ }\r
+\r
+ ot("\n");\r
+}\r
+\r
+static int CycloneMake()\r
+{\r
+ char *name="Cyclone.s";\r
+ \r
+ // Open the assembly file\r
+ if (ms) name="Cyclone.asm";\r
+ AsmFile=fopen(name,"wt"); if (AsmFile==NULL) return 1;\r
+ \r
+ printf("Making %s...\n",name);\r
+\r
+ ot("\n;@ Cyclone 68000 Emulator v%x.%.3x - Assembler Output\n\n",CycloneVer>>12,CycloneVer&0xfff);\r
+\r
+ ot(";@ This code is licensed under the GNU General Public License version 2.0 and the MAME License.\n");\r
+ ot(";@ You can choose the license that has the most advantages for you.\n\n");\r
+ ot(";@ SVN repository can be found at http://code.google.com/p/cyclone68000/\n\n");\r
+\r
+ CyJump=(int *)malloc(0x40000); if (CyJump==NULL) return 1;\r
+ memset(CyJump,0xff,0x40000); // Init to -1\r
+\r
+ if (ms)\r
+ {\r
+ ot(" area |.text|, code\n");\r
+ ot(" export CycloneRun\n");\r
+ ot(" export CycloneVer\n");\r
+ ot("\n");\r
+ ot("CycloneVer dcd 0x%.4x\n",CycloneVer);\r
+ }\r
+ else\r
+ {\r
+ ot(" .global CycloneRun\n");\r
+ ot(" .global CycloneVer\n");\r
+ ot("CycloneVer: .long 0x%.4x\n",CycloneVer);\r
+ }\r
+ ot("\n");\r
+\r
+ PrintFramework();\r
+ PrintOpcodes();\r
+ PrintJumpTable();\r
+\r
+ if (ms) ot(" END\n");\r
+\r
+ fclose(AsmFile); AsmFile=NULL;\r
+\r
+ printf("Assembling...\n");\r
+ // Assemble the file\r
+ if (ms) system("armasm Cyclone.asm");\r
+ else system("as -o Cyclone.o Cyclone.s");\r
+ printf("Done!\n\n");\r
+\r
+ free(CyJump);\r
+ return 0;\r
+}\r
+\r
+int main()\r
+{\r
+ printf("\n Cyclone 68000 Emulator v%x.%.3x - Core Creator\n\n",CycloneVer>>12,CycloneVer&0xfff);\r
+\r
+ // Make GAS and ARMASM versions\r
+ for (ms=0;ms<2;ms++) CycloneMake();\r
+ return 0;\r
+}\r
notaz.gp2x.de / cyclone68000.git / blobdiff