ot(" and r1,r8,#0x0007\n");\r
ot(" mov r1,r1,lsl #2\n");\r
ot(" ldrsh r0,[r7,r1]\n");\r
+ ot(" strb r8,[r7,#0x45] ;@ not polling\n");\r
ot(" sub r0,r0,#1\n");\r
ot(" strh r0,[r7,r1]\n");\r
ot("\n");\r
int offset=0;\r
int cc=0;\r
const char *asr_r11="";\r
+ int pc_reg=0;\r
\r
offset=(char)(op&0xff);\r
cc=(op>>8)&15;\r
\r
if (size==2) size=0; // 000 model does not support long displacement\r
if (size) use=op; // 16-bit or 32-bit\r
- else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches\r
+ else use=(op&0xff01)+2; // Use same opcode for all 8-bit branches\r
\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
OpStart(op,size?0x10:0);\r
Cycles=18; // always 18\r
}\r
\r
- ot(" add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
-\r
#if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_8\r
if (offset!=0 && offset!=-1) checkpc=1;\r
#endif\r
#if USE_CHECKPC_CALLBACK\r
if (offset==-1) checkpc=1;\r
#endif\r
- if (checkpc) CheckPc();\r
+ if (checkpc)\r
+ {\r
+ ot(" add r0,r4,r11%s ;@ New PC\n",asr_r11);\r
+ CheckPc();\r
+ pc_reg=0;\r
+ }\r
+ else\r
+ {\r
+ ot(" add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
+ pc_reg=4;\r
+ }\r
+\r
+ if ((op & 1) || size != 0)\r
+ {\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
- ot(" mov r4,r0\n");\r
- ot(" tst r4,#1 ;@ address error?\n");\r
- ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+ if (pc_reg!=4)\r
+ {\r
+ ot(" mov r4,r%d\n",pc_reg);\r
+ pc_reg=4;\r
+ }\r
+ if (size)\r
+ {\r
+ ot(" tst r4,#1 ;@ address error?\n");\r
+ ot(" bne ExceptionAddressError_r_prg_r4\n");\r
+ }\r
+ else\r
+ {\r
+ ot(" b ExceptionAddressError_r_prg_r4\n");\r
+ }\r
#else\r
- ot(" bic r4,r0,#1\n");\r
+ ot(" bic r4,r%d,#1\n",pc_reg);\r
+ pc_reg=4;\r
#endif\r
+ }\r
+ if (pc_reg!=4)\r
+ ot(" mov r4,r%d\n",pc_reg);\r
ot("\n");\r
\r
OpEnd(size?0x10:0);\r
\r
// since all "DontBranch" code is same for every size, output only once\r
- if (cc>=2&&(op&0xff00)==0x6700)\r
+ if (cc>=2&&(op&0xff01)==0x6700)\r
{\r
ot("BccDontBranch%i%s\n", 8<<size, ms?"":":");\r
if (size) ot(" add r4,r4,#%d\n",1<<size);\r