resetmode=1;
break;
case 0xE001:IRQa=1;
- if(latched)
+ if(latched)
IRQCount=IRQLatch;
break;
}
}
pwrap(0xA000,DRegBuf[7]);
pwrap(0xE000,~0);
+ X6502_Rebase();
}
static INLINE void FixMMC3CHR(int V)
case 5: cwrap(cbase^0x1C00,V); break;
case 6: if (MMC3_cmd&0x40) pwrap(0xC000,V);
else pwrap(0x8000,V);
+ X6502_Rebase();
break;
case 7: pwrap(0xA000,V);
+ X6502_Rebase();
break;
}
}
A000B=V;
}
-static void genmmc3ii(void (*PW)(uint32 A, uint8 V),
- void (*CW)(uint32 A, uint8 V),
+static void genmmc3ii(void (*PW)(uint32 A, uint8 V),
+ void (*CW)(uint32 A, uint8 V),
void (*MW)(uint8 V))
{
pwrap=GENPWRAP;
{
PIRREGS[0]=V&1;
FixMMC3PRG(MMC3_cmd);
- FixMMC3CHR(MMC3_cmd);
+ FixMMC3CHR(MMC3_cmd);
}
void Mapper47_init(void)
static DECLFW(Mapper52_write)
{
- if(PIRREGS[1])
+ if(PIRREGS[1])
{
(WRAM-0x6000)[A]=V;
return;
static void M52Reset(void)
{
PIRREGS[0]=PIRREGS[1]=0;
- MMC3RegReset();
+ MMC3RegReset();
}
void Mapper52_init(void)
setprg8(A,V);
}
else
+ {
setprg32(0x8000,(PIRREGS[0]>>4)&3);
+ X6502_Rebase();
+ }
}
static void M49CW(uint32 A, uint8 V)
//if(scanline>=140 && scanline<=200) {setmirror(MI_1);return;}
//if(scanline>=140 && scanline<=200)
// if(scanline>=190 && scanline<=200) {setmirror(MI_1);return;}
- // setmirror(MI_1);
+ // setmirror(MI_1);
//printf("$%04x\n",A);
A>>=10;