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drc: a bit more sophisticated f1 hack
author
notaz
<notasas@gmail.com>
Sun, 23 Jan 2022 23:49:45 +0000
(
01:49
+0200)
committer
notaz
<notasas@gmail.com>
Sun, 23 Jan 2022 23:53:26 +0000
(
01:53
+0200)
yes it sucks, I know...
libpcsxcore/new_dynarec/emu_if.h
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libpcsxcore/new_dynarec/linkage_arm.S
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libpcsxcore/new_dynarec/linkage_arm64.S
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libpcsxcore/new_dynarec/linkage_offsets.h
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libpcsxcore/new_dynarec/new_dynarec.c
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diff --git
a/libpcsxcore/new_dynarec/emu_if.h
b/libpcsxcore/new_dynarec/emu_if.h
index
0ce9584
..
db11f7b
100644
(file)
--- a/
libpcsxcore/new_dynarec/emu_if.h
+++ b/
libpcsxcore/new_dynarec/emu_if.h
@@
-76,6
+76,7
@@
void rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
void rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
extern unsigned int address;
void rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
extern unsigned int address;
+extern unsigned int hack_addr;
extern void *psxH_ptr;
extern void *zeromem_ptr;
extern void *scratch_buf_ptr;
extern void *psxH_ptr;
extern void *zeromem_ptr;
extern void *scratch_buf_ptr;
diff --git
a/libpcsxcore/new_dynarec/linkage_arm.S
b/libpcsxcore/new_dynarec/linkage_arm.S
index
6371731
..
d409aff
100644
(file)
--- a/
libpcsxcore/new_dynarec/linkage_arm.S
+++ b/
libpcsxcore/new_dynarec/linkage_arm.S
@@
-60,7
+60,7
@@
DRC_VAR(pending_exception, 4)
DRC_VAR(stop, 4)
DRC_VAR(branch_target, 4)
DRC_VAR(address, 4)
DRC_VAR(stop, 4)
DRC_VAR(branch_target, 4)
DRC_VAR(address, 4)
-@DRC_VAR(align0, 4) /* unused/alignment */
+DRC_VAR(hack_addr, 4)
DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
/* psxRegs */
DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
/* psxRegs */
diff --git
a/libpcsxcore/new_dynarec/linkage_arm64.S
b/libpcsxcore/new_dynarec/linkage_arm64.S
index
5e9626f
..
b9ab726
100644
(file)
--- a/
libpcsxcore/new_dynarec/linkage_arm64.S
+++ b/
libpcsxcore/new_dynarec/linkage_arm64.S
@@
-52,7
+52,7
@@
DRC_VAR(pending_exception, 4)
DRC_VAR(stop, 4)
DRC_VAR(branch_target, 4)
DRC_VAR(address, 4)
DRC_VAR(stop, 4)
DRC_VAR(branch_target, 4)
DRC_VAR(address, 4)
-#DRC_VAR(align0, 16) /* unused/alignment */
+DRC_VAR(hack_addr, 4)
DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
/* psxRegs */
DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
/* psxRegs */
diff --git
a/libpcsxcore/new_dynarec/linkage_offsets.h
b/libpcsxcore/new_dynarec/linkage_offsets.h
index
e9bb3ab
..
7ac2e61
100644
(file)
--- a/
libpcsxcore/new_dynarec/linkage_offsets.h
+++ b/
libpcsxcore/new_dynarec/linkage_offsets.h
@@
-8,8
+8,8
@@
#define LO_stop (LO_pending_exception + 4)
#define LO_branch_target (LO_stop + 4)
#define LO_address (LO_branch_target + 4)
#define LO_stop (LO_pending_exception + 4)
#define LO_branch_target (LO_stop + 4)
#define LO_address (LO_branch_target + 4)
-#define LO_
align0
(LO_address + 4)
-#define LO_psxRegs (LO_
align0
+ 4)
+#define LO_
hack_addr
(LO_address + 4)
+#define LO_psxRegs (LO_
hack_addr
+ 4)
#define LO_reg (LO_psxRegs)
#define LO_lo (LO_reg + 128)
#define LO_hi (LO_lo + 4)
#define LO_reg (LO_psxRegs)
#define LO_lo (LO_reg + 128)
#define LO_hi (LO_lo + 4)
diff --git
a/libpcsxcore/new_dynarec/new_dynarec.c
b/libpcsxcore/new_dynarec/new_dynarec.c
index
e937b76
..
0900736
100644
(file)
--- a/
libpcsxcore/new_dynarec/new_dynarec.c
+++ b/
libpcsxcore/new_dynarec/new_dynarec.c
@@
-224,7
+224,7
@@
static struct decoded_insn
static void *copy;
static int expirep;
static u_int stop_after_jal;
static void *copy;
static int expirep;
static u_int stop_after_jal;
- static u_int f1_hack;
// 0 - off, ~0 - capture address, else addr
+ static u_int f1_hack;
int new_dynarec_hacks;
int new_dynarec_hacks_pergame;
int new_dynarec_hacks;
int new_dynarec_hacks_pergame;
@@
-6831,6
+6831,7
@@
void new_dynarec_clear_full(void)
literalcount=0;
stop_after_jal=0;
inv_code_start=inv_code_end=~0;
literalcount=0;
stop_after_jal=0;
inv_code_start=inv_code_end=~0;
+ hack_addr=0;
f1_hack=0;
// TLB
for(n=0;n<4096;n++) ll_clear(jump_in+n);
f1_hack=0;
// TLB
for(n=0;n<4096;n++) ll_clear(jump_in+n);
@@
-7046,11
+7047,11
@@
void new_dynarec_load_blocks(const void *save, int size)
memcpy(&psxRegs.GPR, regs_save, sizeof(regs_save));
}
memcpy(&psxRegs.GPR, regs_save, sizeof(regs_save));
}
-static
void
apply_hacks(void)
+static
int
apply_hacks(void)
{
int i;
if (HACK_ENABLED(NDHACK_NO_COMPAT_HACKS))
{
int i;
if (HACK_ENABLED(NDHACK_NO_COMPAT_HACKS))
- return;
+ return
0
;
/* special hack(s) */
for (i = 0; i < slen - 4; i++)
{
/* special hack(s) */
for (i = 0; i < slen - 4; i++)
{
@@
-7075,11
+7076,12
@@
static void apply_hacks(void)
if (dops[i].itype == STORELR && dops[i].rs1 == 6
&& dops[i-1].itype == STORELR && dops[i-1].rs1 == 6)
{
if (dops[i].itype == STORELR && dops[i].rs1 == 6
&& dops[i-1].itype == STORELR && dops[i-1].rs1 == 6)
{
- SysPrintf("F1 hack from %08x
\n", start
);
- if (f1_hack == 0)
-
f1_hack = ~0u
;
+ SysPrintf("F1 hack from %08x
, old dst %08x\n", start, hack_addr
);
+ f1_hack = 1;
+
return 1
;
}
}
}
}
+ return 0;
}
int new_recompile_block(u_int addr)
}
int new_recompile_block(u_int addr)
@@
-7117,9
+7119,11
@@
int new_recompile_block(u_int addr)
ll_add_flags(jump_in+page,start,state_rflags,(void *)beginning);
return 0;
}
ll_add_flags(jump_in+page,start,state_rflags,(void *)beginning);
return 0;
}
- else if (f1_hack
== ~0u || (f1_hack != 0 && start == f1_hack)
) {
+ else if (f1_hack
&& hack_addr == 0
) {
void *beginning = start_block();
u_int page = get_page(start);
void *beginning = start_block();
u_int page = get_page(start);
+ emit_movimm(start, 0);
+ emit_writeword(0, &hack_addr);
emit_readword(&psxRegs.GPR.n.sp, 0);
emit_readptr(&mem_rtab, 1);
emit_shrimm(0, 12, 2);
emit_readword(&psxRegs.GPR.n.sp, 0);
emit_readptr(&mem_rtab, 1);
emit_shrimm(0, 12, 2);
@@
-7135,7
+7139,6
@@
int new_recompile_block(u_int addr)
ll_add_flags(jump_in + page, start, state_rflags, beginning);
SysPrintf("F1 hack to %08x\n", start);
ll_add_flags(jump_in + page, start, state_rflags, beginning);
SysPrintf("F1 hack to %08x\n", start);
- f1_hack = start;
return 0;
}
return 0;
}
@@
-7663,7
+7666,7
@@
int new_recompile_block(u_int addr)
}
assert(slen>0);
}
assert(slen>0);
- apply_hacks();
+
int clear_hack_addr =
apply_hacks();
/* Pass 2 - Register dependencies and branch targets */
/* Pass 2 - Register dependencies and branch targets */
@@
-9203,6
+9206,11
@@
int new_recompile_block(u_int addr)
instr_addr[i] = out;
assem_debug("<->\n");
drc_dbg_emit_do_cmp(i, ccadj[i]);
instr_addr[i] = out;
assem_debug("<->\n");
drc_dbg_emit_do_cmp(i, ccadj[i]);
+ if (clear_hack_addr) {
+ emit_movimm(0, 0);
+ emit_writeword(0, &hack_addr);
+ clear_hack_addr = 0;
+ }
// load regs
if(regs[i].regmap_entry[HOST_CCREG]==CCREG&®s[i].regmap[HOST_CCREG]!=CCREG)
// load regs
if(regs[i].regmap_entry[HOST_CCREG]==CCREG&®s[i].regmap[HOST_CCREG]!=CCREG)