it should wrap, but that's not practical so just limit for now
libretro/pcsx_rearmed#740
}
void psxDma3(u32 madr, u32 bcr, u32 chcr) {
}
void psxDma3(u32 madr, u32 bcr, u32 chcr) {
switch (chcr & 0x71000000) {
case 0x11000000:
switch (chcr & 0x71000000) {
case 0x11000000:
- ptr = (u8 *)PSXM(madr);
+ ptr = getDmaRam(madr, &max_words);
if (ptr == INVALID_PTR) {
CDR_LOG_I("psxDma3() Log: *** DMA 3 *** NULL Pointer!\n");
break;
if (ptr == INVALID_PTR) {
CDR_LOG_I("psxDma3() Log: *** DMA 3 *** NULL Pointer!\n");
break;
size = DATA_SIZE - cdr.FifoOffset;
if (size > cdsize)
size = cdsize;
size = DATA_SIZE - cdr.FifoOffset;
if (size > cdsize)
size = cdsize;
+ if (size > max_words * 4)
+ size = max_words * 4;
if (size > 0)
{
memcpy(ptr, cdr.Transfer + cdr.FifoOffset, size);
if (size > 0)
{
memcpy(ptr, cdr.Transfer + cdr.FifoOffset, size);
#include "psxdma.h"
#include "gpu.h"
#include "psxdma.h"
#include "gpu.h"
+#ifndef min
+#define min(a, b) ((b) < (a) ? (b) : (a))
+#endif
+
// Dma0/1 in Mdec.c
// Dma3 in CdRom.c
// Dma0/1 in Mdec.c
// Dma3 in CdRom.c
}
void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
}
void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
+ u32 words, words_max, size;
switch (chcr) {
case 0x01000201: //cpu to spu transfer
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif
switch (chcr) {
case 0x01000201: //cpu to spu transfer
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif
- ptr = (u16 *)PSXM(madr);
+ ptr = getDmaRam(madr, &words_max);
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
break;
}
words = (bcr >> 16) * (bcr & 0xffff);
break;
}
words = (bcr >> 16) * (bcr & 0xffff);
- SPU_writeDMAMem(ptr, words * 2, psxRegs.cycle);
- HW_DMA4_MADR = SWAPu32(madr + words * 4);
+ size = min(words, words_max) * 2;
+ SPU_writeDMAMem(ptr, size, psxRegs.cycle);
+ HW_DMA4_MADR = SWAPu32((madr & ~3) + words * 4);
SPUDMA_INT(words * 4);
return;
SPUDMA_INT(words * 4);
return;
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif
- ptr = (u16 *)PSXM(madr);
+ ptr = getDmaRam(madr, &words_max);
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
break;
}
words = (bcr >> 16) * (bcr & 0xffff);
break;
}
words = (bcr >> 16) * (bcr & 0xffff);
- SPU_readDMAMem(ptr, words * 2, psxRegs.cycle);
+ size = min(words, words_max) * 2;
+ SPU_readDMAMem(ptr, size, psxRegs.cycle);
psxCpu->Clear(madr, words);
HW_DMA4_MADR = SWAPu32(madr + words * 4);
psxCpu->Clear(madr, words);
HW_DMA4_MADR = SWAPu32(madr + words * 4);
}
void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
}
void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
- u32 *ptr, madr_next, *madr_next_p;
+ u32 *ptr, madr_next, *madr_next_p, size;
+ u32 words, words_max, words_copy;
switch (chcr) {
case 0x01000200: // vram2mem
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
switch (chcr) {
case 0x01000200: // vram2mem
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
- ptr = (u32 *)PSXM(madr);
+ ptr = getDmaRam(madr, &words_max);
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
}
// BA blocks * BS words (word = 32-bits)
words = (bcr >> 16) * (bcr & 0xffff);
}
// BA blocks * BS words (word = 32-bits)
words = (bcr >> 16) * (bcr & 0xffff);
- GPU_readDataMem(ptr, words);
- psxCpu->Clear(madr, words);
+ words_copy = min(words, words_max);
+ GPU_readDataMem(ptr, words_copy);
+ psxCpu->Clear(madr, words_copy);
- HW_DMA2_MADR = SWAPu32(madr + words * 4);
+ HW_DMA2_MADR = SWAPu32((madr & ~3) + words * 4);
// already 32-bit word size ((size * 4) / 4)
GPUDMA_INT(words / 4);
// already 32-bit word size ((size * 4) / 4)
GPUDMA_INT(words / 4);
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
- ptr = (u32 *)PSXM(madr);
+ ptr = getDmaRam(madr, &words_max);
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
}
// BA blocks * BS words (word = 32-bits)
words = (bcr >> 16) * (bcr & 0xffff);
}
// BA blocks * BS words (word = 32-bits)
words = (bcr >> 16) * (bcr & 0xffff);
- GPU_writeDataMem(ptr, words);
+ GPU_writeDataMem(ptr, min(words, words_max));
- HW_DMA2_MADR = SWAPu32(madr + words * 4);
+ HW_DMA2_MADR = SWAPu32((madr & ~3) + words * 4);
// already 32-bit word size ((size * 4) / 4)
GPUDMA_INT(words / 4);
// already 32-bit word size ((size * 4) / 4)
GPUDMA_INT(words / 4);
void spuInterrupt();
void gpuotcInterrupt();
void spuInterrupt();
void gpuotcInterrupt();
+static inline void *getDmaRam(u32 madr, u32 *max_words)
+{
+ // this should wrap instead of limit
+ if (!(madr & 0x800000)) {
+ madr &= 0x1ffffc;
+ *max_words = (0x200000 - madr) / 4;
+ return psxM + madr;
+ }
+ return INVALID_PTR;
+}
+
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif