struct opcode *op = &block->opcode_list[offset];
jit_state_t *_jit = block->_jit;
union code c = op->c;
- u8 rs, rt, tmp = 0, tmp2 = 0, tmp3, addr_reg, addr_reg2;
+ u8 rs, rt, tmp = 0, tmp2 = 0, tmp3, addr_reg, addr_reg2, src_reg;
s16 imm = (s16)c.i.imm;
s32 simm = (s32)imm << (1 - lut_is_32bit(state));
s32 lut_offt = lightrec_offset(code_lut);
}
rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, 0);
+ src_reg = rt;
if (is_big_endian() && swap_code && in_reg) {
tmp3 = lightrec_alloc_reg_temp(reg_cache, _jit);
jit_new_node_ww(swap_code, tmp3, rt);
- if (c.i.op == OP_META_SWU)
- jit_unstr(addr_reg2, tmp3, LIGHTNING_UNALIGNED_32BIT);
- else
- jit_new_node_www(code, imm, addr_reg2, tmp3);
-
- lightrec_free_reg(reg_cache, tmp3);
- } else if (c.i.op == OP_META_SWU) {
- jit_unstr(addr_reg2, rt, LIGHTNING_UNALIGNED_32BIT);
- } else {
- jit_new_node_www(code, imm, addr_reg2, rt);
+ lightrec_free_reg(reg_cache, rt);
+ src_reg = tmp3;
}
- lightrec_free_reg(reg_cache, rt);
+ if (c.i.op == OP_META_SWU)
+ jit_unstr(addr_reg2, src_reg, LIGHTNING_UNALIGNED_32BIT);
+ else
+ jit_new_node_www(code, imm, addr_reg2, src_reg);
+
+ lightrec_free_reg(reg_cache, src_reg);
if (invalidate) {
tmp3 = lightrec_alloc_reg_in(reg_cache, _jit, 0, 0);
jit_state_t *_jit = block->_jit;
jit_node_t *to_not_ram, *to_end;
bool swc2 = c.i.op == OP_SWC2;
- u8 addr_reg, tmp, tmp2 = 0, rs, rt, in_reg = swc2 ? REG_TEMP : c.i.rt;
+ u8 addr_reg, tmp, tmp2 = 0, rs, rt, src_reg, in_reg = swc2 ? REG_TEMP : c.i.rt;
s16 imm;
jit_note(__FILE__, __LINE__);
}
rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, 0);
+ src_reg = rt;
if (is_big_endian() && swap_code && in_reg) {
tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit);
jit_new_node_ww(swap_code, tmp2, rt);
+ src_reg = tmp2;
- if (c.i.op == OP_META_SWU)
- jit_unstr(tmp, tmp2, LIGHTNING_UNALIGNED_32BIT);
- else
- jit_new_node_www(code, imm, tmp, tmp2);
-
- lightrec_free_reg(reg_cache, tmp2);
- } else if (c.i.op == OP_META_SWU) {
- jit_unstr(tmp, rt, LIGHTNING_UNALIGNED_32BIT);
- } else {
- jit_new_node_www(code, imm, tmp, rt);
+ lightrec_free_reg(reg_cache, rt);
}
- lightrec_free_reg(reg_cache, rt);
+ if (c.i.op == OP_META_SWU)
+ jit_unstr(tmp, src_reg, LIGHTNING_UNALIGNED_32BIT);
+ else
+ jit_new_node_www(code, imm, tmp, src_reg);
+
+ lightrec_free_reg(reg_cache, src_reg);
lightrec_free_reg(reg_cache, tmp);
}
jit_state_t *_jit = block->_jit;
jit_node_t *to_not_ram, *to_end;
bool swc2 = c.i.op == OP_SWC2;
- u8 addr_reg, tmp, tmp2, tmp3, rs, rt, reg_imm;
+ u8 src_reg, addr_reg, tmp, tmp2, tmp3, rs, rt, reg_imm;
u8 in_reg = swc2 ? REG_TEMP : c.i.rt;
u32 mask;
bool different_offsets = state->offset_ram != state->offset_scratch;
lightrec_free_reg(reg_cache, reg_imm);
rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, 0);
+ src_reg = rt;
if (is_big_endian() && swap_code && in_reg) {
tmp = lightrec_alloc_reg_temp(reg_cache, _jit);
jit_new_node_ww(swap_code, tmp, rt);
+ src_reg = tmp;
- if (c.i.op == OP_META_SWU)
- jit_unstr(tmp2, tmp, LIGHTNING_UNALIGNED_32BIT);
- else
- jit_new_node_www(code, 0, tmp2, tmp);
-
- lightrec_free_reg(reg_cache, tmp);
- } else if (c.i.op == OP_META_SWU) {
- jit_unstr(tmp2, rt, LIGHTNING_UNALIGNED_32BIT);
- } else {
- jit_new_node_www(code, 0, tmp2, rt);
+ lightrec_free_reg(reg_cache, rt);
}
- lightrec_free_reg(reg_cache, rt);
+ if (c.i.op == OP_META_SWU)
+ jit_unstr(tmp2, src_reg, LIGHTNING_UNALIGNED_32BIT);
+ else
+ jit_new_node_www(code, 0, tmp2, src_reg);
+
+ lightrec_free_reg(reg_cache, src_reg);
lightrec_free_reg(reg_cache, tmp2);
}
else
addr_mask = 0x1fffffff;
- reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit,
- addr_mask);
if (!state->mirrors_mapped) {
+ reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit,
+ addr_mask);
jit_andi(tmp, addr_reg, BIT(28));
jit_rshi_u(tmp, tmp, 28 - 22);
jit_orr(tmp, tmp, reg_imm);
jit_andr(rt, addr_reg, tmp);
+
+ lightrec_free_reg(reg_cache, reg_imm);
} else {
- jit_andr(rt, addr_reg, reg_imm);
+ rec_and_mask(cstate, _jit, rt, addr_reg, addr_mask);
}
- lightrec_free_reg(reg_cache, reg_imm);
-
if (state->offset_ram) {
offt_reg = lightrec_get_reg_with_value(reg_cache,
state->offset_ram);