#ifndef CZ80_H\r
#define CZ80_H\r
\r
+// uintptr_t\r
+#include <stdlib.h>\r
+#ifndef _MSC_VER\r
+#include <stdint.h>\r
+#endif\r
+\r
#ifdef __cplusplus\r
extern "C" {\r
#endif\r
#endif\r
\r
#ifndef FPTR\r
-#define FPTR unsigned long\r
+#define FPTR uintptr_t\r
#endif\r
\r
/*************************************/\r
#define WRITE_MEM8(A, D) { \\r
unsigned short a = A; \\r
unsigned char d = D; \\r
- unsigned long v = z80_write_map[a >> Z80_MEM_SHIFT]; \\r
+ uptr v = z80_write_map[a >> Z80_MEM_SHIFT]; \\r
if (map_flag_set(v)) \\r
((z80_write_f *)(v << 1))(a, d); \\r
else \\r
#ifndef __FAME_H__\r
#define __FAME_H__\r
\r
+// uintptr_t\r
+#include <stdlib.h>\r
+#ifndef _MSC_VER\r
+#include <stdint.h>\r
+#endif\r
+\r
#ifdef __cplusplus\r
extern "C" {\r
#endif\r
signed int cycles_needed;\r
\r
unsigned short *PC;\r
- unsigned long BasePC;\r
+ uintptr_t BasePC;\r
unsigned int flag_C;\r
unsigned int flag_V;\r
unsigned int flag_NotZ;\r
unsigned char not_polling;\r
unsigned char pad[3];\r
\r
- unsigned long Fetch[M68K_FETCHBANK1];\r
+ uintptr_t Fetch[M68K_FETCHBANK1];\r
} M68K_CONTEXT;\r
\r
typedef enum\r
#define s16 signed short\r
#define u32 unsigned int\r
#define s32 signed int\r
-#define uptr unsigned long\r
+#define uptr uintptr_t\r
\r
/*\r
typedef unsigned char u8;\r
/* Exception Vectors handled by emulation */\r
#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */\r
#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */\r
+#undef EXCEPTION_ILLEGAL_INSTRUCTION\r
#define EXCEPTION_ILLEGAL_INSTRUCTION 4\r
#define EXCEPTION_ZERO_DIVIDE 5\r
#define EXCEPTION_CHK 6\r
unsigned short t; \
int i; \
for (i = 320; i > 0; i--, pd++, p32x++, pmd++) { \
- t = pal[*(unsigned char *)((long)p32x ^ 1)]; \
+ t = pal[*(unsigned char *)((uintptr_t)p32x ^ 1)]; \
if ((t & 0x20) || (*pmd & 0x3f) == mdbg) \
*pd = t; \
else \
cpu68k_map_set(m68k_write16_map, 0x880000, 0x880000 + rs - 1, PicoWrite16_cart, 1);
#ifdef EMU_F68K
// setup FAME fetchmap
- PicoCpuFM68k.Fetch[0] = (unsigned long)Pico32xMem->m68k_rom;
+ PicoCpuFM68k.Fetch[0] = (uptr)Pico32xMem->m68k_rom;
for (rs = 0x88; rs < 0x90; rs++)
- PicoCpuFM68k.Fetch[rs] = (unsigned long)Pico.rom - 0x880000;
+ PicoCpuFM68k.Fetch[rs] = (uptr)Pico.rom - 0x880000;
#endif
// 32X ROM (banked)
#ifdef __clang__\r
volatile // prevent strange relocs from clang\r
#endif\r
- unsigned long ptr_ram = (unsigned long)PicoMem.ram;\r
+ unsigned long ptr_ram = (uptr)PicoMem.ram;\r
int i;\r
\r
// M68k\r
// by default, point everything to fitst 64k of ROM (BIOS)\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM (BIOS)\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;\r
// .. and RAM\r
for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS));\r
// S68k\r
// PRG RAM is default\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
// real PRG RAM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r
+ PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram;\r
// WORD RAM 2M area\r
for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r
+ PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->word_ram2M - 0x80000;\r
// remap_word_ram() will setup word ram for both\r
}\r
#endif\r
int i;\r
// by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;\r
// RAM already set\r
}\r
#endif\r
// memory map related stuff
+#include "pico_port.h"
+
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
-typedef unsigned long uptr; // unsigned pointer-sized int
+typedef uintptr_t uptr; // unsigned pointer-sized int
#define M68K_MEM_SHIFT 16
// minimum size we can map
#define PICO_INTERNAL_INCLUDED\r
\r
#include <stdio.h>\r
-#include <stdlib.h>\r
#include <string.h>\r
#include "pico_port.h"\r
#include "pico.h"\r
#ifndef PICO_PORT_INCLUDED
#define PICO_PORT_INCLUDED
+// provide size_t, uintptr_t
+#include <stdlib.h>
+#if !(defined(_MSC_VER) && _MSC_VER < 1800)
+#include <stdint.h>
+#endif
+
#if defined(__GNUC__) && defined(__i386__)
#define REGPARM(x) __attribute__((regparm(x)))
#else
memset32((int *) PicoIn.sndOut, 0, len); // assume PicoIn.sndOut to be aligned\r
else {\r
short *out = PicoIn.sndOut;\r
- if ((long)out & 2) { *out++ = 0; len--; }\r
+ if ((uintptr_t)out & 2) { *out++ = 0; len--; }\r
memset32((int *) out, 0, len/2);\r
if (len & 1) out[len-1] = 0;\r
}\r
static int vout_width, vout_height, vout_offset;
static float user_vout_width = 0.0;
-#ifdef _MSC_VER
-static short sndBuffer[2*44100/50];
-#else
-static short __attribute__((aligned(4))) sndBuffer[2*44100/50];
-#endif
+static short ALIGNED(4) sndBuffer[2*44100/50];
static void snd_write(int len);
int flags = MAP_PRIVATE | MAP_ANONYMOUS;
void *req, *ret;
- req = (void *)addr;
+ req = (void *)(uintptr_t)addr;
ret = mmap(req, size, PROT_READ | PROT_WRITE, flags, -1, 0);
if (ret == MAP_FAILED) {
if (log_cb)
return NULL;
}
- if (addr != 0 && ret != (void *)addr) {
+ if (addr != 0 && ret != (void *)(uintptr_t)addr) {
if (log_cb)
log_cb(RETRO_LOG_WARN, "warning: wanted to map @%08lx, got %p\n",
addr, ret);