// get an opcode without triggering exceptions or affecting cache
u32 intFakeFetch(u32 pc)
{
- u8 *base = psxMemRLUT[pc >> 16];
- u32 *code;
- if (unlikely(base == INVALID_PTR))
+ u32 *code = (u32 *)psxm(pc & ~0x3, 0);
+ if (unlikely(code == INVALID_PTR))
return 0; // nop
- code = (u32 *)(base + (pc & 0xfffc));
return SWAP32(*code);
}
static u32 INT_ATTR fetchNoCache(psxRegisters *regs, u8 **memRLUT, u32 pc)
{
- u8 *base = memRLUT[pc >> 16];
- u32 *code;
- if (unlikely(base == INVALID_PTR)) {
+ u32 *code = (u32 *)psxm_lut(pc & ~0x3, 0, memRLUT);
+ if (unlikely(code == INVALID_PTR)) {
SysPrintf("game crash @%08x, ra=%08x\n", pc, regs->GPR.n.ra);
intException(regs, pc, R3000E_IBE << 2);
return 0; // execute as nop
}
- code = (u32 *)(base + (pc & 0xfffc));
return SWAP32(*code);
}
if (((entry->tag ^ pc) & 0xfffffff0) != 0 || pc < entry->tag)
{
- const u8 *base = memRLUT[pc >> 16];
- const u32 *code;
- if (unlikely(base == INVALID_PTR)) {
+ const u32 *code = (u32 *)psxm_lut(pc & ~0xf, 0, memRLUT);
+ if (unlikely(code == INVALID_PTR)) {
SysPrintf("game crash @%08x, ra=%08x\n", pc, regs->GPR.n.ra);
intException(regs, pc, R3000E_IBE << 2);
return 0; // execute as nop
}
- code = (u32 *)(base + (pc & 0xfff0));
entry->tag = pc;
// treat as 4 words, although other configurations are said to be possible
return -1;
}
+ if (DISABLE_MEM_LUTS)
+ return 0;
+
psxMemRLUT = (u8 **)malloc(0x10000 * sizeof(void *));
psxMemWLUT = (u8 **)malloc(0x10000 * sizeof(void *));
free(psxMemWLUT); psxMemWLUT = NULL;
}
+int cache_isolated;
+
void psxMemOnIsolate(int enable)
{
- if (enable) {
- memset(psxMemWLUT + 0x0000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *));
- memset(psxMemWLUT + 0x8000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *));
- //memset(psxMemWLUT + 0xa000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *));
- } else {
- int i;
- for (i = 0; i < 0x80; i++)
- psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16];
- memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
- memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
+ if (!DISABLE_MEM_LUTS) {
+ if (enable) {
+ memset(psxMemWLUT + 0x0000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *));
+ memset(psxMemWLUT + 0x8000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *));
+ //memset(psxMemWLUT + 0xa000, (int)(uintptr_t)INVALID_PTR, 0x80 * sizeof(void *));
+ } else {
+ int i;
+ for (i = 0; i < 0x80; i++)
+ psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16];
+ memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
+ memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
+ }
}
+
+ cache_isolated = enable;
psxCpu->Notify(enable ? R3000ACPU_NOTIFY_CACHE_ISOLATED
: R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
}
else
return psxHwRead8(mem);
} else {
- p = (char *)(psxMemRLUT[t]);
+ p = psxm(mem, 0);
if (p != INVALID_PTR) {
if (Config.Debug)
DebugCheckBP((mem & 0xffffff) | 0x80000000, R1);
- return *(u8 *)(p + (mem & 0xffff));
+ return *(u8 *)p;
} else {
#ifdef PSXMEM_LOG
PSXMEM_LOG("err lb %8.8lx\n", mem);
else
return psxHwRead16(mem);
} else {
- p = (char *)(psxMemRLUT[t]);
+ p = psxm(mem, 0);
if (p != INVALID_PTR) {
if (Config.Debug)
DebugCheckBP((mem & 0xffffff) | 0x80000000, R2);
- return SWAPu16(*(u16 *)(p + (mem & 0xffff)));
+ return SWAPu16(*(u16 *)p);
} else {
#ifdef PSXMEM_LOG
PSXMEM_LOG("err lh %8.8lx\n", mem);
else
return psxHwRead32(mem);
} else {
- p = (char *)(psxMemRLUT[t]);
+ p = psxm(mem, 0);
if (p != INVALID_PTR) {
if (Config.Debug)
DebugCheckBP((mem & 0xffffff) | 0x80000000, R4);
- return SWAPu32(*(u32 *)(p + (mem & 0xffff)));
+ return SWAPu32(*(u32 *)p);
} else {
if (mem == 0xfffe0130)
return psxRegs.biuReg;
else
psxHwWrite8(mem, value);
} else {
- p = (char *)(psxMemWLUT[t]);
+ p = psxm(mem, 1);
if (p != INVALID_PTR) {
if (Config.Debug)
DebugCheckBP((mem & 0xffffff) | 0x80000000, W1);
- *(u8 *)(p + (mem & 0xffff)) = value;
+ *(u8 *)p = value;
#ifndef DRC_DISABLE
psxCpu->Clear((mem & (~3)), 1);
#endif
else
psxHwWrite16(mem, value);
} else {
- p = (char *)(psxMemWLUT[t]);
+ p = psxm(mem, 1);
if (p != INVALID_PTR) {
if (Config.Debug)
DebugCheckBP((mem & 0xffffff) | 0x80000000, W2);
- *(u16 *)(p + (mem & 0xffff)) = SWAPu16(value);
+ *(u16 *)p = SWAPu16(value);
#ifndef DRC_DISABLE
psxCpu->Clear((mem & (~3)), 1);
#endif
else
psxHwWrite32(mem, value);
} else {
- p = (char *)(psxMemWLUT[t]);
+ p = psxm(mem, 1);
if (p != INVALID_PTR) {
if (Config.Debug)
DebugCheckBP((mem & 0xffffff) | 0x80000000, W4);
- *(u32 *)(p + (mem & 0xffff)) = SWAPu32(value);
+ *(u32 *)p = SWAPu32(value);
#ifndef DRC_DISABLE
psxCpu->Clear(mem, 1);
#endif
else
return NULL;
} else {
- p = (char *)(psxMemWLUT[t]);
+ p = psxm(mem, 1);
if (p != INVALID_PTR) {
- return (void *)(p + (mem & 0xffff));
+ return (void *)p;
}
return NULL;
}
extern u8 **psxMemWLUT;
extern u8 **psxMemRLUT;
+extern int cache_isolated;
-#define PSXM(mem) (psxMemRLUT[(mem) >> 16] == INVALID_PTR ? INVALID_PTR : (u8*)(psxMemRLUT[(mem) >> 16] + ((mem) & 0xffff)))
+static inline void * psxm_lut(u32 mem, int write, u8 **lut)
+{
+ if (!DISABLE_MEM_LUTS) {
+ void *ptr = lut[mem >> 16];
+
+ return ptr == INVALID_PTR ? INVALID_PTR : ptr + (u16)mem;
+ }
+
+ if (mem >= 0xa0000000)
+ mem -= 0xa0000000;
+ else
+ mem &= ~0x80000000;
+
+ if (mem < 0x800000) {
+ if (cache_isolated)
+ return INVALID_PTR;
+
+ return &psxM[mem & 0x1fffff];
+ }
+
+ if (mem > 0x1f800000 && mem <= 0x1f810000)
+ return &psxH[mem - 0x1f800000];
+
+ if (!write) {
+ if (mem > 0x1fc00000 && mem <= 0x1fc80000)
+ return &psxR[mem - 0x1fc00000];
+
+ if (mem > 0x1f000000 && mem <= 0x1f010000)
+ return &psxP[mem - 0x1f000000];
+ }
+
+ return INVALID_PTR;
+}
+
+static inline void * psxm(u32 mem, int write)
+{
+ return psxm_lut(mem, write, write ? psxMemWLUT : psxMemRLUT);
+}
+
+#define PSXM(mem) psxm(mem, 0)
#define PSXMs8(mem) (*(s8 *)PSXM(mem))
#define PSXMs16(mem) (SWAP16(*(s16 *)PSXM(mem)))
#define PSXMs32(mem) (SWAP32(*(s32 *)PSXM(mem)))