git subrepo pull --force deps/lightrec
authorPaul Cercueil <paul@crapouillou.net>
Sun, 12 Jan 2025 22:07:38 +0000 (23:07 +0100)
committernotaz <notasas@gmail.com>
Sun, 12 Jan 2025 22:38:42 +0000 (00:38 +0200)
subrepo:
  subdir:   "deps/lightrec"
  merged:   "8293acf768e"
upstream:
  origin:   "https://github.com/pcercuei/lightrec.git"
  branch:   "master"
  commit:   "8293acf768e"
git-subrepo:
  version:  "0.4.6"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "110b9eb"

deps/lightrec/.gitrepo
deps/lightrec/README.md
deps/lightrec/interpreter.c

index 5045b80..e7d7695 100644 (file)
@@ -6,7 +6,7 @@
 [subrepo]
        remote = https://github.com/pcercuei/lightrec.git
        branch = master
-       commit = 05f7e09e919327677454099664656e681f755ee5
-       parent = 60e75dbfc3a5c7278e5bf4bf39801ea8fbcf3892
+       commit = 8293acf768e57060bb3ee66eeb0942d3d06b964e
+       parent = b7027dbf9b020077be29014680d96b19c97f7d20
        method = merge
        cmdver = 0.4.6
index 449e06c..849ec29 100644 (file)
@@ -8,7 +8,7 @@ as the code emitter.
 
 As such, in theory it should be able to run on every CPU that Lightning
 can generate code for; including, but not limited to, __x86__, __x86_64__,
-__ARM__, __Aarch64__, __MIPS__, __PowerPC__ and __Risc-V__.
+__ARM__, __Aarch64__, __MIPS__, __PowerPC__, __SH4__ and __Risc-V__.
 
 ## Features
 
@@ -47,10 +47,10 @@ Lightrec has been ported to the following emulators:
 
 * [__PCSX-ReArmed__ (libretro)](https://github.com/libretro/pcsx_rearmed)
 
-* [__pcsx4all__ (my own fork)](https://github.com/pcercuei/pcsx4all)
-
 * [__Beetle__ (libretro)](https://github.com/libretro/beetle-psx-libretro/)
 
 * [__CubeSX/WiiSX__](https://github.com/emukidid/pcsxgc/)
 
+* [__Bloom__](https://github.com/pcercuei/bloom)
+
 [![Star History Chart](https://api.star-history.com/svg?repos=pcercuei/lightrec&type=Date)](https://star-history.com/#pcercuei/lightrec&Date)
index c0a5d54..ef2d884 100644 (file)
@@ -205,7 +205,9 @@ static u32 int_delay_slot(struct interpreter *inter, u32 pc, bool branch)
                if (branch_in_ds) {
                        run_first_op = true;
 
-                       if (op->i.op == OP_SPECIAL)
+                       if (!is_branch_taken(reg_cache, op->c))
+                               next_pc = pc + 4;
+                       else if (op->i.op == OP_SPECIAL)
                                next_pc = reg_cache[op->r.rs]; /* TODO: is it the old or new rs? */
                        else if (op->i.op == OP_J || op->i.op == OP_JAL)
                                next_pc = (pc & 0xf0000000) | (op->j.imm << 2);