make_dma_func(4)
 make_dma_func(6)
 
+static u32 io_spu_read8_even(u32 addr)
+{
+       return SPU_readRegister(addr, psxRegs.cycle) & 0xff;
+}
+
+static u32 io_spu_read8_odd(u32 addr)
+{
+       return SPU_readRegister(addr, psxRegs.cycle) >> 8;
+}
+
 static u32 io_spu_read16(u32 addr)
 {
        return SPU_readRegister(addr, psxRegs.cycle);
        map_item(&mem_iortab[IOMEM8(0x1803)], cdrRead3, 1);
 
        for (i = 0x1c00; i < 0x2000; i += 2) {
+               map_item(&mem_iortab[IOMEM8(i)], io_spu_read8_even, 1);
+               map_item(&mem_iortab[IOMEM8(i+1)], io_spu_read8_odd, 1);
                map_item(&mem_iortab[IOMEM16(i)], io_spu_read16, 1);
                map_item(&mem_iortab[IOMEM32(i)], io_spu_read32, 1);
        }
 
                        log_unhandled("unhandled r8  %08x @%08x\n", add, psxRegs.pc);
                        // falthrough
                default:
-                       if (0x1f801c00 <= add && add < 0x1f802000)
-                               log_unhandled("spu r8 %02x @%08x\n", add, psxRegs.pc);
+                       if (0x1f801c00 <= add && add < 0x1f802000) {
+                               u16 val = SPU_readRegister(add & ~1, psxRegs.cycle);
+                               hard = (add & 1) ? val >> 8 : val;
+                               break;
+                       }
                        hard = psxHu8(add); 
 #ifdef PSXHW_LOG
                        PSXHW_LOG("*Unkwnown 8bit read at address %x\n", add);