#include "../pico_int.h"
#include "../memory.h"
+#include "eeprom_spi.h"
/* The SSFII mapper */
{
{ CHUNK_CARTHW, sizeof(pier_regs), pier_regs },
{ CHUNK_CARTHW + 1, sizeof(pier_dump_prot), &pier_dump_prot },
+ { CHUNK_CARTHW + 2, 0, NULL }, // filled later
{ 0, 0, NULL }
};
base = d << 19;
goto do_map;
case 0x09:
- // TODO
+ SRam.changed = 1;
+ eeprom_spi_write(d);
break;
case 0x0b:
// eeprom read
return PicoRead8_io(a);
if (a == 0xa1300b)
- return 0; // TODO
+ return eeprom_spi_read(a);
elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
return 0;
pier_regs[1] = pier_regs[2] = pier_regs[3] = 0;
pier_dump_prot = 3;
carthw_pier_statef();
+ eeprom_spi_init(NULL);
}
void carthw_pier_startup(void)
{
+ void *eeprom_state;
+ int eeprom_size = 0;
int i;
elprintf(EL_STATUS, "Pier Solar mapper startup");
for (i = 0; i < M68K_BANK_SIZE; i += 0x8000)
memcpy(Pico.rom + Pico.romsize + i, Pico.rom, 0x8000);
+ // save EEPROM
+ eeprom_state = eeprom_spi_init(&eeprom_size);
+ SRam.flags = 0;
+ SRam.size = 0x10000;
+ SRam.data = calloc(1, SRam.size);
+ if (!SRam.data)
+ SRam.size = 0;
+ carthw_pier_state[2].ptr = eeprom_state;
+ carthw_pier_state[2].size = eeprom_size;
+
PicoCartMemSetup = carthw_pier_mem_setup;
PicoResetHook = carthw_pier_reset;
PicoLoadStateHook = carthw_pier_statef;
PicoCartMemSetup = carthw_prot_lk3_mem_setup;
}
+// vim:ts=2:sw=2:expandtab
*
****************************************************************************************/
-#include "shared.h"
+#include "../pico_int.h"
+#include "../cd/genplus_macros.h"
+#include "eeprom_spi.h"
/* max supported size 64KB (25x512/95x512) */
#define SIZE_MASK 0xffff
static T_EEPROM_SPI spi_eeprom;
-void eeprom_spi_init()
+void *eeprom_spi_init(int *size)
{
/* reset eeprom state */
memset(&spi_eeprom, 0, sizeof(T_EEPROM_SPI));
spi_eeprom.out = 1;
spi_eeprom.state = GET_OPCODE;
- /* enable backup RAM */
- sram.custom = 2;
- sram.on = 1;
+ if (size)
+ *size = sizeof(T_EEPROM_SPI);
+ return &spi_eeprom;
}
void eeprom_spi_write(unsigned char data)
if (spi_eeprom.opcode & 0x01)
{
/* READ operation */
- spi_eeprom.buffer = sram.sram[spi_eeprom.addr];
+ spi_eeprom.buffer = SRam.data[spi_eeprom.addr];
spi_eeprom.state = READ_BYTE;
}
else
/* $C000-$FFFF (sector #3) is protected */
if (spi_eeprom.addr < 0xC000)
{
- sram.sram[spi_eeprom.addr] = spi_eeprom.buffer;
+ SRam.data[spi_eeprom.addr] = spi_eeprom.buffer;
}
break;
}
/* $8000-$FFFF (sectors #2 and #3) is protected */
if (spi_eeprom.addr < 0x8000)
{
- sram.sram[spi_eeprom.addr] = spi_eeprom.buffer;
+ SRam.data[spi_eeprom.addr] = spi_eeprom.buffer;
}
break;
}
default:
{
/* no sectors protected */
- sram.sram[spi_eeprom.addr] = spi_eeprom.buffer;
+ SRam.data[spi_eeprom.addr] = spi_eeprom.buffer;
break;
}
}
{
/* read next array byte */
spi_eeprom.addr = (spi_eeprom.addr + 1) & SIZE_MASK;
- spi_eeprom.buffer = sram.sram[spi_eeprom.addr];
+ spi_eeprom.buffer = SRam.data[spi_eeprom.addr];
}
}
}
#define _EEPROM_SPI_H_
/* Function prototypes */
-extern void eeprom_spi_init();
+extern void *eeprom_spi_init(int *size);
extern void eeprom_spi_write(unsigned char data);
extern unsigned int eeprom_spi_read(unsigned int address);
SRCS_COMMON += $(R)pico/pico/pico.c $(R)pico/pico/memory.c $(R)pico/pico/xpcm.c
# carthw
SRCS_COMMON += $(R)pico/carthw/carthw.c
+SRCS_COMMON += $(R)pico/carthw/eeprom_spi.c
# SVP
SRCS_COMMON += $(R)pico/carthw/svp/svp.c $(R)pico/carthw/svp/memory.c \
$(R)pico/carthw/svp/ssp16.c