integrate SPI EEPROM
[picodrive.git] / pico / carthw / carthw.c
CommitLineData
a12b1b29 1/*
000f5335 2 * Support for a few cart mappers and some protection.
30f0fdd4 3 * (C) notaz, 2008-2011
65ca3034 4 *
cff531af 5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
a12b1b29 7 */
8
efcba75f 9#include "../pico_int.h"
45f2f245 10#include "../memory.h"
6a47c2d4 11#include "eeprom_spi.h"
757f8dae 12
a12b1b29 13
000f5335 14/* The SSFII mapper */
30f0fdd4 15static unsigned char ssf2_banks[8];
000f5335 16
17static carthw_state_chunk carthw_ssf2_state[] =
18{
19 { CHUNK_CARTHW, sizeof(ssf2_banks), &ssf2_banks },
20 { 0, 0, NULL }
21};
22
23static void carthw_ssf2_write8(u32 a, u32 d)
24{
25 u32 target, base;
26
27 if ((a & 0xfffff0) != 0xa130f0) {
28 PicoWrite8_io(a, d);
29 return;
30 }
31
32 a &= 0x0e;
33 if (a == 0)
34 return;
35
36 ssf2_banks[a >> 1] = d;
37 base = d << 19;
38 target = a << 18;
39 if (base + 0x80000 > Pico.romsize) {
40 elprintf(EL_ANOMALY|EL_STATUS, "ssf2: missing bank @ %06x", base);
41 return;
42 }
43
44 cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
45 cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
46}
47
48static void carthw_ssf2_mem_setup(void)
49{
50 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_ssf2_write8, 1);
51}
52
53static void carthw_ssf2_statef(void)
54{
55 int i;
56 for (i = 1; i < 8; i++)
57 carthw_ssf2_write8(0xa130f0 | (i << 1), ssf2_banks[i]);
58}
59
60void carthw_ssf2_startup(void)
61{
62 int i;
63
64 elprintf(EL_STATUS, "SSF2 mapper startup");
65
66 // default map
67 for (i = 0; i < 8; i++)
68 ssf2_banks[i] = i;
69
70 PicoCartMemSetup = carthw_ssf2_mem_setup;
71 PicoLoadStateHook = carthw_ssf2_statef;
72 carthw_chunks = carthw_ssf2_state;
73}
74
75
45f2f245 76/* Common *-in-1 pirate mapper.
77 * Switches banks based on addr lines when /TIME is set.
78 * TODO: verify
79 */
80static unsigned int carthw_Xin1_baddr = 0;
757f8dae 81
45f2f245 82static void carthw_Xin1_do(u32 a, int mask, int shift)
757f8dae 83{
84 int len;
85
45f2f245 86 carthw_Xin1_baddr = a;
87 a &= mask;
88 a <<= shift;
757f8dae 89 len = Pico.romsize - a;
90 if (len <= 0) {
45f2f245 91 elprintf(EL_ANOMALY|EL_STATUS, "X-in-1: missing bank @ %06x", a);
757f8dae 92 return;
93 }
94
45f2f245 95 len = (len + M68K_BANK_MASK) & ~M68K_BANK_MASK;
96 cpu68k_map_set(m68k_read8_map, 0x000000, len - 1, Pico.rom + a, 0);
97 cpu68k_map_set(m68k_read16_map, 0x000000, len - 1, Pico.rom + a, 0);
757f8dae 98}
99
45f2f245 100static carthw_state_chunk carthw_Xin1_state[] =
757f8dae 101{
45f2f245 102 { CHUNK_CARTHW, sizeof(carthw_Xin1_baddr), &carthw_Xin1_baddr },
103 { 0, 0, NULL }
104};
105
106// TODO: test a0, reads, w16
107static void carthw_Xin1_write8(u32 a, u32 d)
108{
109 if ((a & 0xffff00) != 0xa13000) {
110 PicoWrite8_io(a, d);
111 return;
112 }
113
114 carthw_Xin1_do(a, 0x3f, 16);
757f8dae 115}
116
45f2f245 117static void carthw_Xin1_mem_setup(void)
bdec53c9 118{
45f2f245 119 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_Xin1_write8, 1);
bdec53c9 120}
121
45f2f245 122static void carthw_Xin1_reset(void)
757f8dae 123{
45f2f245 124 carthw_Xin1_write8(0xa13000, 0);
125}
757f8dae 126
45f2f245 127static void carthw_Xin1_statef(void)
128{
129 carthw_Xin1_write8(carthw_Xin1_baddr, 0);
130}
757f8dae 131
45f2f245 132void carthw_Xin1_startup(void)
133{
134 elprintf(EL_STATUS, "X-in-1 mapper startup");
757f8dae 135
45f2f245 136 PicoCartMemSetup = carthw_Xin1_mem_setup;
137 PicoResetHook = carthw_Xin1_reset;
138 PicoLoadStateHook = carthw_Xin1_statef;
139 carthw_chunks = carthw_Xin1_state;
757f8dae 140}
141
a12b1b29 142
143/* Realtec, based on TascoDLX doc
144 * http://www.sharemation.com/TascoDLX/REALTEC%20Cart%20Mapper%20-%20description%20v1.txt
145 */
146static int realtec_bank = 0x80000000, realtec_size = 0x80000000;
a12b1b29 147
45f2f245 148static void carthw_realtec_write8(u32 a, u32 d)
a12b1b29 149{
150 int i, bank_old = realtec_bank, size_old = realtec_size;
151
152 if (a == 0x400000)
153 {
154 realtec_bank &= 0x0e0000;
155 realtec_bank |= 0x300000 & (d << 19);
156 if (realtec_bank != bank_old)
157 elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
158 }
159 else if (a == 0x402000)
160 {
161 realtec_size = (d << 17) & 0x3e0000;
162 if (realtec_size != size_old)
163 elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
164 }
165 else if (a == 0x404000)
166 {
167 realtec_bank &= 0x300000;
168 realtec_bank |= 0x0e0000 & (d << 17);
169 if (realtec_bank != bank_old)
170 elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
171 }
172 else
173 elprintf(EL_ANOMALY, "realtec: unexpected write [%06x] %02x @ %06x", a, d, SekPc);
65ca3034 174
a12b1b29 175 if (realtec_bank >= 0 && realtec_size >= 0 &&
176 (realtec_bank != bank_old || realtec_size != size_old))
177 {
178 elprintf(EL_ANOMALY, "realtec: new bank %06x, size %06x", realtec_bank, realtec_size, SekPc);
45f2f245 179 if (realtec_size > Pico.romsize - realtec_bank)
a12b1b29 180 {
181 elprintf(EL_ANOMALY, "realtec: bank too large / out of range?");
182 return;
183 }
184
45f2f245 185 for (i = 0; i < 0x400000; i += realtec_size) {
186 cpu68k_map_set(m68k_read8_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
187 cpu68k_map_set(m68k_read16_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
188 }
a12b1b29 189 }
190}
191
0b35350d 192static void carthw_realtec_reset(void)
a12b1b29 193{
194 int i;
45f2f245 195
a12b1b29 196 /* map boot code */
45f2f245 197 for (i = 0; i < 0x400000; i += M68K_BANK_SIZE) {
198 cpu68k_map_set(m68k_read8_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
199 cpu68k_map_set(m68k_read16_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
200 }
201 cpu68k_map_set(m68k_write8_map, 0x400000, 0x400000 + M68K_BANK_SIZE - 1, carthw_realtec_write8, 1);
a12b1b29 202 realtec_bank = realtec_size = 0x80000000;
203}
204
205void carthw_realtec_startup(void)
206{
45f2f245 207 int i;
a12b1b29 208
45f2f245 209 elprintf(EL_STATUS, "Realtec mapper startup");
a12b1b29 210
45f2f245 211 // allocate additional bank for boot code
212 // (we know those ROMs have aligned size)
a736af3e 213 i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
214 if (i != 0) {
a12b1b29 215 elprintf(EL_STATUS, "OOM");
216 return;
217 }
a12b1b29 218
45f2f245 219 // create bank for boot code
220 for (i = 0; i < M68K_BANK_SIZE; i += 0x2000)
221 memcpy(Pico.rom + Pico.romsize + i, Pico.rom + Pico.romsize - 0x2000, 0x2000);
222
a12b1b29 223 PicoResetHook = carthw_realtec_reset;
224}
225
0b35350d 226/* Radica mapper, based on DevSter's info
227 * http://devster.monkeeh.com/sega/radica/
45f2f245 228 * XXX: mostly the same as X-in-1, merge?
0b35350d 229 */
45f2f245 230static u32 carthw_radica_read16(u32 a)
0b35350d 231{
45f2f245 232 if ((a & 0xffff00) != 0xa13000)
233 return PicoRead16_io(a);
0b35350d 234
45f2f245 235 carthw_Xin1_do(a, 0x7e, 15);
0b35350d 236
237 return 0;
238}
239
45f2f245 240static void carthw_radica_mem_setup(void)
241{
242 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, carthw_radica_read16, 1);
243}
244
0b35350d 245static void carthw_radica_statef(void)
246{
45f2f245 247 carthw_radica_read16(carthw_Xin1_baddr);
0b35350d 248}
249
250static void carthw_radica_reset(void)
251{
45f2f245 252 carthw_radica_read16(0xa13000);
0b35350d 253}
254
255void carthw_radica_startup(void)
256{
45f2f245 257 elprintf(EL_STATUS, "Radica mapper startup");
0b35350d 258
45f2f245 259 PicoCartMemSetup = carthw_radica_mem_setup;
260 PicoResetHook = carthw_radica_reset;
0b35350d 261 PicoLoadStateHook = carthw_radica_statef;
45f2f245 262 carthw_chunks = carthw_Xin1_state;
0b35350d 263}
264
30f0fdd4 265
266/* Pier Solar. Based on my own research */
267static unsigned char pier_regs[8];
268static unsigned char pier_dump_prot;
269
270static carthw_state_chunk carthw_pier_state[] =
271{
272 { CHUNK_CARTHW, sizeof(pier_regs), pier_regs },
273 { CHUNK_CARTHW + 1, sizeof(pier_dump_prot), &pier_dump_prot },
6a47c2d4 274 { CHUNK_CARTHW + 2, 0, NULL }, // filled later
30f0fdd4 275 { 0, 0, NULL }
276};
277
278static void carthw_pier_write8(u32 a, u32 d)
279{
280 u32 a8, target, base;
281
282 if ((a & 0xffff00) != 0xa13000) {
283 PicoWrite8_io(a, d);
284 return;
285 }
286
287 a8 = a & 0x0f;
288 pier_regs[a8 / 2] = d;
289
290 elprintf(EL_UIO, "pier w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
291 switch (a8) {
292 case 0x01:
293 break;
294 case 0x03:
295 if (!(pier_regs[0] & 2))
296 goto unmapped;
297 target = 0x280000;
298 base = d << 19;
299 goto do_map;
300 case 0x05:
301 if (!(pier_regs[0] & 2))
302 goto unmapped;
303 target = 0x300000;
304 base = d << 19;
305 goto do_map;
306 case 0x07:
307 if (!(pier_regs[0] & 2))
308 goto unmapped;
309 target = 0x380000;
310 base = d << 19;
311 goto do_map;
312 case 0x09:
6a47c2d4 313 SRam.changed = 1;
314 eeprom_spi_write(d);
30f0fdd4 315 break;
316 case 0x0b:
317 // eeprom read
318 default:
319 unmapped:
320 //elprintf(EL_UIO, "pier w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
321 elprintf(EL_STATUS, "-- unmapped w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
322 break;
323 }
324 return;
325
326do_map:
327 if (base + 0x80000 > Pico.romsize) {
328 elprintf(EL_ANOMALY|EL_STATUS, "pier: missing bank @ %06x", base);
329 return;
330 }
331 cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
332 cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
333}
334
335static void carthw_pier_write16(u32 a, u32 d)
336{
337 if ((a & 0xffff00) != 0xa13000) {
338 PicoWrite16_io(a, d);
339 return;
340 }
341
342 elprintf(EL_UIO, "pier w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
343 carthw_pier_write8(a + 1, d);
344}
345
346static u32 carthw_pier_read8(u32 a)
347{
348 if ((a & 0xffff00) != 0xa13000)
349 return PicoRead8_io(a);
350
351 if (a == 0xa1300b)
6a47c2d4 352 return eeprom_spi_read(a);
30f0fdd4 353
354 elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
355 return 0;
356}
357
358static void carthw_pier_statef(void);
359
360static u32 carthw_pier_prot_read8(u32 a)
361{
362 /* it takes more than just these reads here to disable ROM protection,
363 * but for game emulation purposes this is enough. */
364 if (pier_dump_prot > 0)
365 pier_dump_prot--;
366 if (pier_dump_prot == 0) {
367 carthw_pier_statef();
368 elprintf(EL_STATUS, "prot off on r8 @%06x", SekPc);
369 }
370 elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
371
372 return Pico.rom[(a & 0x7fff) ^ 1];
373}
374
375static void carthw_pier_mem_setup(void)
376{
377 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_pier_write8, 1);
378 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, carthw_pier_write16, 1);
379 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, carthw_pier_read8, 1);
380}
381
382static void carthw_pier_prot_mem_setup(int prot_enable)
383{
384 if (prot_enable) {
385 /* the dump protection.. */
386 int a;
387 for (a = 0x000000; a < 0x400000; a += M68K_BANK_SIZE) {
388 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
389 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
390 }
391 cpu68k_map_set(m68k_read8_map, M68K_BANK_SIZE, M68K_BANK_SIZE * 2 - 1,
392 carthw_pier_prot_read8, 1);
393 }
394 else {
395 cpu68k_map_set(m68k_read8_map, 0, 0x27ffff, Pico.rom, 0);
396 cpu68k_map_set(m68k_read16_map, 0, 0x27ffff, Pico.rom, 0);
397 }
398}
399
400static void carthw_pier_statef(void)
401{
402 carthw_pier_prot_mem_setup(pier_dump_prot);
403
404 if (!pier_dump_prot) {
405 /* setup all banks */
406 u32 r0 = pier_regs[0];
407 carthw_pier_write8(0xa13001, 3);
408 carthw_pier_write8(0xa13003, pier_regs[1]);
409 carthw_pier_write8(0xa13005, pier_regs[2]);
410 carthw_pier_write8(0xa13007, pier_regs[3]);
411 carthw_pier_write8(0xa13001, r0);
412 }
413}
414
415static void carthw_pier_reset(void)
416{
417 pier_regs[0] = 1;
418 pier_regs[1] = pier_regs[2] = pier_regs[3] = 0;
419 pier_dump_prot = 3;
420 carthw_pier_statef();
6a47c2d4 421 eeprom_spi_init(NULL);
30f0fdd4 422}
423
424void carthw_pier_startup(void)
425{
6a47c2d4 426 void *eeprom_state;
427 int eeprom_size = 0;
30f0fdd4 428 int i;
429
430 elprintf(EL_STATUS, "Pier Solar mapper startup");
431
432 // mostly same as for realtec..
433 i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
434 if (i != 0) {
435 elprintf(EL_STATUS, "OOM");
436 return;
437 }
438
439 // create dump protection bank
440 for (i = 0; i < M68K_BANK_SIZE; i += 0x8000)
441 memcpy(Pico.rom + Pico.romsize + i, Pico.rom, 0x8000);
442
6a47c2d4 443 // save EEPROM
444 eeprom_state = eeprom_spi_init(&eeprom_size);
445 SRam.flags = 0;
446 SRam.size = 0x10000;
447 SRam.data = calloc(1, SRam.size);
448 if (!SRam.data)
449 SRam.size = 0;
450 carthw_pier_state[2].ptr = eeprom_state;
451 carthw_pier_state[2].size = eeprom_size;
452
30f0fdd4 453 PicoCartMemSetup = carthw_pier_mem_setup;
454 PicoResetHook = carthw_pier_reset;
455 PicoLoadStateHook = carthw_pier_statef;
456 carthw_chunks = carthw_pier_state;
457}
458
000f5335 459/* Simple unlicensed ROM protection emulation */
460static struct {
30f0fdd4 461 u32 addr;
462 u32 mask;
463 u16 val;
464 u16 readonly;
000f5335 465} *sprot_items;
466static int sprot_item_alloc;
467static int sprot_item_count;
468
469static u16 *carthw_sprot_get_val(u32 a, int rw_only)
470{
30f0fdd4 471 int i;
472
473 for (i = 0; i < sprot_item_count; i++)
474 if ((a & sprot_items[i].mask) == sprot_items[i].addr)
475 if (!rw_only || !sprot_items[i].readonly)
476 return &sprot_items[i].val;
000f5335 477
30f0fdd4 478 return NULL;
000f5335 479}
480
481static u32 PicoRead8_sprot(u32 a)
482{
483 u16 *val;
484 u32 d;
485
486 if (0xa10000 <= a && a < 0xa12000)
487 return PicoRead8_io(a);
488
489 val = carthw_sprot_get_val(a, 0);
490 if (val != NULL) {
491 d = *val;
492 if (!(a & 1))
493 d >>= 8;
494 elprintf(EL_UIO, "prot r8 [%06x] %02x @%06x", a, d, SekPc);
495 return d;
496 }
497 else {
498 elprintf(EL_UIO, "prot r8 [%06x] MISS @%06x", a, SekPc);
499 return 0;
500 }
501}
502
503static u32 PicoRead16_sprot(u32 a)
504{
505 u16 *val;
506
507 if (0xa10000 <= a && a < 0xa12000)
508 return PicoRead16_io(a);
509
510 val = carthw_sprot_get_val(a, 0);
511 if (val != NULL) {
512 elprintf(EL_UIO, "prot r16 [%06x] %04x @%06x", a, *val, SekPc);
513 return *val;
514 }
515 else {
516 elprintf(EL_UIO, "prot r16 [%06x] MISS @%06x", a, SekPc);
517 return 0;
518 }
519}
520
521static void PicoWrite8_sprot(u32 a, u32 d)
522{
523 u16 *val;
524
525 if (0xa10000 <= a && a < 0xa12000) {
526 PicoWrite8_io(a, d);
527 return;
528 }
529
530 val = carthw_sprot_get_val(a, 1);
531 if (val != NULL) {
532 if (a & 1)
533 *val = (*val & 0xff00) | (d | 0xff);
534 else
535 *val = (*val & 0x00ff) | (d << 8);
536 elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
537 }
538 else
539 elprintf(EL_UIO, "prot w8 [%06x] %02x MISS @%06x", a, d & 0xff, SekPc);
540}
541
542static void PicoWrite16_sprot(u32 a, u32 d)
543{
544 u16 *val;
545
546 if (0xa10000 <= a && a < 0xa12000) {
547 PicoWrite16_io(a, d);
548 return;
549 }
550
551 val = carthw_sprot_get_val(a, 1);
552 if (val != NULL) {
553 *val = d;
554 elprintf(EL_UIO, "prot w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
555 }
556 else
557 elprintf(EL_UIO, "prot w16 [%06x] %04x MISS @%06x", a, d & 0xffff, SekPc);
558}
559
560void carthw_sprot_new_location(unsigned int a, unsigned int mask, unsigned short val, int is_ro)
561{
562 if (sprot_items == NULL) {
563 sprot_items = calloc(8, sizeof(sprot_items[0]));
564 sprot_item_alloc = 8;
565 sprot_item_count = 0;
566 }
567
568 if (sprot_item_count == sprot_item_alloc) {
569 void *tmp;
570 sprot_item_alloc *= 2;
571 tmp = realloc(sprot_items, sprot_item_alloc);
572 if (tmp == NULL) {
573 elprintf(EL_STATUS, "OOM");
574 return;
575 }
576 sprot_items = tmp;
577 }
578
579 sprot_items[sprot_item_count].addr = a;
580 sprot_items[sprot_item_count].mask = mask;
581 sprot_items[sprot_item_count].val = val;
582 sprot_items[sprot_item_count].readonly = is_ro;
583 sprot_item_count++;
584}
585
586static void carthw_sprot_unload(void)
587{
588 free(sprot_items);
589 sprot_items = NULL;
590 sprot_item_count = sprot_item_alloc = 0;
591}
592
593static void carthw_sprot_mem_setup(void)
594{
595 int start;
596
597 // map ROM - 0x7fffff, /TIME areas (which are tipically used)
598 start = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
599 cpu68k_map_set(m68k_read8_map, start, 0x7fffff, PicoRead8_sprot, 1);
600 cpu68k_map_set(m68k_read16_map, start, 0x7fffff, PicoRead16_sprot, 1);
601 cpu68k_map_set(m68k_write8_map, start, 0x7fffff, PicoWrite8_sprot, 1);
602 cpu68k_map_set(m68k_write16_map, start, 0x7fffff, PicoWrite16_sprot, 1);
603
604 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_sprot, 1);
605 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_sprot, 1);
606 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_sprot, 1);
607 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_sprot, 1);
608}
609
610void carthw_sprot_startup(void)
611{
612 elprintf(EL_STATUS, "Prot emu startup");
613
614 PicoCartMemSetup = carthw_sprot_mem_setup;
615 PicoCartUnloadHook = carthw_sprot_unload;
616}
617
618/* Protection emulation for Lion King 3. Credits go to Haze */
619static u8 prot_lk3_cmd, prot_lk3_data;
620
621static u32 PicoRead8_plk3(u32 a)
622{
623 u32 d = 0;
624 switch (prot_lk3_cmd) {
625 case 1: d = prot_lk3_data >> 1; break;
626 case 2: // nibble rotate
627 d = ((prot_lk3_data >> 4) | (prot_lk3_data << 4)) & 0xff;
628 break;
629 case 3: // bit rotate
630 d = prot_lk3_data;
631 d = (d >> 4) | (d << 4);
632 d = ((d & 0xcc) >> 2) | ((d & 0x33) << 2);
633 d = ((d & 0xaa) >> 1) | ((d & 0x55) << 1);
634 break;
635/* Top Fighter 2000 MK VIII (Unl)
636 case 0x98: d = 0x50; break; // prot_lk3_data == a8 here
637 case 0x67: d = 0xde; break; // prot_lk3_data == 7b here (rot!)
638 case 0xb5: d = 0x9f; break; // prot_lk3_data == 4a
639*/
640 default:
641 elprintf(EL_UIO, "unhandled prot cmd %02x @%06x", prot_lk3_cmd, SekPc);
642 break;
643 }
644
645 elprintf(EL_UIO, "prot r8 [%06x] %02x @%06x", a, d, SekPc);
646 return d;
647}
648
649static void PicoWrite8_plk3p(u32 a, u32 d)
650{
651 elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
652 if (a & 2)
653 prot_lk3_cmd = d;
654 else
655 prot_lk3_data = d;
656}
657
658static void PicoWrite8_plk3b(u32 a, u32 d)
659{
660 int addr;
661
662 elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
663 addr = d << 15;
664 if (addr + 0x8000 > Pico.romsize) {
665 elprintf(EL_UIO|EL_ANOMALY, "prot_lk3: bank too large: %02x", d);
666 return;
667 }
668 if (addr == 0)
669 memcpy(Pico.rom, Pico.rom + Pico.romsize, 0x8000);
670 else
671 memcpy(Pico.rom, Pico.rom + addr, 0x8000);
672}
673
674static void carthw_prot_lk3_mem_setup(void)
675{
676 cpu68k_map_set(m68k_read8_map, 0x600000, 0x7fffff, PicoRead8_plk3, 1);
677 cpu68k_map_set(m68k_write8_map, 0x600000, 0x6fffff, PicoWrite8_plk3p, 1);
678 cpu68k_map_set(m68k_write8_map, 0x700000, 0x7fffff, PicoWrite8_plk3b, 1);
679}
680
681void carthw_prot_lk3_startup(void)
682{
a736af3e 683 int ret;
000f5335 684
685 elprintf(EL_STATUS, "lk3 prot emu startup");
686
687 // allocate space for bank0 backup
a736af3e 688 ret = PicoCartResize(Pico.romsize + 0x8000);
689 if (ret != 0) {
000f5335 690 elprintf(EL_STATUS, "OOM");
691 return;
692 }
000f5335 693 memcpy(Pico.rom + Pico.romsize, Pico.rom, 0x8000);
694
695 PicoCartMemSetup = carthw_prot_lk3_mem_setup;
696}
697
6a47c2d4 698// vim:ts=2:sw=2:expandtab