drc: adjust timing hacks

also drop the difference from other cpu cores
libretro/pcsx_rearmed#858
notaz/pcsx_rearmed#349

diff --git a/libpcsxcore/cdrom.c b/libpcsxcore/cdrom.c
index 9e201eb..0856e15 100644 (file)
--- a/libpcsxcore/cdrom.c
+++ b/libpcsxcore/cdrom.c
@@ -1322,6 +1322,7 @@ static void cdrReadInterruptSetResult(unsigned char result)
                        cdr.CmdInProgress, cdr.IrqStat);
                cdr.Irq1Pending = result;
                // F1 2000 timing hack :(
+               // compensate for some csum func @80014380 taking too long
                psxRegs.intCycle[PSXINT_CDREAD].sCycle += cdReadTime / 10;
                return;
        }

diff --git a/libpcsxcore/database.c b/libpcsxcore/database.c
index 35d0041..33acc07 100644 (file)
--- a/libpcsxcore/database.c
+++ b/libpcsxcore/database.c
@@ -139,9 +139,11 @@ cycle_multiplier_overrides[] =
        { 310, { "SLUS01114", "SLES03286" } },
        /* Syphon Filter - reportedly hangs under unknown conditions */
        { 169, { "SCUS94240" } },
+#ifndef DRC_DISABLE
        /* Psychic Detective - some weird race condition in the game's cdrom code */
-       { 200, { "SLUS00165", "SLUS00166", "SLUS00167" } },
-       { 200, { "SLES00070", "SLES10070", "SLES20070" } },
+       { 181, { "SLUS00165", "SLUS00166", "SLUS00167" } },
+       { 181, { "SLES00070", "SLES10070", "SLES20070" } },
+#endif
        /* Vib-Ribbon - cd timing issues (PAL+ari64drc only?) */
        { 200, { "SCES02873" } },
        /* Zero Divide - sometimes too fast */

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index cc72e7a..4052f74 100644 (file)
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -6446,10 +6446,11 @@ static u_int *get_source_start(u_int addr, u_int *limit)
     /* (0x9fc00000 <= addr && addr < 0x9fc80000) ||*/
     (0xbfc00000 <= addr && addr < 0xbfc80000))
   {
-    // BIOS. The multiplier should be much higher as it's uncached 8bit mem,
-    // but timings in PCSX are too tied to the interpreter's 2-per-insn assumption
-    if (!HACK_ENABLED(NDHACK_OVERRIDE_CYCLE_M))
-      cycle_multiplier_active = 200;
+    // BIOS. The multiplier should be much higher as it's uncached 8bit mem
+    // XXX: disabled as this introduces differences from the interpreter
+    // and lightrec multipliers making emu variations act inconsistently
+    //if (!HACK_ENABLED(NDHACK_OVERRIDE_CYCLE_M))
+    //  cycle_multiplier_active = 200;
 
     *limit = (addr & 0xfff00000) | 0x80000;
     return (u_int *)((u_char *)psxR + (addr&0x7ffff));
@@ -6616,6 +6617,12 @@ static int apply_hacks(void)
       dops[i + 3].itype = NOP;
     }
   }
+  if (source[0] == 0x3c05edb8 && source[1] == 0x34a58320)
+  {
+    // lui a1, 0xEDB8; ori a1, 0x8320
+    SysPrintf("F1 2000 hack @%08x\n", start);
+    cycle_multiplier_active = 100;
+  }
   i = slen;
   if (i > 10 && source[i-1] == 0 && source[i-2] == 0x03e00008
       && source[i-4] == 0x8fbf0018 && source[i-6] == 0x00c0f809