#include "cd/cd_sys.h"\r
#include "cd/LC89510.h"\r
\r
+struct mcd_misc\r
+{\r
+ unsigned short hint_vector;\r
+ unsigned char busreq;\r
+ unsigned char pad0;\r
+\r
+};\r
+\r
typedef struct\r
{\r
unsigned char bios[0x20000];\r
};\r
unsigned char word_ram[0x40000];\r
unsigned char s68k_regs[0x200];\r
- unsigned char m68k_regs[0x10];\r
CDD cdd;\r
CDC cdc;\r
_scd scd;\r
+ struct mcd_misc m;\r
} mcd_state;\r
\r
#define Pico_mcd ((mcd_state *)Pico.rom)\r
\r
#include "../PicoInt.h"\r
\r
-#define cdprintf printf\r
+#define cdprintf dprintf\r
//#define cdprintf(x...)\r
\r
\r
#define CDC_DMA_SPEED 256\r
\r
-int CDC_Decode_Reg_Read;\r
-static int Status_CDC; // internal status (TODO: 2 context?)\r
+int CDC_Decode_Reg_Read; // 2 context?\r
\r
\r
static void CDD_Reset(void)\r
Pico_mcd->cdc.CTRL.N = 0;\r
\r
CDC_Decode_Reg_Read = 0;\r
- Status_CDC = 0;\r
+ Pico_mcd->scd.Status_CDC &= ~0x08;\r
}\r
\r
\r
if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
{\r
length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
- Status_CDC &= ~0x08; // Last transfer\r
+ Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
\r
length <<= 1;\r
Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
- if (Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
+ if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
else Pico_mcd->cdc.DBC.N = 0;\r
}\r
\r
{\r
int addr;\r
\r
- if (!(Status_CDC & 0x08))\r
+ if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
{\r
// Transfer data disabled\r
+ cdprintf("Read_CDC_Host: Transfer data disabled");\r
return 0;\r
}\r
\r
(!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
{\r
// Wrong setting\r
+ cdprintf("Read_CDC_Host: Wrong setting");\r
return 0;\r
}\r
\r
if (Pico_mcd->cdc.DBC.N <= 0)\r
{\r
Pico_mcd->cdc.DBC.N = 0;\r
- Status_CDC &= ~0x08; // Last transfer\r
+ Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
SekInterruptS68k(5);\r
}\r
\r
- cdprintf("CDC - DTE interrupt\n");\r
+ cdprintf("CDC - DTE interrupt");\r
}\r
}\r
\r
addr = Pico_mcd->cdc.DAC.N;\r
Pico_mcd->cdc.DAC.N += 2;\r
+\r
+ cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
+ (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
+\r
return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
\r
#if 0\r
{\r
unsigned char ret;\r
\r
- cdprintf("CDC read reg %.2d = ", Pico_mcd->s68k_regs[5] & 0xF);\r
-\r
switch(Pico_mcd->s68k_regs[5] & 0xF)\r
{\r
case 0x0: // COMIN\r
- cdprintf("%.2X\n", Pico_mcd->cdc.COMIN);\r
+ cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
\r
Pico_mcd->s68k_regs[5] = 0x1;\r
return Pico_mcd->cdc.COMIN;\r
\r
case 0x1: // IFSTAT\r
- cdprintf("%.2X\n", Pico_mcd->cdc.IFSTAT);\r
+ cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
\r
CDC_Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x2;\r
return Pico_mcd->cdc.IFSTAT;\r
\r
case 0x2: // DBCL\r
- cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.L);\r
+ cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
\r
Pico_mcd->s68k_regs[5] = 0x3;\r
return Pico_mcd->cdc.DBC.B.L;\r
\r
case 0x3: // DBCH\r
- cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.H);\r
+ cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
\r
Pico_mcd->s68k_regs[5] = 0x4;\r
return Pico_mcd->cdc.DBC.B.H;\r
\r
case 0x4: // HEAD0\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B0);\r
+ cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
\r
CDC_Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x5;\r
return Pico_mcd->cdc.HEAD.B.B0;\r
\r
case 0x5: // HEAD1\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B1);\r
+ cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
\r
CDC_Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x6;\r
return Pico_mcd->cdc.HEAD.B.B1;\r
\r
case 0x6: // HEAD2\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B2);\r
+ cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
\r
CDC_Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x7;\r
return Pico_mcd->cdc.HEAD.B.B2;\r
\r
case 0x7: // HEAD3\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B3);\r
+ cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
\r
CDC_Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x8;\r
return Pico_mcd->cdc.HEAD.B.B3;\r
\r
case 0x8: // PTL\r
- cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.L);\r
+ cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
\r
CDC_Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x9;\r
return Pico_mcd->cdc.PT.B.L;\r
\r
case 0x9: // PTH\r
- cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.H);\r
+ cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
\r
CDC_Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xA;\r
return Pico_mcd->cdc.PT.B.H;\r
\r
case 0xA: // WAL\r
- cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.L);\r
+ cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
\r
Pico_mcd->s68k_regs[5] = 0xB;\r
return Pico_mcd->cdc.WA.B.L;\r
\r
case 0xB: // WAH\r
- cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.H);\r
+ cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
\r
Pico_mcd->s68k_regs[5] = 0xC;\r
return Pico_mcd->cdc.WA.B.H;\r
\r
case 0xC: // STAT0\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B0);\r
+ cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
\r
CDC_Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xD;\r
return Pico_mcd->cdc.STAT.B.B0;\r
\r
case 0xD: // STAT1\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B1);\r
+ cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
\r
CDC_Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xE;\r
return Pico_mcd->cdc.STAT.B.B1;\r
\r
case 0xE: // STAT2\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B2);\r
+ cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
\r
CDC_Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xF;\r
return Pico_mcd->cdc.STAT.B.B2;\r
\r
case 0xF: // STAT3\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B3);\r
+ cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
\r
ret = Pico_mcd->cdc.STAT.B.B3;\r
Pico_mcd->cdc.IFSTAT |= 0x20; // decoding interrupt flag cleared\r
\r
void CDC_Write_Reg(unsigned char Data)\r
{\r
- cdprintf("CDC write reg%d = %.2X\n", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
+ cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
\r
switch (Pico_mcd->s68k_regs[5] & 0xF)\r
{\r
if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer\r
{\r
Pico_mcd->cdc.DBC.N = 0;\r
- Status_CDC &= ~0x08;\r
+ Pico_mcd->scd.Status_CDC &= ~0x08;\r
Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
}\r
break;\r
if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?\r
{\r
Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress\r
- Status_CDC |= 0x08; // Data transfer in progress\r
+ Pico_mcd->scd.Status_CDC |= 0x08; // Data transfer in progress\r
Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start\r
\r
- cdprintf("\n************** Starting Data Transfer ***********\n");\r
+ cdprintf("************** Starting Data Transfer ***********");\r
cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, Pico_mcd->cdc.DMA_Adr);\r
}\r
SekInterruptS68k(4);\r
}\r
\r
- cdprintf("CDD exported status\n");\r
- cdprintf("Status =%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r
+// cdprintf("CDD exported status\n");\r
+ cdprintf("out: Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
(Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
(Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
(Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
\r
void CDD_Import_Command(void)\r
{\r
- cdprintf("CDD importing command\n");\r
- cdprintf("Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r
+// cdprintf("CDD importing command\n");\r
+ cdprintf("in: Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
(Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
(Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
(Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
\r
//#define __debug_io\r
//#define __debug_io2\r
+#define rdprintf dprintf\r
\r
// -----------------------------------------------------------------\r
\r
\r
switch (a) {\r
case 0:\r
- d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m68k_regs[1]; // here IFL2 is always 0, just like in Gens\r
+ d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
goto end;\r
+ case 4:\r
+ d = Pico_mcd->s68k_regs[4]<<8;\r
+ goto end;\r
+ case 6:\r
+ d = Pico_mcd->m.hint_vector;\r
+ goto end;\r
case 8:\r
dprintf("m68k host data read");\r
d = Read_CDC_Host(0);\r
goto end;\r
+ case 0xA:\r
+ dprintf("m68k reserved read");\r
+ goto end;\r
case 0xC:\r
dprintf("m68k stopwatch read");\r
break;\r
}\r
\r
- if (a < 0xE) {\r
- d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1];\r
- goto end;\r
- }\r
-\r
if (a < 0x30) {\r
// comm flag/cmd/status (0xE-0x2F)\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
case 0:\r
d &= 1;\r
if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
- break;\r
+ return;\r
case 1:\r
d &= 3;\r
if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset\r
- if ( (Pico_mcd->m68k_regs[1]&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
- if ( (Pico_mcd->m68k_regs[1]&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
- if (/*!(Pico_mcd->m68k_regs[1]&1) &&*/ (PicoMCD&2) && (d&3)==1) {\r
+ if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
+ if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
+ if ((PicoMCD&2) && (d&3)==1) {\r
SekResetS68k(); // S68k comes out of RESET or BRQ state\r
PicoMCD&=~2;\r
dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
}\r
- break;\r
+ Pico_mcd->m.busreq = d;\r
+ return;\r
case 2:\r
Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
return;\r
if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
return;\r
+ case 6:\r
+ *((char *)&Pico_mcd->m.hint_vector+1) = d;\r
+ return;\r
+ case 7:\r
+ *(char *)&Pico_mcd->m.hint_vector = d;\r
+ return;\r
case 0xe:\r
//dprintf("m68k: comm flag: %02x", d);\r
\r
//dprintf("s68k @ %06x", SekPcS68k);\r
\r
Pico_mcd->s68k_regs[0xe] = d;\r
- break;\r
- }\r
-\r
- if (a < 0x10) {\r
- Pico_mcd->m68k_regs[a] = (u8) d;\r
- return;\r
+ return;\r
}\r
\r
if ((a&0xf0) == 0x10) {\r
return;\r
}\r
\r
- if (a >= 0x20 || (a >= 0xa && a <= 0xd) || a == 0x0f)\r
- dprintf("m68k: invalid write?");\r
+ dprintf("m68k: invalid write? [%02x] %02x", a, d);\r
}\r
\r
\r
\r
switch (a) {\r
case 0:\r
- d = 1; goto end; // ver = 0, not in reset state\r
+ d = 1; // ver = 0, not in reset state\r
+ goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
return;\r
case 5:\r
- dprintf("s68k CDC reg addr: %x", d&0xf);\r
+ //dprintf("s68k CDC reg addr: %x", d&0xf);\r
break;\r
case 7:\r
CDC_Write_Reg(d);\r
\r
if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
\r
d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("ret = %02x", (u8)d);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %02x", (u8)d);\r
\r
end:\r
\r
goto end;\r
}\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
\r
d = (u16)OtherRead16(a, 16);\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("ret = %04x", d);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %04x", d);\r
\r
end:\r
\r
goto end;\r
}\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
\r
d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("ret = %08x", d);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %08x", d);\r
\r
end:\r
#ifdef __debug_io\r
return;\r
}\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite8(a,d,8);\r
}\r
return;\r
}\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite16(a,d);\r
}\r
return;\r
}\r
\r
- //if ((a&0xffffc0)==0xa12000)\r
- // dprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- //dprintf("s68k_regs r8: [%02x] @ %06x", a&0x1ff, SekPcS68k);\r
+ rdprintf("s68k_regs r8: [%02x] @ %06x", a&0x1ff, SekPcS68k);\r
d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
- //dprintf("ret = %02x", (u8)d);\r
+ rdprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- //dprintf("s68k_regs r16: [%02x] @ %06x", a&0x1fe, SekPcS68k);\r
+ rdprintf("s68k_regs r16: [%02x] @ %06x", a&0x1fe, SekPcS68k);\r
d = s68k_reg_read16(a, 16);\r
- //dprintf("ret = %04x", d);\r
+ rdprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- //dprintf("s68k_regs r32: [%02x] @ %06x", a&0x1fe, SekPcS68k);\r
+ rdprintf("s68k_regs r32: [%02x] @ %06x", a&0x1fe, SekPcS68k);\r
d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);\r
- //dprintf("ret = %08x", d);\r
+ rdprintf("ret = %08x", d);\r
goto end;\r
}\r
\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- //dprintf("s68k_regs w8: [%02x] %02x @ %06x", a&0x1ff, d, SekPcS68k);\r
+ rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a&0x1ff, d, SekPcS68k);\r
s68k_reg_write8(a,d,8);\r
return;\r
}\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- //dprintf("s68k_regs w16: [%02x] %04x @ %06x", a&0x1ff, d, SekPcS68k);\r
+ rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a&0x1ff, d, SekPcS68k);\r
s68k_reg_write8(a, d>>8, 16);\r
s68k_reg_write8(a+1,d&0xff, 16);\r
return;\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- //dprintf("s68k_regs w32: [%02x] %08x @ %06x", a&0x1ff, d, SekPcS68k);\r
+ rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a&0x1ff, d, SekPcS68k);\r
s68k_reg_write8(a, d>>24, 32);\r
s68k_reg_write8(a+1,(d>>16)&0xff, 32);\r
s68k_reg_write8(a+2,(d>>8) &0xff, 32);\r
#endif
}
-static int Status_CDC;
-
static __inline void check_cd_dma(void)
{
int ddx;
- if (!(Status_CDC & 0x08)) return;
+ if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
ddx = Pico_mcd->s68k_regs[4] & 7;
if (ddx < 2) return; // invalid
- if (ddx < 4) Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
+ if (ddx < 4) {
+ Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
+ return;
+ }
if (ddx == 6) return; // invalid
Update_CDC_TRansfer(ddx); // now go and do the actual transfer
//dprintf("m68k starting exec @ %06x", SekPc);
if(Pico.m.dma_bytes) SekCycleCnt+=CheckDMA();
SekRun(cycles_68k);
- if ((Pico_mcd->m68k_regs[1]&3) == 1) { // no busreq/no reset
+ if ((Pico_mcd->m.busreq&3) == 1) { // no busreq/no reset
#if 0
int i;
FILE *f = fopen("prg_ram.bin", "wb");
#include "../PicoInt.h"
-#define cdprintf printf
+#define cdprintf dprintf
//#define cdprintf(x...)
+#define DEBUG_CD
struct _file_track Tracks[100];
char Track_Played;
SCD_TOC_Tracks[0].MSF.S = 2;
SCD_TOC_Tracks[0].MSF.F = 0;
- cdprintf("\nTrack 0 - %02d:%02d:%02d %s\n", SCD_TOC_Tracks[0].MSF.M, SCD_TOC_Tracks[0].MSF.S, SCD_TOC_Tracks[0].MSF.F,
+ cdprintf("Track 0 - %02d:%02d:%02d %s", SCD_TOC_Tracks[0].MSF.M, SCD_TOC_Tracks[0].MSF.S, SCD_TOC_Tracks[0].MSF.F,
SCD_TOC_Tracks[0].Type ? "DATA" : "AUDIO");
Cur_LBA = Tracks[0].Lenght; // Size in sectors
LBA_to_MSF(Cur_LBA, &(SCD_TOC_Tracks[index].MSF));
- cdprintf("\nTrack %i - %02d:%02d:%02d %s\n", index, SCD_TOC_Tracks[index].MSF.M,
+ cdprintf("Track %i - %02d:%02d:%02d %s", index, SCD_TOC_Tracks[index].MSF.M,
SCD_TOC_Tracks[index].MSF.S, SCD_TOC_Tracks[index].MSF.F,
SCD_TOC_Tracks[index].Type ? "DATA" : "AUDIO");
fseek(Tracks[0].F, where_read, SEEK_SET);
fread(cp_buf, 1, 2048, Tracks[0].F);
- cdprintf("\n\nRead file CDC 1 data sector :\n");
+ cdprintf("Read file CDC 1 data sector :\n");
}
else // AUDIO
{
// Write_CD_Audio((short *) cp_buf, rate, channel, 588);
}
- cdprintf("\n\nRead file CDC 1 audio sector :\n");
+ cdprintf("Read file CDC 1 audio sector :\n");
}
// Update CDC stuff
memcpy(&Pico_mcd->cdc.Buffer[Pico_mcd->cdc.PT.N], &Pico_mcd->cdc.HEAD, 4);
#ifdef DEBUG_CD
- cdprintf("\nRead -> WA = %d Buffer[%d] =\n", Pico_mcd->cdc.WA.N, Pico_mcd->cdc.PT.N & 0x3FFF);
- cdprintf("Header 1 = %.2X %.2X %.2X %.2X\n", Pico_mcd->cdc.HEAD.B.B0,
+ cdprintf("Read -> WA = %d Buffer[%d] =", Pico_mcd->cdc.WA.N, Pico_mcd->cdc.PT.N & 0x3FFF);
+ cdprintf("Header 1 = %.2X %.2X %.2X %.2X", Pico_mcd->cdc.HEAD.B.B0,
Pico_mcd->cdc.HEAD.B.B1, Pico_mcd->cdc.HEAD.B.B2, Pico_mcd->cdc.HEAD.B.B3);
cdprintf("Header 2 = %.2X %.2X %.2X %.2X --- %.2X %.2X\n\n",
Pico_mcd->cdc.Buffer[(Pico_mcd->cdc.PT.N + 0) & 0x3FFF],
{
int index = Pico_mcd->scd.Cur_Track - Pico_mcd->scd.TOC.First_Track;
- cdprintf("Play FILE Comp\n");
+ cdprintf("Play FILE Comp");
if (Tracks[index].F == NULL)
{
\r
#include "../PicoInt.h"\r
\r
-#define cdprintf printf\r
+#define cdprintf dprintf\r
//#define cdprintf(x...)\r
+#define DEBUG_CD\r
\r
#define TRAY_OPEN 0x0500 // TRAY OPEN CDD status\r
#define NOCD 0x0000 // CD removed CDD status\r
\r
void Check_CD_Command(void)\r
{\r
- cdprintf("CHECK CD COMMAND\n");\r
+ cdprintf("CHECK CD COMMAND");\r
\r
// Check CDD\r
\r
\r
if (Pico_mcd->scd.Status_CDC & 1) // CDC is reading data ...\r
{\r
- cdprintf("Sending a read command\n");\r
+ cdprintf("Got a read command");\r
\r
// DATA ?\r
if (Pico_mcd->scd.TOC.Tracks[Pico_mcd->scd.Cur_Track - Pico_mcd->scd.TOC.First_Track].Type)\r
\r
int Get_Status_CDD_c0(void)\r
{\r
- cdprintf("Status command : Cur LBA = %d\n", Pico_mcd->scd.Cur_LBA);\r
+ cdprintf("Status command : Cur LBA = %d", Pico_mcd->scd.Cur_LBA);\r
\r
// Clear immediat status\r
if ((Pico_mcd->cdd.Status & 0x0F00) == 0x0200)\r
{\r
_msf MSF;\r
\r
- cdprintf("command 200 : Cur LBA = %d\n", Pico_mcd->scd.Cur_LBA);\r
+ cdprintf("command 200 : Cur LBA = %d", Pico_mcd->scd.Cur_LBA);\r
\r
CHECK_TRAY_OPEN\r
\r
// else if (!(CDC.CTRL.B.B0 & 0x80)) Pico_mcd->cdd.Status |= Pico_mcd->scd.Status_CDD;\r
Pico_mcd->cdd.Status |= Pico_mcd->scd.Status_CDD;\r
\r
- cdprintf("Status CDD = %.4X Status = %.4X\n", Pico_mcd->scd.Status_CDD, Pico_mcd->cdd.Status);\r
+ cdprintf("Status CDD = %.4X Status = %.4X", Pico_mcd->scd.Status_CDD, Pico_mcd->cdd.Status);\r
\r
LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
\r
elapsed_time = Pico_mcd->scd.Cur_LBA - Track_to_LBA(LBA_to_Track(Pico_mcd->scd.Cur_LBA));\r
LBA_to_MSF(elapsed_time - 150, &MSF);\r
\r
- cdprintf(" elapsed = %d\n", elapsed_time);\r
+ cdprintf(" elapsed = %d", elapsed_time);\r
\r
Pico_mcd->cdd.Minute = INT_TO_BCDW(MSF.M);\r
Pico_mcd->cdd.Seconde = INT_TO_BCDW(MSF.S);\r
\r
int Get_Current_Track_CDD_c22(void)\r
{\r
- cdprintf("Status CDD = %.4X Status = %.4X\n", Pico_mcd->scd.Status_CDD, Pico_mcd->cdd.Status);\r
+ cdprintf("Status CDD = %.4X Status = %.4X", Pico_mcd->scd.Status_CDD, Pico_mcd->cdd.Status);\r
\r
CHECK_TRAY_OPEN\r
\r
Pico_mcd->scd.Cur_LBA = new_lba;\r
CDC_Update_Header();\r
\r
- cdprintf("Read : Cur LBA = %d, M=%d, S=%d, F=%d\n", Pico_mcd->scd.Cur_LBA, MSF.M, MSF.S, MSF.F);\r
+ cdprintf("Read : Cur LBA = %d, M=%d, S=%d, F=%d", Pico_mcd->scd.Cur_LBA, MSF.M, MSF.S, MSF.F);\r
\r
if (Pico_mcd->scd.Status_CDD != PLAYING) delay += 20;\r
\r
{\r
_msf MSF;\r
LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
- cdprintf("Resume read : Cur LBA = %d, M=%d, S=%d, F=%d\n", Pico_mcd->scd.Cur_LBA, MSF.M, MSF.S, MSF.F);\r
+ cdprintf("Resume read : Cur LBA = %d, M=%d, S=%d, F=%d", Pico_mcd->scd.Cur_LBA, MSF.M, MSF.S, MSF.F);\r
}\r
#endif\r
\r