// This should be much slower, like 12+ cycles/byte, it's like
// that because the CPU runs too fast and fifo is not emulated.
// See also set_dma_end().
- set_event(PSXINT_SPUDMA, words * 4);
+ set_event(PSXINT_SPUDMA, words * 4 * 4);
return;
case 0x01000200: //spu to cpu transfer
psxCpu->Clear(madr, words_copy);
HW_DMA4_MADR = SWAPu32(madr + words_copy * 4);
- set_event(PSXINT_SPUDMA, words * 4);
+ set_event(PSXINT_SPUDMA, words * 4 * 4);
return;
default:
addr &= 0x7fffe;\r
}\r
if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {\r
- log_unhandled("rdma spu irq: %x/%x+%x\n", irq_addr, spu.spuAddr, iSize * 2);\r
+ log_unhandled("rdma spu irq: %x/%x-%x\n", irq_addr, spu.spuAddr, addr);\r
do_irq_io(irq_after);\r
}\r
spu.spuAddr = addr;\r
unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;\r
int i, irq_after;\r
\r
- do_samples_if_needed(cycles, 1, 2);\r
+ do_samples_if_needed(cycles + iSize*2 * 4, 1, 2);\r
irq_after = (irq_addr - addr) & 0x7ffff;\r
spu.bMemDirty = 1;\r
\r
}\r
}\r
if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {\r
- log_unhandled("wdma spu irq: %x/%x+%x (%u)\n",\r
- irq_addr, spu.spuAddr, iSize * 2, irq_after);\r
+ log_unhandled("%u wdma spu irq: %x/%x-%x (%u)\n",\r
+ cycles, irq_addr, spu.spuAddr, addr, irq_after);\r
// this should be consistent with psxdma.c timing\r
// might also need more delay like in set_dma_end()\r
- do_irq_io(irq_after);\r
+ do_irq_io(irq_after * 4);\r
+ }\r
+ for (i = 0; i < MAXCHAN; i++) {\r
+ size_t ediff, p = spu.s_chan[i].pCurr - spu.spuMemC;\r
+ if (spu.s_chan[i].ADSRX.State == ADSR_RELEASE && !spu.s_chan[i].ADSRX.EnvelopeVol)\r
+ continue;\r
+ ediff = addr - p;\r
+ if (spu.spuAddr < p && p < spu.spuAddr + iSize * 2) {\r
+ log_unhandled("%u spu ch%02d play %zx dma %x-%x (%zd)\n",\r
+ cycles, i, p, spu.spuAddr, addr, ediff);\r
+ //exit(1);\r
+ }\r
+ // a hack for the super annoying timing issues in The Emperor's New Groove\r
+ // (which is a game bug, but tends to trigger more here)\r
+ if (ediff <= 0x20u) {\r
+ spu.s_chan[i].pCurr += ediff;\r
+ break;\r
+ }\r
}\r
spu.spuAddr = addr;\r
set_dma_end(iSize, cycles);\r