reduce some code duplication

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 1f37dc2..87aa17c 100644 (file)
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -157,43 +157,6 @@ make_rcnt_funcs(0)
 make_rcnt_funcs(1)
 make_rcnt_funcs(2)
 
-static void io_write_ireg16(u32 value)
-{
-       psxHu16ref(0x1070) &= value;
-}
-
-static void io_write_imask16(u32 value)
-{
-       psxHu16ref(0x1074) = value;
-       if (psxHu16ref(0x1070) & value)
-               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
-}
-
-static void io_write_ireg32(u32 value)
-{
-       psxHu32ref(0x1070) &= value;
-}
-
-static void io_write_imask32(u32 value)
-{
-       psxHu32ref(0x1074) = value;
-       if (psxHu32ref(0x1070) & value)
-               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
-}
-
-static void io_write_dma_icr32(u32 value)
-{
-       u32 tmp = value & 0x00ff803f;
-       tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000;
-       if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000)
-           || tmp & HW_DMA_ICR_BUS_ERROR) {
-               if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT))
-                       psxHu32ref(0x1070) |= SWAP32(8);
-               tmp |= HW_DMA_ICR_IRQ_SENT;
-       }
-       HW_DMA_ICR = SWAPu32(tmp);
-}
-
 #define make_dma_func(n) \
 static void io_write_chcr##n(u32 value) \
 { \
@@ -423,15 +386,15 @@ void new_dyna_pcsx_mem_init(void)
 
        // write(u32 data)
        map_item(&mem_iowtab[IOMEM32(0x1040)], io_write_sio32, 1);
-       map_item(&mem_iowtab[IOMEM32(0x1070)], io_write_ireg32, 1);
-       map_item(&mem_iowtab[IOMEM32(0x1074)], io_write_imask32, 1);
+       map_item(&mem_iowtab[IOMEM32(0x1070)], psxHwWriteIstat, 1);
+       map_item(&mem_iowtab[IOMEM32(0x1074)], psxHwWriteImask, 1);
        map_item(&mem_iowtab[IOMEM32(0x1088)], io_write_chcr0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1098)], io_write_chcr1, 1);
        map_item(&mem_iowtab[IOMEM32(0x10a8)], io_write_chcr2, 1);
        map_item(&mem_iowtab[IOMEM32(0x10b8)], io_write_chcr3, 1);
        map_item(&mem_iowtab[IOMEM32(0x10c8)], io_write_chcr4, 1);
        map_item(&mem_iowtab[IOMEM32(0x10e8)], io_write_chcr6, 1);
-       map_item(&mem_iowtab[IOMEM32(0x10f4)], io_write_dma_icr32, 1);
+       map_item(&mem_iowtab[IOMEM32(0x10f4)], psxHwWriteDmaIcr32, 1);
        map_item(&mem_iowtab[IOMEM32(0x1100)], io_rcnt_write_count0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1104)], io_rcnt_write_mode0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1108)], io_rcnt_write_target0, 1);
@@ -451,8 +414,8 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iowtab[IOMEM16(0x1048)], sioWriteMode16, 1);
        map_item(&mem_iowtab[IOMEM16(0x104a)], sioWriteCtrl16, 1);
        map_item(&mem_iowtab[IOMEM16(0x104e)], sioWriteBaud16, 1);
-       map_item(&mem_iowtab[IOMEM16(0x1070)], io_write_ireg16, 1);
-       map_item(&mem_iowtab[IOMEM16(0x1074)], io_write_imask16, 1);
+       map_item(&mem_iowtab[IOMEM16(0x1070)], psxHwWriteIstat, 1);
+       map_item(&mem_iowtab[IOMEM16(0x1074)], psxHwWriteImask, 1);
        map_item(&mem_iowtab[IOMEM16(0x1100)], io_rcnt_write_count0, 1);
        map_item(&mem_iowtab[IOMEM16(0x1104)], io_rcnt_write_mode0, 1);
        map_item(&mem_iowtab[IOMEM16(0x1108)], io_rcnt_write_target0, 1);

diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index 10a2695..e85d8b5 100644 (file)
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -41,6 +41,43 @@ void psxHwReset() {
        HW_GPU_STATUS = SWAP32(0x14802000);
 }
 
+void psxHwWriteIstat(u32 value)
+{
+       u32 stat = psxHu16(0x1070) & SWAPu16(value);
+       psxHu16ref(0x1070) = SWAPu16(stat);
+
+       psxRegs.CP0.n.Cause &= ~0x400;
+       if (stat & psxHu16(0x1074))
+               psxRegs.CP0.n.Cause |= 0x400;
+}
+
+void psxHwWriteImask(u32 value)
+{
+       u32 stat = psxHu16(0x1070);
+       psxHu16ref(0x1074) = SWAPu16(value);
+       if (stat & SWAPu16(value)) {
+               //if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
+               //      log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
+               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
+       }
+       psxRegs.CP0.n.Cause &= ~0x400;
+       if (stat & value)
+               psxRegs.CP0.n.Cause |= 0x400;
+}
+
+void psxHwWriteDmaIcr32(u32 value)
+{
+       u32 tmp = value & 0x00ff803f;
+       tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000;
+       if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000)
+           || tmp & HW_DMA_ICR_BUS_ERROR) {
+               if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT))
+                       psxHu32ref(0x1070) |= SWAP32(8);
+               tmp |= HW_DMA_ICR_IRQ_SENT;
+       }
+       HW_DMA_ICR = SWAPu32(tmp);
+}
+
 u8 psxHwRead8(u32 add) {
        unsigned char hard;
 
@@ -476,19 +513,14 @@ void psxHwWrite16(u32 add, u16 value) {
 #ifdef PSXHW_LOG
                        PSXHW_LOG("IREG 16bit write %x\n", value);
 #endif
-                       psxHu16ref(0x1070) &= SWAPu16(value);
+                       psxHwWriteIstat(value);
                        return;
 
                case 0x1f801074:
 #ifdef PSXHW_LOG
                        PSXHW_LOG("IMASK 16bit write %x\n", value);
 #endif
-                       psxHu16ref(0x1074) = SWAPu16(value);
-                       if (psxHu16ref(0x1070) & SWAPu16(value)) {
-                               //if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
-                               //      log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
-                               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
-                       }
+                       psxHwWriteImask(value);
                        return;
 
                case 0x1f801100:
@@ -607,18 +639,13 @@ void psxHwWrite32(u32 add, u32 value) {
 #ifdef PSXHW_LOG
                        PSXHW_LOG("IREG 32bit write %x\n", value);
 #endif
-                       psxHu32ref(0x1070) &= SWAPu32(value);
+                       psxHwWriteIstat(value);
                        return;
                case 0x1f801074:
 #ifdef PSXHW_LOG
                        PSXHW_LOG("IMASK 32bit write %x\n", value);
 #endif
-                       psxHu32ref(0x1074) = SWAPu32(value);
-                       if (psxHu32ref(0x1070) & SWAPu32(value)) {
-                               if ((psxRegs.CP0.n.SR & 0x401) == 0x401)
-                                       log_unhandled("irq on unmask @%08x\n", psxRegs.pc);
-                               new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1);
-                       }
+                       psxHwWriteImask(value);
                        return;
 
 #ifdef PSXHW_LOG
@@ -729,18 +756,8 @@ void psxHwWrite32(u32 add, u32 value) {
 #ifdef PSXHW_LOG
                        PSXHW_LOG("DMA ICR 32bit write %x\n", value);
 #endif
-               {
-                       u32 tmp = value & 0x00ff803f;
-                       tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000;
-                       if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000)
-                           || tmp & HW_DMA_ICR_BUS_ERROR) {
-                               if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT))
-                                       psxHu32ref(0x1070) |= SWAP32(8);
-                               tmp |= HW_DMA_ICR_IRQ_SENT;
-                       }
-                       HW_DMA_ICR = SWAPu32(tmp);
+                       psxHwWriteDmaIcr32(value);
                        return;
-               }
 
                case 0x1f801810:
 #ifdef PSXHW_LOG

diff --git a/libpcsxcore/psxhw.h b/libpcsxcore/psxhw.h
index e83939f..2bde9ed 100644 (file)
--- a/libpcsxcore/psxhw.h
+++ b/libpcsxcore/psxhw.h
@@ -82,6 +82,10 @@ void psxHwWrite16(u32 add, u16 value);
 void psxHwWrite32(u32 add, u32 value);
 int psxHwFreeze(void *f, int Mode);
 
+void psxHwWriteIstat(u32 value);
+void psxHwWriteImask(u32 value);
+void psxHwWriteDmaIcr32(u32 value);
+
 #ifdef __cplusplus
 }
 #endif