void wait_for_input(void);
void ctr_clear_cache(void);
void ctr_clear_cache_range(void *start, void *end);
-//void ctr_invalidate_icache(void); // only icache
+void ctr_invalidate_icache(void); // only icache
extern __attribute__((weak)) int __ctr_svchax;
bx lr
.endfunc
-#if 0
.func ctr_invalidate_icache_kernel
ctr_invalidate_icache_kernel:
+ mrs r3, cpsr
cpsid aif
mov r0, #0
mcr p15, 0, r0, c7, c10, 4 @ Data Sync Barrier
mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire instruction cache / Flush BTB
+ msr cpsr, r3
bx lr
.endfunc
svc 0x80 @ svcCustomBackdoor
bx lr
.endfunc
-#endif
#ifdef _3DS
if (ndrc_g.thread.cache_dirty) {
ndrc_g.thread.cache_dirty = 0;
- ctr_clear_cache();
+ ctr_invalidate_icache();
}
#else
// hopefully nothing is needed, as tested on r-pi4 and switch