ifeq "$(HAVE_NEON)" "1"
OBJS += libpcsxcore/gte_neon.o
endif
-libpcsxcore/gte.o libpcsxcore/gte_nf.o: CFLAGS += -fno-strict-aliasing
libpcsxcore/psxbios.o: CFLAGS += -Wno-nonnull
# dynarec
#include "gte.h"
#include "psxmem.h"
-typedef struct psxCP2Regs {
- psxCP2Data CP2D; /* Cop2 data registers */
- psxCP2Ctrl CP2C; /* Cop2 control registers */
-} psxCP2Regs;
-
#define VX(n) (n < 3 ? regs->CP2D.p[n << 1].sw.l : regs->CP2D.p[9].sw.l)
#define VY(n) (n < 3 ? regs->CP2D.p[n << 1].sw.h : regs->CP2D.p[10].sw.l)
#define VZ(n) (n < 3 ? regs->CP2D.p[(n << 1) + 1].sw.l : regs->CP2D.p[11].sw.l)
#ifndef FLAGLESS
static inline u32 MFC2(int reg) {
- psxCP2Regs *regs = (psxCP2Regs *)&psxRegs.CP2D;
+ psxCP2Regs *regs = &psxRegs.CP2;
switch (reg) {
case 1:
case 3:
}
static inline void MTC2(u32 value, int reg) {
- psxCP2Regs *regs = (psxCP2Regs *)&psxRegs.CP2D;
+ psxCP2Regs *regs = &psxRegs.CP2;
switch (reg) {
case 15:
gteSXY0 = gteSXY1;
PSXINT_COUNT
};
+typedef struct psxCP2Regs {
+ psxCP2Data CP2D; /* Cop2 data registers */
+ psxCP2Ctrl CP2C; /* Cop2 control registers */
+} psxCP2Regs;
+
typedef struct {
psxGPRRegs GPR; /* General Purpose Registers */
psxCP0Regs CP0; /* Coprocessor0 Registers */
- psxCP2Data CP2D; /* Cop2 data registers */
- psxCP2Ctrl CP2C; /* Cop2 control registers */
+ union {
+ struct {
+ psxCP2Data CP2D; /* Cop2 data registers */
+ psxCP2Ctrl CP2C; /* Cop2 control registers */
+ };
+ psxCP2Regs CP2;
+ };
u32 pc; /* Program counter */
u32 code; /* The instruction */
u32 cycle;