}\r
#endif\r
\r
-static int PadRead(int i)\r
-{\r
- int pad=0,value=0,TH;\r
- pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
- TH=Pico.ioports[i+1]&0x40;\r
-\r
- if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !TH) {\r
- value=(pad&0xc0)>>2; // ?0SA 0000\r
- goto end;\r
- } else if(phase == 3 && TH) {\r
- value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- goto end;\r
- } else if(phase == 3 && !TH) {\r
- value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- goto end;\r
- }\r
- }\r
-\r
- if(TH) value=(pad&0x3f); // ?1CB RLDU\r
- else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
-\r
- end:\r
-\r
- // orr the bits, which are set as output\r
- value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r
-\r
- return value; // will mirror later\r
-}\r
-\r
-u8 z80Read8(u32 a)\r
-{\r
- if(Pico.m.z80Run&1) return 0;\r
-\r
- a&=0x1fff;\r
-\r
- if(!(PicoOpt&4)) {\r
- // Z80 disabled, do some faking\r
- static u8 zerosent = 0;\r
- if(a == Pico.m.z80_lastaddr) { // probably polling something\r
- u8 d = Pico.m.z80_fakeval;\r
- if((d & 0xf) == 0xf && !zerosent) {\r
- d = 0; zerosent = 1;\r
- } else {\r
- Pico.m.z80_fakeval++;\r
- zerosent = 0;\r
- }\r
- return d;\r
- } else {\r
- Pico.m.z80_fakeval = 0;\r
- }\r
- }\r
-\r
- Pico.m.z80_lastaddr = (u16) a;\r
- return Pico.zram[a];\r
-}\r
-\r
\r
// for nonstandard reads\r
#ifndef _ASM_MEMORY_C\r
static\r
#endif\r
-u32 UnusualRead16(u32 a, int realsize)\r
+u32 OtherRead16End(u32 a, int realsize)\r
{\r
u32 d=0;\r
\r
return d;\r
}\r
\r
-#ifndef _ASM_MEMORY_C\r
-static\r
-#endif\r
-u32 OtherRead16(u32 a, int realsize)\r
-{\r
- u32 d=0;\r
-\r
- if ((a&0xff0000)==0xa00000) {\r
- if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r
- if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; dprintf("read ym2612: %04x", d); goto end; } // 0x4000-0x5fff, Fudge if disabled\r
- d=0xffff; goto end;\r
- }\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- switch(a) {\r
- case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r
- case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r
- case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r
- default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r
- }\r
- d|=d<<8;\r
- goto end;\r
- }\r
- // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r
- if (a==0xa11100) {\r
- d=Pico.m.z80Run&1;\r
-#if 0\r
- if (!d) {\r
- // do we need this?\r
- extern int z80stopCycle; // TODO: tidy\r
- int stop_before = SekCyclesDone() - z80stopCycle;\r
- if (stop_before > 0 && stop_before <= 16) // Gens uses 16 here\r
- d = 1; // bus not yet available\r
- }\r
-#endif\r
- d=(d<<8)|0x8000|Pico.m.rotate++;\r
- dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r
- goto end; }\r
-\r
-#ifndef _ASM_MEMORY_C\r
- if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
-#endif\r
-\r
- d = UnusualRead16(a, realsize);\r
-\r
-end:\r
- return d;\r
-}\r
\r
//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
\r
-static void OtherWrite8(u32 a,u32 d,int realsize)\r
+static void OtherWrite8End(u32 a,u32 d,int realsize)\r
{\r
- if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r
- if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if(PicoOpt&0x20) {\r
- if(a==1) {\r
- Pico.m.padDelay[0] = 0;\r
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
- }\r
- else if(a==2) {\r
- Pico.m.padDelay[1] = 0;\r
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
- }\r
- }\r
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
- return;\r
- }\r
- if (a==0xa11100) {\r
- extern int z80startCycle, z80stopCycle;\r
- //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
- d&=1; d^=1;\r
- if(!d) {\r
- // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
- if (Pico.m.z80Run) {\r
- int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
- z80stopCycle = SekCyclesDone();\r
- lineCycles=(lineCycles>>1)-(lineCycles>>5);\r
- z80_run(lineCycles);\r
- }\r
- } else {\r
- z80startCycle = SekCyclesDone();\r
- //if(Pico.m.scanline != -1)\r
- }\r
- dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);\r
- Pico.m.z80Run=(u8)d; return;\r
- }\r
- if (a==0xa11200) { dprintf("write z80Reset: %02x", d); if(!(d&1)) z80_reset(); return; }\r
-\r
- if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r
- {\r
- Pico.m.z80_bank68k>>=1;\r
- Pico.m.z80_bank68k|=(d&1)<<8;\r
- Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
- return;\r
- }\r
-\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
-\r
// sram\r
//if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
//if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
}\r
\r
-static void OtherWrite16(u32 a,u32 d)\r
-{\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r
-\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if(PicoOpt&0x20) {\r
- if(a==1) {\r
- Pico.m.padDelay[0] = 0;\r
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
- }\r
- else if(a==2) {\r
- Pico.m.padDelay[1] = 0;\r
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
- }\r
- }\r
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
- return;\r
- }\r
- if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r
- if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }\r
\r
- OtherWrite8(a, d>>8, 16);\r
- OtherWrite8(a+1,d&0xff, 16);\r
-}\r
+#include "MemoryCmn.c"\r
+\r
\r
// -----------------------------------------------------------------\r
// Read Rom and read Ram\r
--- /dev/null
+/* common code for Memory.c and cd/Memory.c */
+
+static int PadRead(int i)
+{
+ int pad=0,value=0,TH;
+ pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
+ TH=Pico.ioports[i+1]&0x40;
+
+ if(PicoOpt & 0x20) { // 6 button gamepad enabled
+ int phase = Pico.m.padTHPhase[i];
+
+ if(phase == 2 && !TH) {
+ value=(pad&0xc0)>>2; // ?0SA 0000
+ goto end;
+ } else if(phase == 3 && TH) {
+ value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
+ goto end;
+ } else if(phase == 3 && !TH) {
+ value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
+ goto end;
+ }
+ }
+
+ if(TH) value=(pad&0x3f); // ?1CB RLDU
+ else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
+
+ end:
+
+ // orr the bits, which are set as output
+ value |= Pico.ioports[i+1]&Pico.ioports[i+4];
+
+ return value; // will mirror later
+}
+
+
+#ifndef _ASM_MEMORY_C
+static
+#endif
+u8 z80Read8(u32 a)
+{
+ if(Pico.m.z80Run&1) return 0;
+
+ a&=0x1fff;
+
+ if(!(PicoOpt&4)) {
+ // Z80 disabled, do some faking
+ static u8 zerosent = 0;
+ if(a == Pico.m.z80_lastaddr) { // probably polling something
+ u8 d = Pico.m.z80_fakeval;
+ if((d & 0xf) == 0xf && !zerosent) {
+ d = 0; zerosent = 1;
+ } else {
+ Pico.m.z80_fakeval++;
+ zerosent = 0;
+ }
+ return d;
+ } else {
+ Pico.m.z80_fakeval = 0;
+ }
+ }
+
+ Pico.m.z80_lastaddr = (u16) a;
+ return Pico.zram[a];
+}
+
+
+#ifndef _ASM_MEMORY_C
+static
+#endif
+u32 OtherRead16(u32 a, int realsize)
+{
+ u32 d=0;
+
+ if ((a&0xff0000)==0xa00000) {
+ if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
+ if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
+ if(PicoOpt&1) d=YM2612Read();
+ else d=Pico.m.rotate++&3;
+ dprintf("read ym2612: %04x", d);
+ goto end;
+ }
+ d=0xffff;
+ goto end;
+ }
+
+ if ((a&0xffffe0)==0xa10000) { // I/O ports
+ a=(a>>1)&0xf;
+ switch(a) {
+ case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
+ case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
+ case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
+ default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
+ }
+ d|=d<<8;
+ goto end;
+ }
+
+ // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
+ if (a==0xa11100) { // z80 busreq
+ d=Pico.m.z80Run&1;
+#if 0
+ if (!d) {
+ // do we need this?
+ extern int z80stopCycle;
+ int stop_before = SekCyclesDone() - z80stopCycle;
+ if (stop_before > 0 && stop_before <= 16) // Gens uses 16 here
+ d = 1; // bus not yet available
+ }
+#endif
+ d=(d<<8)|0x8000|Pico.m.rotate++;
+ dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);
+ goto end;
+ }
+
+#ifndef _ASM_MEMORY_C
+ if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
+#endif
+
+ d = OtherRead16End(a, realsize);
+
+end:
+ return d;
+}
+
+
+//extern UINT32 mz80GetRegisterValue(void *, UINT32);
+
+static void OtherWrite8(u32 a,u32 d,int realsize)
+{
+ if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
+ if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
+ if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
+ if ((a&0xffffe0)==0xa10000) { // I/O ports
+ a=(a>>1)&0xf;
+ // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
+ if(PicoOpt&0x20) {
+ if(a==1) {
+ Pico.m.padDelay[0] = 0;
+ if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
+ }
+ else if(a==2) {
+ Pico.m.padDelay[1] = 0;
+ if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
+ }
+ }
+ Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
+ return;
+ }
+ if (a==0xa11100) {
+ extern int z80startCycle, z80stopCycle;
+ //int lineCycles=(488-SekCyclesLeft)&0x1ff;
+ d&=1; d^=1;
+ if(!d) {
+ // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
+ if (Pico.m.z80Run) {
+ int lineCycles=(488-SekCyclesLeft)&0x1ff;
+ z80stopCycle = SekCyclesDone();
+ lineCycles=(lineCycles>>1)-(lineCycles>>5);
+ z80_run(lineCycles);
+ }
+ } else {
+ z80startCycle = SekCyclesDone();
+ //if(Pico.m.scanline != -1)
+ }
+ dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);
+ Pico.m.z80Run=(u8)d; return;
+ }
+ if (a==0xa11200) {
+ dprintf("write z80Reset: %02x", d);
+ if(!(d&1)) z80_reset();
+ return;
+ }
+
+ if ((a&0xff7f00)==0xa06000) // Z80 BANK register
+ {
+ Pico.m.z80_bank68k>>=1;
+ Pico.m.z80_bank68k|=(d&1)<<8;
+ Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
+ return;
+ }
+
+ if ((a&0xe700e0)==0xc00000) {
+ PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
+ return;
+ }
+
+ OtherWrite8End(a, d, realsize);
+}
+
+
+static void OtherWrite16(u32 a,u32 d)
+{
+ if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
+ if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
+
+ if ((a&0xffffe0)==0xa10000) { // I/O ports
+ a=(a>>1)&0xf;
+ // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
+ if(PicoOpt&0x20) {
+ if(a==1) {
+ Pico.m.padDelay[0] = 0;
+ if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
+ }
+ else if(a==2) {
+ Pico.m.padDelay[1] = 0;
+ if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
+ }
+ }
+ Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
+ return;
+ }
+ if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
+ if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }
+
+ OtherWrite8(a, d>>8, 16);
+ OtherWrite8(a+1,d&0xff, 16);
+}
+
+
#include "gfx_cd.h"\r
#include "pcm.h"\r
\r
+#include "cell_map.c"\r
+\r
typedef unsigned char u8;\r
typedef unsigned short u16;\r
typedef unsigned int u32;\r
d = Read_CDC_Host(0);\r
goto end;\r
case 0xA:\r
- dprintf("m68k reserved read");\r
+ dprintf("m68k FIXME: reserved read");\r
goto end;\r
case 0xC:\r
dprintf("m68k stopwatch timer read");\r
goto end;\r
}\r
\r
- dprintf("m68k_regs invalid read @ %02x", a);\r
+ dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
\r
end:\r
\r
Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
return;\r
case 6:\r
- *((char *)&Pico_mcd->m.hint_vector+1) = d;\r
+ dprintf("FIXME hint[2]: %02x @%06x", (u8)d, SekPc);\r
Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
return;\r
case 7:\r
- *(char *)&Pico_mcd->m.hint_vector = d;\r
+ dprintf("FIXME hint[3]: %02x @%06x", (u8)d, SekPc);\r
Pico_mcd->bios[0x72] = d;\r
+ dprintf("vector is now %08x", PicoRead32(0x70));\r
return;\r
case 0xe:\r
//dprintf("m68k: comm flag: %02x", d);\r
return;\r
}\r
\r
- dprintf("m68k: invalid write? [%02x] %02x", a, d);\r
+ dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
}\r
\r
\r
switch (a) {\r
case 2:\r
return; // only m68k can change WP\r
- case 3:\r
+ case 3: {\r
+ int dold = Pico_mcd->s68k_regs[3];\r
dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
d &= 0x1d;\r
if (d&4) {\r
- d |= Pico_mcd->s68k_regs[3]&0xc2;\r
- if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
+ d |= dold&0xc2;\r
+ if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
+ if (!(dold & 4)) {\r
+ dprintf("wram mode 2M->1M");\r
+ wram_2M_to_1M(Pico_mcd->word_ram2M);\r
+ }\r
} else {\r
d |= Pico_mcd->s68k_regs[3]&0xc3;\r
if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
+ if (dold & 4) {\r
+ dprintf("wram mode 1M->2M");\r
+ wram_1M_to_2M(Pico_mcd->word_ram2M);\r
+ }\r
}\r
break;\r
+ }\r
case 4:\r
dprintf("s68k CDC dest: %x", d&7);\r
Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
\r
if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
{\r
- dprintf("s68k: invalid write @ %02x?", a);\r
+ dprintf("s68k FIXME: invalid write @ %02x?", a);\r
return;\r
}\r
\r
\r
\r
\r
-\r
-\r
-static int PadRead(int i)\r
-{\r
- int pad=0,value=0,TH;\r
- pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
- TH=Pico.ioports[i+1]&0x40;\r
-\r
- if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !TH) {\r
- value=(pad&0xc0)>>2; // ?0SA 0000\r
- goto end;\r
- } else if(phase == 3 && TH) {\r
- value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- goto end;\r
- } else if(phase == 3 && !TH) {\r
- value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- goto end;\r
- }\r
- }\r
-\r
- if(TH) value=(pad&0x3f); // ?1CB RLDU\r
- else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
-\r
- end:\r
-\r
- // orr the bits, which are set as output\r
- value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r
-\r
- return value; // will mirror later\r
-}\r
-\r
-static u8 z80Read8(u32 a)\r
-{\r
- if(Pico.m.z80Run&1) return 0;\r
-\r
- a&=0x1fff;\r
-\r
- if(!(PicoOpt&4)) {\r
- // Z80 disabled, do some faking\r
- static u8 zerosent = 0;\r
- if(a == Pico.m.z80_lastaddr) { // probably polling something\r
- u8 d = Pico.m.z80_fakeval;\r
- if((d & 0xf) == 0xf && !zerosent) {\r
- d = 0; zerosent = 1;\r
- } else {\r
- Pico.m.z80_fakeval++;\r
- zerosent = 0;\r
- }\r
- return d;\r
- } else {\r
- Pico.m.z80_fakeval = 0;\r
- }\r
- }\r
-\r
- Pico.m.z80_lastaddr = (u16) a;\r
- return Pico.zram[a];\r
-}\r
-\r
-\r
-// for nonstandard reads\r
-static u32 UnusualRead16(u32 a, int realsize)\r
-{\r
- u32 d=0;\r
-\r
- dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
-\r
-\r
- dprintf("ret = %04x", d);\r
- return d;\r
-}\r
-\r
-static u32 OtherRead16(u32 a, int realsize)\r
+static u32 OtherRead16End(u32 a, int realsize)\r
{\r
u32 d=0;\r
\r
- if ((a&0xff0000)==0xa00000) {\r
- if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r
- if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled\r
- d=0xffff; goto end;\r
- }\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- switch(a) {\r
- case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r
- case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r
- case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r
- default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r
- }\r
- d|=d<<8;\r
- goto end;\r
- }\r
- // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r
- if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }\r
-\r
- if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
-\r
if ((a&0xffffc0)==0xa12000) {\r
d=m68k_reg_read16(a);\r
goto end;\r
}\r
\r
- d = UnusualRead16(a, realsize);\r
+ dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
\r
end:\r
return d;\r
}\r
\r
-//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
\r
-static void OtherWrite8(u32 a,u32 d,int realsize)\r
+static void OtherWrite8End(u32 a, u32 d, int realsize)\r
{\r
- if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r
- if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if(PicoOpt&0x20) {\r
- if(a==1) {\r
- Pico.m.padDelay[0] = 0;\r
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
- }\r
- else if(a==2) {\r
- Pico.m.padDelay[1] = 0;\r
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
- }\r
- }\r
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
- return;\r
- }\r
- if (a==0xa11100) {\r
- extern int z80startCycle, z80stopCycle;\r
- //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
- d&=1; d^=1;\r
- if(!d) {\r
- // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
- if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);\r
- z80stopCycle = SekCyclesDone();\r
- //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r
- } else {\r
- z80startCycle = SekCyclesDone();\r
- //if(Pico.m.scanline != -1)\r
- //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r
- }\r
- //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);\r
- Pico.m.z80Run=(u8)d; return;\r
- }\r
- if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }\r
-\r
- if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r
- {\r
- Pico.m.z80_bank68k>>=1;\r
- Pico.m.z80_bank68k|=(d&1)<<8;\r
- Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
- return;\r
- }\r
-\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
-\r
if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
\r
- dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
}\r
\r
-static void OtherWrite16(u32 a,u32 d)\r
-{\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r
-\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if(PicoOpt&0x20) {\r
- if(a==1) {\r
- Pico.m.padDelay[0] = 0;\r
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
- }\r
- else if(a==2) {\r
- Pico.m.padDelay[1] = 0;\r
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
- }\r
- }\r
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
- return;\r
- }\r
- if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r
- if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }\r
\r
- OtherWrite8(a, d>>8, 16);\r
- OtherWrite8(a+1,d&0xff, 16);\r
-}\r
+#undef _ASM_MEMORY_C\r
+#include "../MemoryCmn.c"\r
+\r
\r
// -----------------------------------------------------------------\r
// Read Rom and read Ram\r
if ((a&0xfc0000)==0x200000) {\r
dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- if (a >= 0x220000) {\r
- dprintf("cell");\r
- } else {\r
- a=((a&0x1fffe)<<1)|(a&1);\r
- if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
- d = Pico_mcd->word_ram[a^1];\r
- }\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1ffff;\r
+ d = Pico_mcd->word_ram1M[bank][a^1];\r
} else {\r
// allow access in any mode, like Gens does\r
- d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r
+ d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
}\r
dprintf("ret = %02x", (u8)d);\r
goto end;\r
if ((a&0xfc0000)==0x200000) {\r
dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- if (a >= 0x220000) {\r
- dprintf("cell");\r
- } else {\r
- a=((a&0x1fffe)<<1);\r
- if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
- d = *(u16 *)(Pico_mcd->word_ram+a);\r
- }\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1fffe;\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
} else {\r
// allow access in any mode, like Gens does\r
- d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
}\r
dprintf("ret = %04x", d);\r
goto end;\r
if ((a&0xfc0000)==0x200000) {\r
dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- if (a >= 0x220000) {\r
- dprintf("cell");\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000) { // cell arranged\r
+ u32 a1, a2;\r
+ a1 = (a&2) | (cell_map(a >> 2) << 2);\r
+ if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
+ else a2 = a1 + 2;\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
+ d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
} else {\r
- a=((a&0x1fffe)<<1);\r
- if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
- d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r
- d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
}\r
} else {\r
// allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
}\r
dprintf("ret = %08x", d);\r
goto end;\r
if ((a&0xfc0000)==0x200000) {\r
dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- if (a >= 0x220000) {\r
- dprintf("cell");\r
- } else {\r
- a=((a&0x1fffe)<<1)|(a&1);\r
- if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
- *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r
- }\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1ffff;\r
+ *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
} else {\r
// allow access in any mode, like Gens does\r
- *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r
+ *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
}\r
return;\r
}\r
if ((a&0xfc0000)==0x200000) {\r
dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- if (a >= 0x220000) {\r
- dprintf("cell");\r
- } else {\r
- a=((a&0x1fffe)<<1);\r
- if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
- *(u16 *)(Pico_mcd->word_ram+a)=d;\r
- }\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1fffe;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
} else {\r
// allow access in any mode, like Gens does\r
- *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r
+ *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
}\r
return;\r
}\r
if (d != 0) // don't log clears\r
dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- if (a >= 0x220000) {\r
- dprintf("cell");\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000) { // cell arranged\r
+ u32 a1, a2;\r
+ a1 = (a&2) | (cell_map(a >> 2) << 2);\r
+ if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
+ else a2 = a1 + 2;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
} else {\r
- a=((a&0x1fffe)<<1);\r
- if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
- *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r
- *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
}\r
} else {\r
// allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
}\r
return;\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ // test: batman returns\r
dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- // TODO (decode)\r
- dprintf("(decode)");\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
+ if (a&1) d &= 0x0f;\r
+ else d >>= 4;\r
+ dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
- d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r
+ d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
}\r
dprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
- a=((a&0x1fffe)<<1)|(a&1);\r
- if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
- d = Pico_mcd->word_ram[a^1];\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
dprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- // TODO (decode)\r
- dprintf("(decode)");\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
+ d |= d << 4; d &= ~0xf0;\r
+ dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
- d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
}\r
dprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
- a=((a&0x1fffe)<<1);\r
- if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
- d = *(u16 *)(Pico_mcd->word_ram+a);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
dprintf("ret = %04x", d);\r
goto end;\r
}\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- // TODO (decode)\r
- dprintf("(decode)");\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ a >>= 1;\r
+ d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
+ d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
+ d |= d << 4; d &= 0x0f0f0f0f;\r
+ dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
}\r
dprintf("ret = %08x", d);\r
goto end;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
- a=((a&0x1fffe)<<1);\r
- if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
- d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r
- d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
dprintf("ret = %08x", d);\r
goto end;\r
}\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- // TODO (decode)\r
- dprintf("(decode)");\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ if (a&1) d &= 0x0f;\r
+ else d >>= 4;\r
+ Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]=d;\r
+ dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
- *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r
+ *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
}\r
return;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
if (d)\r
dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
- a=((a&0x1fffe)<<1)|(a&1);\r
- if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
- *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
return;\r
}\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- // TODO (decode)\r
- dprintf("(decode)");\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d &= ~0xf0; d |= d >> 8;\r
+ Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff] = d;\r
+ dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
- *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r
+ *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
}\r
return;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
if (d)\r
dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- a=((a&0x1fffe)<<1);\r
- if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
- *(u16 *)(Pico_mcd->word_ram+a)=d;\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
return;\r
}\r
\r
// word RAM (2M area)\r
if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- // TODO (decode)\r
- dprintf("(decode)");\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ a >>= 1;\r
+ d &= 0x0f0f0f0f; d |= d >> 4;\r
+ Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] = d >> 16;\r
+ Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff] = d;\r
+ dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
}\r
return;\r
}\r
\r
// word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ u16 *pm;\r
if (d)\r
dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
- a=((a&0x1fffe)<<1);\r
- if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
- *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r
- *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
return;\r
}\r
\r
#if defined(EMU_C68K)\r
static __inline int PicoMemBaseM68k(u32 pc)\r
{\r
- int membase=0;\r
+ if ((pc&0xe00000)==0xe00000)\r
+ return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
\r
if (pc < 0x20000)\r
+ return (int)Pico_mcd->bios; // Program Counter in BIOS\r
+\r
+ if ((pc&0xfc0000)==0x200000)\r
{\r
- membase=(int)Pico_mcd->bios; // Program Counter in BIOS\r
- }\r
- else if ((pc&0xe00000)==0xe00000)\r
- {\r
- membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
- }\r
- else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))\r
- {\r
- membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram\r
- }\r
- else\r
- {\r
- // Error - Program Counter is invalid\r
- dprintf("m68k: unhandled jump to %06x", pc);\r
- membase=(int)Pico.rom;\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
+ if (pc < 0x220000) {\r
+ int bank = (Pico_mcd->s68k_regs[3]&1);\r
+ return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
+ }\r
}\r
\r
- return membase;\r
+ // Error - Program Counter is invalid\r
+ dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
+\r
+ return (int)Pico_mcd->bios;\r
}\r
\r
\r
\r
static __inline int PicoMemBaseS68k(u32 pc)\r
{\r
- int membase;\r
+ if (pc < 0x80000) // PRG RAM\r
+ return (int)Pico_mcd->prg_ram;\r
\r
- membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM\r
- if (pc >= 0x80000)\r
- {\r
- // Error - Program Counter is invalid\r
- dprintf("s68k: unhandled jump to %06x", pc);\r
+ if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
+ return (int)Pico_mcd->word_ram2M - 0x080000;\r
+\r
+ if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
}\r
\r
- return membase;\r
+ // Error - Program Counter is invalid\r
+ dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
+\r
+ return (int)Pico_mcd->prg_ram;\r
}\r
\r
\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
- dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);\r
+ if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
+ return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
+ }\r
+ dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
} else {\r
- if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
- return Pico_mcd->word_ram[(a^1)&0x3fffe];\r
- dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);\r
+ if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
+ if((a&0xfc0000)==0x200000) { // word RAM\r
+ if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
+ return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
+ else if (a < 0x220000) {\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
+ }\r
+ }\r
+ dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
}\r
return 0;//(u8) lastread_d;\r
}\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
- dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);\r
+ if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
+ return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ }\r
+ dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
} else {\r
- if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
- return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
- dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);\r
+ if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
+ if((a&0xfc0000)==0x200000) { // word RAM\r
+ if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
+ return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ else if (a < 0x220000) {\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ }\r
+ }\r
+ dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
}\r
return 0;\r
}\r
unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
+ u16 *pm;\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
- dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);\r
+ if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
+ { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ return (pm[0]<<16)|pm[1];\r
+ }\r
+ dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
} else {\r
- if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
- { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
- dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);\r
+ if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
+ if((a&0xfc0000)==0x200000) { // word RAM\r
+ if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
+ { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
+ else if (a < 0x220000) {\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ return (pm[0]<<16)|pm[1];\r
+ }\r
+ }\r
+ dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
}\r
return 0;\r
}\r
notaz.gp2x.de / picodrive.git / commitdiff