runs code in 1M wram, cell arrange, decode (untested)
[picodrive.git] / Pico / Memory.c
CommitLineData
cc68a136 1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10//#define __debug_io\r
11\r
12#include "PicoInt.h"\r
13\r
14#include "sound/sound.h"\r
15#include "sound/ym2612.h"\r
16#include "sound/sn76496.h"\r
17\r
18typedef unsigned char u8;\r
19typedef unsigned short u16;\r
20typedef unsigned int u32;\r
21\r
22extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
23\r
24#ifdef _ASM_MEMORY_C\r
25u8 PicoRead8(u32 a);\r
26u16 PicoRead16(u32 a);\r
27void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
28void PicoWriteRomHW_in1 (u32 a,u32 d);\r
29#endif\r
30\r
31\r
32#if defined(EMU_C68K) && defined(EMU_M68K)\r
33// cyclone debug mode\r
34u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
35int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
36extern unsigned int ppop;\r
37#endif\r
38\r
39#if defined(EMU_C68K) || defined(EMU_A68K)\r
40static __inline int PicoMemBase(u32 pc)\r
41{\r
42 int membase=0;\r
43\r
44 if (pc<Pico.romsize+4)\r
45 {\r
46 membase=(int)Pico.rom; // Program Counter in Rom\r
47 }\r
48 else if ((pc&0xe00000)==0xe00000)\r
49 {\r
50 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
51 }\r
52 else\r
53 {\r
54 // Error - Program Counter is invalid\r
55 membase=(int)Pico.rom;\r
56 }\r
57\r
58 return membase;\r
59}\r
60#endif\r
61\r
62\r
63#ifdef EMU_A68K\r
64extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r
65#endif\r
66\r
67static u32 CPU_CALL PicoCheckPc(u32 pc)\r
68{\r
69 u32 ret=0;\r
70#if defined(EMU_C68K)\r
71 pc-=PicoCpu.membase; // Get real pc\r
72 pc&=0xfffffe;\r
73\r
74 PicoCpu.membase=PicoMemBase(pc);\r
75\r
76 ret = PicoCpu.membase+pc;\r
77#elif defined(EMU_A68K)\r
78 OP_ROM=(u8 *)PicoMemBase(pc);\r
79\r
80 // don't bother calling us back unless it's outside the 64k segment\r
81 M68000_regs.AsmBank=(pc>>16);\r
82#endif\r
83 return ret;\r
84}\r
85\r
86\r
87int PicoInitPc(u32 pc)\r
88{\r
89 PicoCheckPc(pc);\r
90 return 0;\r
91}\r
92\r
93#ifndef _ASM_MEMORY_C\r
94void PicoMemReset()\r
95{\r
96}\r
97#endif\r
98\r
99// -----------------------------------------------------------------\r
100\r
101#ifndef _ASM_MEMORY_C\r
102// address must already be checked\r
103static int SRAMRead(u32 a)\r
104{\r
105 u8 *d = SRam.data-SRam.start+a;\r
106 return (d[0]<<8)|d[1];\r
107}\r
108#endif\r
109\r
cc68a136 110\r
111// for nonstandard reads\r
112#ifndef _ASM_MEMORY_C\r
113static\r
114#endif\r
fa1e5e29 115u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 116{\r
117 u32 d=0;\r
118\r
119 dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
120\r
121 // for games with simple protection devices, discovered by Haze\r
122 // some dumb detection is used, but that should be enough to make things work\r
123 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
124 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
4f672280 125 if (a == 0x400000) { d=0x55<<8; goto end; }\r
126 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
127 }\r
128 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
129 if (a == 0x400000) { d=0x55<<8; goto end; }\r
130 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
131 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
132 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
133 }\r
134 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
135 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
136 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
137 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
138 }\r
139 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
140 if (a == 0x400000) { d=0x90<<8; goto end; }\r
141 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
142 // checks the result, which is of the above one. Left it just in case.\r
143 }\r
144 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
145 if (a == 0x400000) { d=0x55<<8; goto end; }\r
146 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
147 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
148 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
149 }\r
cc68a136 150 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
4f672280 151 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
152 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
cc68a136 153 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
154 }\r
155 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
156 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
4f672280 157 d=0x0c; goto end;\r
158 }\r
cc68a136 159 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
4f672280 160 d=0x28; goto end; // does the check from RAM\r
161 }\r
cc68a136 162 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
4f672280 163 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
164 }\r
cc68a136 165 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
4f672280 166 d=0x0a; goto end;\r
167 }\r
cc68a136 168 }\r
169 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
170 d=0x01; goto end;\r
171 }\r
172 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
173 d=0x1f; goto end;\r
174 }\r
175 else if (a == 0x30fe02) {\r
176 // Virtua Racing - just for fun\r
4f672280 177 // this seems to be some flag that SVP is ready or something similar\r
cc68a136 178 d=1; goto end;\r
179 }\r
180\r
181end:\r
182 dprintf("ret = %04x", d);\r
183 return d;\r
184}\r
185\r
cc68a136 186\r
187//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
188\r
fa1e5e29 189static void OtherWrite8End(u32 a,u32 d,int realsize)\r
cc68a136 190{\r
cc68a136 191 // sram\r
192 //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
193 //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
194 if(a >= SRam.start && a <= SRam.end) {\r
195 unsigned int sreg = Pico.m.sram_reg;\r
196 if(!(sreg & 0x10)) {\r
4f672280 197 // not detected SRAM\r
198 if((a&~1)==0x200000) {\r
cc68a136 199 Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
200 SRam.start=0x200000; SRam.end=SRam.start+1;\r
201 }\r
4f672280 202 Pico.m.sram_reg|=0x10;\r
203 }\r
cc68a136 204 if(sreg & 4) { // EEPROM write\r
4f672280 205 if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
206 // just update pending state\r
207 SRAMUpdPending(a, d);\r
208 } else {\r
209 SRAMWriteEEPROM(sreg>>6); // execute pending\r
210 SRAMUpdPending(a, d);\r
cc68a136 211 lastSSRamWrite = SekCyclesDoneT();\r
4f672280 212 }\r
cc68a136 213 } else if(!(sreg & 2)) {\r
214 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
215 if(*pm != (u8)d) {\r
216 SRam.changed = 1;\r
217 *pm=(u8)d;\r
218 }\r
4f672280 219 }\r
cc68a136 220 return;\r
221 }\r
222\r
223#ifdef _ASM_MEMORY_C\r
224 // special ROM hardware (currently only banking and sram reg supported)\r
225 if((a&0xfffff1) == 0xA130F1) {\r
226 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
227 return;\r
228 }\r
229#else\r
230 // sram access register\r
231 if(a == 0xA130F1) {\r
232 Pico.m.sram_reg = (u8)(d&3);\r
233 return;\r
234 }\r
235#endif\r
236 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
237\r
238 if(a >= 0xA13004 && a < 0xA13040) {\r
239 // dumb 12-in-1 or 4-in-1 banking support\r
4f672280 240 int len;\r
241 a &= 0x3f; a <<= 16;\r
242 len = Pico.romsize - a;\r
243 if (len <= 0) return; // invalid/missing bank\r
244 if (len > 0x200000) len = 0x200000; // 2 megs\r
245 memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
cc68a136 246 return;\r
247 }\r
248\r
249 // for games with simple protection devices, discovered by Haze\r
250 else if ((a>>22) == 1)\r
251 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
252}\r
253\r
cc68a136 254\r
fa1e5e29 255#include "MemoryCmn.c"\r
256\r
cc68a136 257\r
258// -----------------------------------------------------------------\r
259// Read Rom and read Ram\r
260\r
261#ifndef _ASM_MEMORY_C\r
262u8 CPU_CALL PicoRead8(u32 a)\r
263{\r
264 u32 d=0;\r
265\r
266 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
267\r
268 a&=0xffffff;\r
269\r
270#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
271 // sram\r
272 if(a >= SRam.start && a <= SRam.end) {\r
273 unsigned int sreg = Pico.m.sram_reg;\r
274 if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
4f672280 275 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
276 }\r
cc68a136 277 if(sreg & 4) { // EEPROM read\r
278 d = SRAMReadEEPROM();\r
279 goto end;\r
280 } else if(sreg & 1) {\r
281 d = *(u8 *)(SRam.data-SRam.start+a);\r
282 goto end;\r
283 }\r
284 }\r
285#endif\r
286\r
287 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
288 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
289\r
290 d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
291\r
292 end:\r
293\r
294 //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
295 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
296 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
297 // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
298\r
299 //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
300 //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
301#ifdef __debug_io\r
302 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
303#endif\r
304#if defined(EMU_C68K) && defined(EMU_M68K)\r
305 if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
306 lastread_a = a;\r
307 lastread_d[lrp_cyc++&15] = (u8)d;\r
308 }\r
309#endif\r
310 return (u8)d;\r
311}\r
312\r
313u16 CPU_CALL PicoRead16(u32 a)\r
314{\r
315 u16 d=0;\r
316\r
317 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
318\r
319 a&=0xfffffe;\r
320\r
321#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
322 // sram\r
323 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
324 d = (u16) SRAMRead(a);\r
325 goto end;\r
326 }\r
327#endif\r
328\r
329 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
330\r
331 d = (u16)OtherRead16(a, 16);\r
332\r
333 end:\r
334 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
335 // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
336\r
337#ifdef __debug_io\r
338 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
339#endif\r
340#if defined(EMU_C68K) && defined(EMU_M68K)\r
341 if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
342 lastread_a = a;\r
343 lastread_d[lrp_cyc++&15] = d;\r
344 }\r
345#endif\r
346 return d;\r
347}\r
348\r
349u32 CPU_CALL PicoRead32(u32 a)\r
350{\r
351 u32 d=0;\r
352\r
353 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
354\r
355 a&=0xfffffe;\r
356\r
357 // sram\r
358 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
359 d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
360 goto end;\r
361 }\r
362\r
363 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
364\r
365 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
366\r
367 end:\r
368#ifdef __debug_io\r
369 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
370#endif\r
371#if defined(EMU_C68K) && defined(EMU_M68K)\r
372 if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
373 lastread_a = a;\r
374 lastread_d[lrp_cyc++&15] = d;\r
375 }\r
376#endif\r
377 return d;\r
378}\r
379#endif\r
380\r
381// -----------------------------------------------------------------\r
382// Write Ram\r
383\r
384static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
385{\r
386#ifdef __debug_io\r
387 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
388#endif\r
389#if defined(EMU_C68K) && defined(EMU_M68K)\r
390 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
391#endif\r
392 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
393 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
394\r
395\r
312e9ce1 396 if ((a&0xe00000)==0xe00000) {\r
397 if((a&0xffff)==0xf62a) dprintf("(f62a) = %02x [%i|%i] @ %x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r
398 u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r
cc68a136 399\r
400 a&=0xffffff;\r
401 OtherWrite8(a,d,8);\r
402}\r
403\r
404static void CPU_CALL PicoWrite16(u32 a,u16 d)\r
405{\r
406#ifdef __debug_io\r
407 dprintf("w16: %06x, %04x", a&0xffffff, d);\r
408#endif\r
409#if defined(EMU_C68K) && defined(EMU_M68K)\r
410 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
411#endif\r
412 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
413 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
414\r
415 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
416\r
417 a&=0xfffffe;\r
418 OtherWrite16(a,d);\r
419}\r
420\r
421static void CPU_CALL PicoWrite32(u32 a,u32 d)\r
422{\r
423#ifdef __debug_io\r
424 dprintf("w32: %06x, %08x", a&0xffffff, d);\r
425#endif\r
426#if defined(EMU_C68K) && defined(EMU_M68K)\r
427 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
428#endif\r
429\r
430 if ((a&0xe00000)==0xe00000)\r
431 {\r
432 // Ram:\r
433 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
434 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
435 return;\r
436 }\r
437\r
438 a&=0xfffffe;\r
439 OtherWrite16(a, (u16)(d>>16));\r
440 OtherWrite16(a+2,(u16)d);\r
441}\r
442\r
443\r
444// -----------------------------------------------------------------\r
b837b69b 445void PicoMemSetup()\r
cc68a136 446{\r
447#ifdef EMU_C68K\r
448 // Setup memory callbacks:\r
449 PicoCpu.checkpc=PicoCheckPc;\r
450 PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r
451 PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r
452 PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r
453 PicoCpu.write8 =PicoWrite8;\r
454 PicoCpu.write16=PicoWrite16;\r
455 PicoCpu.write32=PicoWrite32;\r
456#endif\r
cc68a136 457}\r
458\r
459#ifdef EMU_A68K\r
460struct A68KInter\r
461{\r
462 u32 unknown;\r
463 u8 (__fastcall *Read8) (u32 a);\r
464 u16 (__fastcall *Read16)(u32 a);\r
465 u32 (__fastcall *Read32)(u32 a);\r
466 void (__fastcall *Write8) (u32 a,u8 d);\r
467 void (__fastcall *Write16) (u32 a,u16 d);\r
468 void (__fastcall *Write32) (u32 a,u32 d);\r
469 void (__fastcall *ChangePc)(u32 a);\r
470 u8 (__fastcall *PcRel8) (u32 a);\r
471 u16 (__fastcall *PcRel16)(u32 a);\r
472 u32 (__fastcall *PcRel32)(u32 a);\r
473 u16 (__fastcall *Dir16)(u32 a);\r
474 u32 (__fastcall *Dir32)(u32 a);\r
475};\r
476\r
477struct A68KInter a68k_memory_intf=\r
478{\r
479 0,\r
480 PicoRead8,\r
481 PicoRead16,\r
482 PicoRead32,\r
483 PicoWrite8,\r
484 PicoWrite16,\r
485 PicoWrite32,\r
486 PicoCheckPc,\r
487 PicoRead8,\r
488 PicoRead16,\r
489 PicoRead32,\r
490 PicoRead16, // unused\r
491 PicoRead32, // unused\r
492};\r
493#endif\r
494\r
495#ifdef EMU_M68K\r
496unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r
497unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r
498unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r
499\r
500// these are allowed to access RAM\r
501unsigned int m68k_read_pcrelative_8 (unsigned int a) {\r
502 a&=0xffffff;\r
503 if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
504 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
505 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
506 return 0;//(u8) lastread_d;\r
507}\r
508unsigned int m68k_read_pcrelative_16(unsigned int a) {\r
509 a&=0xffffff;\r
510 if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
511 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
512 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
513 return 0;//(u16) lastread_d;\r
514}\r
515unsigned int m68k_read_pcrelative_32(unsigned int a) {\r
516 a&=0xffffff;\r
517 if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
518 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
519 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
520 return 0;//lastread_d;\r
521}\r
522\r
523unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r
524unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r
525unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_pcrelative_8 (a); }\r
526unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r
527unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r
528\r
529#ifdef EMU_C68K\r
530// ROM only\r
531unsigned int m68k_read_memory_8(unsigned int a) { if(a<Pico.romsize) return *(u8 *) (Pico.rom+(a^1)); return (u8) lastread_d[lrp_mus++&15]; }\r
532unsigned int m68k_read_memory_16(unsigned int a) { if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1));return (u16) lastread_d[lrp_mus++&15]; }\r
533unsigned int m68k_read_memory_32(unsigned int a) { if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));return (pm[0]<<16)|pm[1];} return lastread_d[lrp_mus++&15]; }\r
534\r
535// ignore writes, Cyclone already done that\r
536void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
537void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
538void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
539#else\r
540unsigned char PicoReadCD8w (unsigned int a);\r
541unsigned short PicoReadCD16w(unsigned int a);\r
542unsigned int PicoReadCD32w(unsigned int a);\r
543void PicoWriteCD8w (unsigned int a, unsigned char d);\r
544void PicoWriteCD16w(unsigned int a, unsigned short d);\r
545void PicoWriteCD32w(unsigned int a, unsigned int d);\r
546\r
547unsigned int m68k_read_memory_8(unsigned int address)\r
548{\r
4f672280 549 return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
cc68a136 550}\r
551\r
552unsigned int m68k_read_memory_16(unsigned int address)\r
553{\r
4f672280 554 return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
cc68a136 555}\r
556\r
557unsigned int m68k_read_memory_32(unsigned int address)\r
558{\r
4f672280 559 return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
cc68a136 560}\r
561\r
562void m68k_write_memory_8(unsigned int address, unsigned int value)\r
563{\r
4f672280 564 if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
cc68a136 565}\r
566\r
567void m68k_write_memory_16(unsigned int address, unsigned int value)\r
568{\r
4f672280 569 if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
cc68a136 570}\r
571\r
572void m68k_write_memory_32(unsigned int address, unsigned int value)\r
573{\r
4f672280 574 if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
cc68a136 575}\r
576#endif\r
577#endif // EMU_M68K\r
578\r
579\r
580// -----------------------------------------------------------------\r
581// z80 memhandlers\r
582\r
583unsigned char z80_read(unsigned short a)\r
584{\r
585 u8 ret = 0;\r
586\r
587 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
588 {\r
589 if(PicoOpt&1) ret = (u8) YM2612Read();\r
590 goto end;\r
591 }\r
592\r
593 if (a>=0x8000)\r
594 {\r
595 u32 addr68k;\r
596 addr68k=Pico.m.z80_bank68k<<15;\r
597 addr68k+=a&0x7fff;\r
598\r
599 ret = (u8) PicoRead8(addr68k);\r
600 //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r
601 goto end;\r
602 }\r
603\r
604 // should not be needed || dprintf("z80_read RAM");\r
605 if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
606\r
607end:\r
608 return ret;\r
609}\r
610\r
611unsigned short z80_read16(unsigned short a)\r
612{\r
613 //dprintf("z80_read16");\r
614\r
615 return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
616}\r
617\r
618void z80_write(unsigned char data, unsigned short a)\r
619{\r
620 //if (a<0x4000)\r
621 // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r
622\r
623 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
624 {\r
625 if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r
626 return;\r
627 }\r
628\r
629 if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
630 {\r
631 if(PicoOpt&2) SN76496Write(data);\r
632 return;\r
633 }\r
634\r
635 if ((a>>8)==0x60)\r
636 {\r
637 Pico.m.z80_bank68k>>=1;\r
638 Pico.m.z80_bank68k|=(data&1)<<8;\r
639 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
640 return;\r
641 }\r
642\r
643 if (a>=0x8000)\r
644 {\r
645 u32 addr68k;\r
646 addr68k=Pico.m.z80_bank68k<<15;\r
647 addr68k+=a&0x7fff;\r
648 PicoWrite8(addr68k, data);\r
649 //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r
650 return;\r
651 }\r
652\r
653 // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
654 if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
655}\r
656\r
657void z80_write16(unsigned short data, unsigned short a)\r
658{\r
659 //dprintf("z80_write16");\r
660\r
661 z80_write((unsigned char) data,a);\r
662 z80_write((unsigned char)(data>>8),(u16)(a+1));\r
663}\r
664\r