avoid using mrs

[cyclone68000.git] / Ea.cpp

\r
// This file is part of the Cyclone 68000 Emulator\r
\r
// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)\r
// Copyright (c) 2005-2011 Gražvydas "notaz" Ignotas (notasas (at) gmail.com)\r
\r
// This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r
// You can choose the license that has the most advantages for you.\r
\r
// SVN repository can be found at http://code.google.com/p/cyclone68000/\r
\r
\r
#include "app.h"\r
\r
int earead_check_addrerr = 1, eawrite_check_addrerr = 0;\r
\r
// some ops use non-standard cycle counts for EAs, so are listed here.\r
// all constants borrowed from the MUSASHI core by Karl Stenerud.\r
\r
/* Extra cycles for JMP instruction (000, 010) */\r
int g_jmp_cycle_table[8] =\r
{\r
	 4, /* EA_MODE_AI   */\r
	 6, /* EA_MODE_DI   */\r
	10, /* EA_MODE_IX   */\r
	 6, /* EA_MODE_AW   */\r
	 8, /* EA_MODE_AL   */\r
	 6, /* EA_MODE_PCDI */\r
	10, /* EA_MODE_PCIX */\r
	 0, /* EA_MODE_I    */\r
};\r
\r
/* Extra cycles for JSR instruction (000, 010) */\r
int g_jsr_cycle_table[8] =\r
{\r
	 4, /* EA_MODE_AI   */\r
	 6, /* EA_MODE_DI   */\r
	10, /* EA_MODE_IX   */\r
	 6, /* EA_MODE_AW   */\r
	 8, /* EA_MODE_AL   */\r
	 6, /* EA_MODE_PCDI */\r
	10, /* EA_MODE_PCIX */\r
	 0, /* EA_MODE_I    */\r
};\r
\r
/* Extra cycles for LEA instruction (000, 010) */\r
int g_lea_cycle_table[8] =\r
{\r
	 4, /* EA_MODE_AI   */\r
	 8, /* EA_MODE_DI   */\r
	12, /* EA_MODE_IX   */\r
	 8, /* EA_MODE_AW   */\r
	12, /* EA_MODE_AL   */\r
	 8, /* EA_MODE_PCDI */\r
	12, /* EA_MODE_PCIX */\r
	 0, /* EA_MODE_I    */\r
};\r
\r
/* Extra cycles for PEA instruction (000, 010) */\r
int g_pea_cycle_table[8] =\r
{\r
	 6, /* EA_MODE_AI   */\r
	10, /* EA_MODE_DI   */\r
	14, /* EA_MODE_IX   */\r
	10, /* EA_MODE_AW   */\r
	14, /* EA_MODE_AL   */\r
	10, /* EA_MODE_PCDI */\r
	14, /* EA_MODE_PCIX */\r
	 0, /* EA_MODE_I    */\r
};\r
\r
/* Extra cycles for MOVEM instruction (000, 010) */\r
int g_movem_cycle_table[8] =\r
{\r
	 0, /* EA_MODE_AI   */\r
	 4, /* EA_MODE_DI   */\r
	 6, /* EA_MODE_IX   */\r
	 4, /* EA_MODE_AW   */\r
	 8, /* EA_MODE_AL   */\r
	 0, /* EA_MODE_PCDI */\r
	 0, /* EA_MODE_PCIX */\r
	 0, /* EA_MODE_I    */\r
};\r
\r
// add nonstandard EA\r
int Ea_add_ns(int *tab, int ea)\r
{\r
    if(ea<0x10)         return 0;\r
    if((ea&0x38)==0x10) return tab[0]; // (An) (ai)\r
    if(ea<0x28)         return 0;\r
    if(ea<0x30)         return tab[1]; // ($nn,An) (di)\r
    if(ea<0x38)         return tab[2]; // ($nn,An,Rn) (ix)\r
    if(ea==0x38)        return tab[3]; // (aw)\r
    if(ea==0x39)        return tab[4]; // (al)\r
    if(ea==0x3a)        return tab[5]; // ($nn,PC) (pcdi)\r
    if(ea==0x3b)        return tab[6]; // ($nn,pc,Rn) (pcix)\r
    if(ea==0x3c)        return tab[7]; // #$nnnn (i)\r
    return 0;\r
}\r
\r
\r
// ---------------------------------------------------------------------------\r
// Gets the offset of a register for an ea, and puts it in 'r'\r
// Shifted left by 'shift'\r
// Doesn't trash anything\r
static int EaCalcReg(int r,int ea,int mask,int forceor,int shift,int noshift=0)\r
{\r
  int i=0,low=0,needor=0;\r
  int lsl=0;\r
\r
  for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r
  mask&=0xf<<low; // This is the max we can do\r
\r
  if (ea>=8)\r
  {\r
    needor=1; // Need to OR to access A0-7\r
    if ((g_op>>low)&8) { needor=0; mask|=8<<low; } // Ah - no we don't actually need to or, since the bit is high in r8\r
    if (forceor) needor=1; // Special case for 0x30-0x38 EAs ;)\r
  }\r
\r
  ot("  and r%d,r8,#0x%.4x\n",r,mask);\r
  if (needor) ot("  orr r%d,r%d,#0x%x ;@ A0-7\n",r,r,8<<low);\r
\r
  // Find out amount to shift left:\r
  lsl=shift-low;\r
\r
  if (lsl&&!noshift)\r
  {\r
    ot("  mov r%d,r%d,",r,r);\r
    if (lsl>0) ot("lsl #%d\n", lsl);\r
    else       ot("lsr #%d\n",-lsl);\r
  }\r
\r
  return 0;\r
}\r
\r
// EaCalc - ARM Register 'a' = Effective Address\r
// If ea>=0x10, trashes r0,r2 and r3, else nothing\r
// size values 0, 1, 2 ~ byte, word, long\r
// mask shows usable bits in r8\r
int EaCalc(int a,int mask,int ea,int size,int top,int sign_extend)\r
{\r
  char text[32]="";\r
\r
  DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r
\r
  if (ea<0x10)\r
  {\r
    int noshift=0;\r
    if (size>=2||(size==0&&(top||!sign_extend))) noshift=1; // Saves one opcode\r
\r
    ot(";@ EaCalc : Get register index into r%d:\n",a);\r
\r
    EaCalcReg(a,ea,mask,0,2,noshift);\r
    return 0;\r
  }\r
\r
  ot(";@ EaCalc : Get '%s' into r%d:\n",text,a);\r
  // (An), (An)+, -(An)\r
  if (ea<0x28)\r
  {\r
    int step=1<<size, strr=a;\r
    int low=0,lsl=0,i;\r
\r
    if ((ea&7)==7 && step<2) step=2; // move.b (a7)+ or -(a7) steps by 2 not 1\r
\r
    if (ea==0x1f||ea==0x27) // A7 handlers are always separate\r
    {\r
      ot("  ldr r%d,[r7,#0x3c] ;@ A7\n",a);\r
    }\r
    else\r
    {\r
      EaCalcReg(2,ea,mask,0,0,1);\r
      if(mask)\r
        for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r
      lsl=2-low; // Having a lsl #x here saves one opcode\r
      if      (lsl>=0) ot("  ldr r%d,[r7,r2,lsl #%i]\n",a,lsl);\r
      else if (lsl<0)  ot("  ldr r%d,[r7,r2,lsr #%i]\n",a,-lsl);\r
    }\r
\r
    if ((ea&0x38)==0x18) // (An)+\r
    {\r
      ot("  add r3,r%d,#%d ;@ Post-increment An\n",a,step);\r
      strr=3;\r
    }\r
\r
    if ((ea&0x38)==0x20) // -(An)\r
      ot("  sub r%d,r%d,#%d ;@ Pre-decrement An\n",a,a,step);\r
\r
    if ((ea&0x38)==0x18||(ea&0x38)==0x20)\r
    {\r
      if (ea==0x1f||ea==0x27)\r
      {\r
        ot("  str r%d,[r7,#0x3c] ;@ A7\n",strr);\r
      }\r
      else\r
      {\r
        if      (lsl>=0) ot("  str r%d,[r7,r2,lsl #%i]\n",strr,lsl);\r
        else if (lsl<0)  ot("  str r%d,[r7,r2,lsr #%i]\n",strr,-lsl);\r
      }\r
    }\r
\r
    if ((ea&0x38)==0x20) Cycles+=size<2 ? 6:10; // -(An) Extra cycles\r
    else                 Cycles+=size<2 ? 4:8;  // (An),(An)+ Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea<0x30) // ($nn,An) (di)\r
  {\r
    ot("  ldrsh r0,[r4],#2 ;@ Fetch offset\n"); pc_dirty=1;\r
    EaCalcReg(2,8,mask,0,0);\r
    ot("  ldr r2,[r7,r2,lsl #2]\n");\r
    ot("  add r%d,r0,r2 ;@ Add on offset\n",a);\r
    Cycles+=size<2 ? 8:12; // Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea<0x38) // ($nn,An,Rn) (ix)\r
  {\r
    ot(";@ Get extension word into r3:\n");\r
    ot("  ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n"); pc_dirty=1;\r
    ot("  mov r2,r3,lsr #10\n");\r
    ot("  tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r
    ot("  and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r
    ot("  ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");\r
    ot("  ldrne   r2,[r7,r2] ;@ r2=Rn.l\n");\r
    ot("  mov r0,r3,asl #24 ;@ r0=Get 8-bit signed Disp\n");\r
    ot("  add r3,r2,r0,asr #24 ;@ r3=Disp+Rn\n");\r
\r
    EaCalcReg(2,8,mask,1,0);\r
    ot("  ldr r2,[r7,r2,lsl #2]\n");\r
    ot("  add r%d,r2,r3 ;@ r%d=Disp+An+Rn\n",a,a);\r
    Cycles+=size<2 ? 10:14; // Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea==0x38) // (aw)\r
  {\r
    ot("  ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a); pc_dirty=1;\r
    Cycles+=size<2 ? 8:12; // Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea==0x39) // (al)\r
  {\r
    ot("  ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n");\r
    ot("  ldrh r0,[r4],#2\n"); pc_dirty=1;\r
    ot("  orr r%d,r0,r2,lsl #16\n",a);\r
    Cycles+=size<2 ? 12:16; // Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea==0x3a) // ($nn,PC) (pcdi)\r
  {\r
    ot("  ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r
    ot("  sub r0,r4,r0 ;@ Real PC\n");\r
    ot("  ldrsh r2,[r4],#2 ;@ Fetch extension\n"); pc_dirty=1;\r
    ot("  add r%d,r2,r0 ;@ ($nn,PC)\n",a);\r
    Cycles+=size<2 ? 8:12; // Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea==0x3b) // ($nn,pc,Rn) (pcix)\r
  {\r
    ot("  ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r
    ot("  ldrh r3,[r4] ;@ Get extension word\n");\r
    ot("  sub r0,r4,r0 ;@ r0=PC\n");\r
    ot("  add r4,r4,#2\n"); pc_dirty=1;\r
    ot("  mov r2,r3,lsr #10\n");\r
    ot("  tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r
    ot("  and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r
    ot("  ldreqsh r2,[r7,r2] ;@ r2=Rn.w\n");\r
    ot("  ldrne   r2,[r7,r2] ;@ r2=Rn.l\n");\r
    ot("  mov r3,r3,asl #24 ;@ r3=Get 8-bit signed Disp\n");\r
    ot("  add r2,r2,r3,asr #24 ;@ r2=Disp+Rn\n");\r
    ot("  add r%d,r2,r0 ;@ r%d=Disp+PC+Rn\n",a,a);\r
    Cycles+=size<2 ? 10:14; // Extra cycles\r
    return 0;\r
  }\r
\r
  if (ea==0x3c) // #$nnnn (i)\r
  {\r
    if (size<2)\r
    {\r
      ot("  ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a); pc_dirty=1;\r
      Cycles+=4; // Extra cycles\r
      return 0;\r
    }\r
\r
    ot("  ldrh r2,[r4],#2 ;@ Fetch immediate value\n");\r
    ot("  ldrh r3,[r4],#2\n"); pc_dirty=1;\r
    ot("  orr r%d,r3,r2,lsl #16\n",a);\r
    Cycles+=8; // Extra cycles\r
    return 0;\r
  }\r
\r
  return 1;\r
}\r
\r
// ---------------------------------------------------------------------------\r
// Read effective address in (ARM Register 'a') to ARM register 'v'\r
// 'a' and 'v' can be anything but 0 is generally best (for both)\r
// If (ea<0x10) nothing is trashed, else r0-r3 is trashed\r
// If 'top' is given, the ARM register v shifted to the top, e.g. 0xc000 -> 0xc0000000\r
// If top is 0 and sign_extend is not, then ARM register v is sign extended,\r
// e.g. 0xc000 -> 0xffffc000 (else it may or may not be sign extended)\r
\r
int EaRead(int a,int v,int ea,int size,int mask,int top,int sign_extend,int set_nz)\r
{\r
  char text[32]="";\r
  const char *s="";\r
  int flags_set=0;\r
  int shift=0;\r
\r
  if (set_nz) s="s";\r
\r
  shift=32-(8<<size);\r
\r
  DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r
\r
  if (ea<0x10)\r
  {\r
    int lsl=0,low=0,nsarm=size&3,i;\r
    if (size>=2||(size==0&&(top||!sign_extend))) {\r
      if(mask)\r
        for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r
      lsl=2-low; // Having a lsl #2 here saves one opcode\r
    }\r
\r
    if (top||!sign_extend) nsarm=3;\r
\r
    ot(";@ EaRead : Read register[r%d] into r%d:\n",a,v);\r
\r
    if      (lsl>0) ot("  ldr%s r%d,[r7,r%d,lsl #%i]\n",Narm[nsarm],v,a,lsl);\r
    else if (lsl<0) ot("  ldr%s r%d,[r7,r%d,lsr #%i]\n",Narm[nsarm],v,a,-lsl);\r
    else            ot("  ldr%s r%d,[r7,r%d]\n",Sarm[nsarm],v,a);\r
\r
    if (top&&shift) ot("  mov%s r%d,r%d,asl #%d\n",s,v,v,shift);\r
    else if(set_nz) ot("  tst r%d,r%d\n",v,v);\r
\r
    ot("\n"); return 0;\r
  }\r
\r
  ot(";@ EaRead : Read '%s' (address in r%d) into r%d:\n",text,a,v);\r
\r
  if (ea==0x3c)\r
  {\r
    int asl=0;\r
\r
    if (top) asl=shift;\r
\r
    if (asl)         ot("  mov%s r%d,r%d,asl #%d\n",s,v,a,asl);\r
    else if (v!=a)   ot("  mov%s r%d,r%d\n",s,v,a);\r
    else if (set_nz) ot("  tst r%d,r%d\n",v,v);\r
    ot("\n"); return 0;\r
  }\r
\r
  if (ea>=0x3a && ea<=0x3b) MemHandler(2,size,a,earead_check_addrerr); // Fetch\r
  else                      MemHandler(0,size,a,earead_check_addrerr); // Read\r
\r
  // defaults to 1, as most things begins with a read\r
  earead_check_addrerr=1;\r
\r
  if (sign_extend)\r
  {\r
    int d_reg=0;\r
    if (shift) {\r
      ot("  mov%s r%d,r%d,asl #%d\n",s,v,d_reg,shift);\r
      d_reg=v;\r
      flags_set=1;\r
    }\r
    if (!top && shift) {\r
      ot("  mov%s r%d,r%d,asr #%d\n",s,v,d_reg,shift);\r
      d_reg=v;\r
      flags_set=1;\r
    }\r
    if (d_reg != v) {\r
      ot("  mov%s r%d,r%d\n",s,v,d_reg);\r
      flags_set=1;\r
    }\r
  }\r
  else\r
  {\r
    if (top && shift) {\r
      ot("  mov%s r%d,r0,asl #%d\n",s,v,shift);\r
      flags_set=1;\r
    }\r
    else if (v!=0) {\r
      ot("  mov%s r%d,r0\n",s,v);\r
      flags_set=1;\r
    }\r
  }\r
\r
  if (set_nz&&!flags_set)\r
    ot("  tst r%d,r%d\n",v,v);\r
\r
  ot("\n"); return 0;\r
}\r
\r
// calculate EA and  read\r
// if (ea  < 0x10) nothing is trashed\r
// if (ea == 0x3c) r2 and r3 are trashed\r
// else r0-r3 are trashed\r
// size values 0, 1, 2 ~ byte, word, long\r
// r_ea is reg to store ea in (-1 means ea is not needed), r is dst reg\r
// if sign_extend is 0, non-32bit values will have MS bits undefined\r
int EaCalcRead(int r_ea,int r,int ea,int size,int mask,int sign_extend,int set_nz)\r
{\r
  if (ea<0x10)\r
  {\r
    if (r_ea==-1)\r
    {\r
      r_ea=r;\r
      if (!sign_extend) size=2;\r
    }\r
  }\r
  else if (ea==0x3c) // #imm\r
  {\r
    r_ea=r;\r
  }\r
  else\r
  {\r
    if (r_ea==-1) r_ea=0;\r
  }\r
\r
  EaCalc (r_ea,mask,ea,size,0,sign_extend);\r
  EaRead (r_ea,   r,ea,size,mask,0,sign_extend,set_nz);\r
\r
  return 0;\r
}\r
\r
int EaCalcReadNoSE(int r_ea,int r,int ea,int size,int mask)\r
{\r
  return EaCalcRead(r_ea,r,ea,size,mask,0);\r
}\r
\r
// Return 1 if we can read this ea\r
int EaCanRead(int ea,int size)\r
{\r
  if (size<0)\r
  {\r
    // LEA:\r
    // These don't make sense?:\r
    if (ea< 0x10) return 0; // Register\r
    if (ea==0x3c) return 0; // Immediate\r
    if (ea>=0x18 && ea<0x28) return 0; // Pre/Post inc/dec An\r
  }\r
\r
  if (ea<=0x3c) return 1;\r
  return 0;\r
}\r
\r
// ---------------------------------------------------------------------------\r
// Write effective address (ARM Register 'a') with ARM register 'v'\r
// Trashes r0-r3,r12,lr; 'a' can be 0 or 2+, 'v' can be 1 or higher\r
// If a==0 and v==1 it's faster though.\r
int EaWrite(int a,int v,int ea,int size,int mask,int top,int sign_extend_ea)\r
{\r
  char text[32]="";\r
  int shift=0;\r
\r
  if(a == 1) { printf("Error! EaWrite a==1 !\n"); return 1; }\r
\r
  if (top) shift=32-(8<<size);\r
\r
  DisaPc=2; DisaGetEa(text,ea,size); // Get text version of the effective address\r
\r
  if (ea<0x10)\r
  {\r
    int lsl=0,low=0,i;\r
    if (size>=2||(size==0&&(top||!sign_extend_ea))) {\r
      if(mask)\r
        for (i=mask|0x8000; (i&1)==0; i>>=1) low++; // Find out how high up the EA mask is\r
      lsl=2-low; // Having a lsl #x here saves one opcode\r
    }\r
\r
    ot(";@ EaWrite: r%d into register[r%d]:\n",v,a);\r
    if (shift)  ot("  mov r%d,r%d,asr #%d\n",v,v,shift);\r
\r
    if      (lsl>0) ot("  str%s r%d,[r7,r%d,lsl #%i]\n",Narm[size&3],v,a,lsl);\r
    else if (lsl<0) ot("  str%s r%d,[r7,r%d,lsr #%i]\n",Narm[size&3],v,a,-lsl);\r
    else            ot("  str%s r%d,[r7,r%d]\n",Narm[size&3],v,a);\r
\r
    ot("\n"); return 0;\r
  }\r
\r
  ot(";@ EaWrite: Write r%d into '%s' (address in r%d):\n",v,text,a);\r
\r
  if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; }\r
\r
  if (shift)     ot("  mov r1,r%d,asr #%d\n",v,shift);\r
  else if (v!=1) ot("  mov r1,r%d\n",v);\r
\r
  MemHandler(1,size,a,eawrite_check_addrerr); // Call write handler\r
\r
  // not check by default, because most cases are rmw and\r
  // address was already checked before reading\r
  eawrite_check_addrerr = 0;\r
\r
  ot("\n"); return 0;\r
}\r
\r
// Return 1 if we can write this ea\r
int EaCanWrite(int ea)\r
{\r
  if (ea<=0x39) return 1; // 3b?\r
  return 0;\r
}\r
// ---------------------------------------------------------------------------\r
\r
// Return 1 if EA is An reg\r
int EaAn(int ea)\r
{\r
  if((ea&0x38)==8) return 1;\r
  return 0;\r
}\r
\r