fix compatibility with ancient gas

[cyclone68000.git] / OpArith.cpp

\r
// This file is part of the Cyclone 68000 Emulator\r
\r
// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)\r
// Copyright (c) 2005-2011 Gražvydas "notaz" Ignotas (notasas (at) gmail.com)\r
\r
// This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r
// You can choose the license that has the most advantages for you.\r
\r
// SVN repository can be found at http://code.google.com/p/cyclone68000/\r
\r
\r
#include "app.h"\r
\r
// --------------------- Opcodes 0x0000+ ---------------------\r
// Emit an Ori/And/Sub/Add/Eor/Cmp Immediate opcode, 0000ttt0 ssaaaaaa\r
int OpArith(int op)\r
{\r
  int type=0,size=0;\r
  int sea=0,tea=0;\r
  int use=0;\r
  const char *shiftstr="";\r
\r
  // Get source and target EA\r
  type=(op>>9)&7; if (type==4 || type>=7) return 1;\r
  size=(op>>6)&3; if (size>=3) return 1;\r
  sea=   0x003c;\r
  tea=op&0x003f;\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead(tea,size)==0) return 1;\r
  if (EaCanWrite(tea)==0 || EaAn(tea)) return 1;\r
\r
  use=OpBase(op,size);\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op, sea, tea); Cycles=4;\r
\r
  // imm must be read first\r
  EaCalcRead(-1,10,sea,size,0,earwt_msb_dont_care);\r
  EaCalcRead((type!=6)?11:-1,0,tea,size,0x003f,earwt_msb_dont_care);\r
\r
  if (size<2) shiftstr=(char *)(size?",asl #16":",asl #24");\r
  if (size<2) ot("  mov r10,r10,asl #%i\n",size?16:24);\r
\r
  ot(";@ Do arithmetic:\n");\r
\r
  if (type==0) ot("  orrs r1,r10,r0%s\n",shiftstr);\r
  if (type==1) ot("  ands r1,r10,r0%s\n",shiftstr);\r
  if (type==2||type==6)\r
               ot("  rsbs r1,r10,r0%s ;@ Defines NZCV\n",shiftstr);\r
  if (type==3) ot("  adds r1,r10,r0%s ;@ Defines NZCV\n",shiftstr);\r
  if (type==5) ot("  eors r1,r10,r0%s\n",shiftstr);\r
\r
  if (type< 2) OpGetFlagsNZ(1); // Ori/And\r
  if (type==2) OpGetFlags(1,1); // Sub: Subtract/X-bit\r
  if (type==3) OpGetFlags(0,1); // Add: X-bit\r
  if (type==5) OpGetFlagsNZ(1); // Eor\r
  if (type==6) OpGetFlags(1,0); // Cmp: Subtract\r
  ot("\n");\r
\r
  if (type!=6)\r
  {\r
    EaWrite(11, 1, tea,size,0x003f,earwt_shifted_up);\r
  }\r
\r
  // Correct cycles:\r
  if (type==6)\r
  {\r
    if (size>=2 && tea<0x10) Cycles+=2;\r
  }\r
  else\r
  {\r
    if (size>=2) Cycles+=4;\r
    if (tea>=8)  Cycles+=4;\r
    if (type==1 && size>=2 && tea<8) Cycles-=2;\r
  }\r
\r
  OpEnd(sea,tea);\r
\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0x5000+ ---------------------\r
int OpAddq(int op)\r
{\r
  // 0101nnnt xxeeeeee (nnn=#8,1-7 t=addq/subq xx=size, eeeeee=EA)\r
  int num=0,type=0,size=0,ea=0;\r
  int use=0;\r
  char count[16]="";\r
  int shift=0;\r
\r
  num =(op>>9)&7; if (num==0) num=8;\r
  type=(op>>8)&1;\r
  size=(op>>6)&3; if (size>=3) return 1;\r
  ea  = op&0x3f;\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead (ea,size)==0) return 1;\r
  if (EaCanWrite(ea)     ==0) return 1;\r
  if (size == 0 && EaAn(ea) ) return 1;\r
\r
  use=OpBase(op,size,1);\r
\r
  if (num!=8) use|=0x0e00; // If num is not 8, use same handler\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,ea);\r
  Cycles=ea<8?4:8;\r
  if(type==0&&size==1) Cycles=ea<0x10?4:8;\r
  if(size>=2) Cycles=ea<0x10?8:12;\r
\r
  if (size>0 && (ea&0x38)==0x08) size=2; // addq.w #n,An is also 32-bit\r
\r
  EaCalcRead(11,0,ea,size,0x003f,earwt_msb_dont_care);\r
\r
  shift=32-(8<<size);\r
\r
  if (num!=8)\r
  {\r
    int lsr=9-shift;\r
\r
    ot("  and r2,r8,#0x0e00 ;@ Get quick value\n");\r
\r
    if (lsr>=0) sprintf(count,"r2,lsr #%d",  lsr);\r
    else        sprintf(count,"r2,lsl #%d", -lsr);\r
\r
    ot("\n");\r
  }\r
  else\r
  {\r
    sprintf(count,"#0x%.4x",8<<shift);\r
  }\r
\r
  if (size<2)  ot("  mov r0,r0,asl #%d\n\n",size?16:24);\r
\r
  if (type==0) ot("  adds r1,r0,%s\n",count);\r
  if (type==1) ot("  subs r1,r0,%s\n",count);\r
\r
  if ((ea&0x38)!=0x08) OpGetFlags(type,1);\r
  ot("\n");\r
\r
  EaWrite(11, 1, ea,size,0x003f,earwt_shifted_up);\r
\r
  OpEnd(ea);\r
\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0x8000+ ---------------------\r
// 1t0tnnnd xxeeeeee (tt=type:or/sub/and/add xx=size, eeeeee=EA)\r
int OpArithReg(int op)\r
{\r
  int use=0;\r
  int type=0,size=0,dir=0,rea=0,ea=0;\r
  const char *asl="";\r
  const char *strop=0;\r
\r
  type=(op>>12)&5;\r
  rea =(op>> 9)&7;\r
  dir =(op>> 8)&1; // er,re\r
  size=(op>> 6)&3; if (size>=3) return 1;\r
  ea  = op&0x3f;\r
\r
  if (dir && ea<0x10) return 1; // addx/subx opcode\r
\r
  // See if we can do this opcode:\r
  if (dir==0 && EaCanRead (ea,size)==0) return 1;\r
  if (dir    && EaCanWrite(ea)==0)      return 1;\r
  if ((size==0||!(type&1))&&EaAn(ea))   return 1;\r
\r
  use=OpBase(op,size);\r
  use&=~0x0e00; // Use same opcode for Dn\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,ea); Cycles=4;\r
\r
  EaCalcRead(dir?11:-1,0,ea,size,0x003f,earwt_msb_dont_care);\r
\r
  EaCalcRead(dir?-1:11,1,rea,size,0x0e00,earwt_msb_dont_care);\r
\r
  ot(";@ Do arithmetic:\n");\r
  if (type==0) strop = "orrs";\r
  if (type==1) strop = (char *) (dir ? "subs" : "rsbs");\r
  if (type==4) strop = "ands";\r
  if (type==5) strop = "adds";\r
\r
  if (size==0) asl=",asl #24";\r
  if (size==1) asl=",asl #16";\r
\r
  if (size<2) ot("  mov r0,r0%s\n",asl);\r
  ot("  %s r1,r0,r1%s\n",strop,asl);\r
\r
  if (type&1) OpGetFlags(type==1,type&1); // add/subtract\r
  else        OpGetFlagsNZ(1);\r
  ot("\n");\r
\r
  ot(";@ Save result:\n");\r
  if (size<2) ot("  mov r1,r1,asr #%d\n",size?16:24);\r
  if (dir) EaWrite(11, 1, ea,size,0x003f,earwt_msb_dont_care);\r
  else     EaWrite(11, 1,rea,size,0x0e00,earwt_msb_dont_care);\r
\r
  if(rea==ea) {\r
    if(ea<8) Cycles=(size>=2)?8:4; else Cycles+=(size>=2)?26:14;\r
  } else if(dir) {\r
    Cycles+=4;\r
    if(size>=2) Cycles+=4;\r
  } else {\r
    if(size>=2) {\r
      Cycles+=2;\r
      if(ea<0x10||ea==0x3c) Cycles+=2;\r
    }\r
  }\r
\r
  OpEnd(ea);\r
\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0x80c0+ ---------------------\r
int OpMul(int op)\r
{\r
  // Div/Mul: 1m00nnns 11eeeeee (m=Mul, nnn=Register Dn, s=signed, eeeeee=EA)\r
  int type=0,rea=0,sign=0,ea=0;\r
  int use=0;\r
\r
  type=(op>>14)&1; // div/mul\r
  rea =(op>> 9)&7;\r
  sign=(op>> 8)&1;\r
  ea  = op&0x3f;\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead(ea,1)==0||EaAn(ea)) return 1;\r
\r
  use=OpBase(op,1);\r
  use&=~0x0e00; // Use same for all registers\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,ea);\r
  if(type) Cycles=54;\r
  else     Cycles=sign?158:140;\r
\r
  EaCalcRead(-1,0,ea,1,0x003f,earwt_msb_dont_care);\r
\r
  EaCalc(11,0x0e00,rea, 2);\r
  EaRead(11,     2,rea, 2,0x0e00);\r
\r
  ot("  movs r1,r0,asl #16\n");\r
\r
  if (type==0) // div\r
  {\r
    // the manual says C is always cleared, but neither Musashi nor FAME do that\r
    //ot("  bic r10,r10,#0x20000000 ;@ always clear C\n");\r
    ot("  beq divzero%.4x ;@ division by zero\n",op);\r
    ot("\n");\r
    \r
    if (sign)\r
    {\r
      ot("  mov r12,#0 ;@ r12 = 1 or 2 if the result is negative\n");\r
      ot("  tst r2,r2\n");\r
      ot("  orrmi r12,r12,#2\n");\r
      ot("  rsbmi r2,r2,#0 ;@ Make r2 positive\n");\r
      ot("\n");\r
      ot("  movs r0,r1,asr #16\n");\r
      ot("  orrmi r12,r12,#1\n");\r
      ot("  rsbmi r0,r0,#0 ;@ Make r0 positive\n");\r
      ot("\n");\r
      ot(";@ detect the nasty 0x80000000 / -1 situation\n");\r
      ot("  mov r3,r2,asr #31\n");\r
      ot("  eors r3,r3,r1,asr #16\n");\r
      ot("  beq wrendofop%.4x\n",op);\r
    }\r
    else\r
    {\r
      ot("  mov r0,r1,lsr #16 ;@ use only 16 bits of divisor\n");\r
    }\r
\r
    ot("\n");\r
    ot(";@ Divide r2 by r0\n");\r
    ot("  mov r3,#0\n");\r
    ot("  mov r1,r0\n");\r
    ot("\n");\r
    ot(";@ Shift up divisor till it's just less than numerator\n");\r
    ot("Shift%.4x%s\n",op,ms?"":":");\r
    ot("  cmp r1,r2,lsr #1\n");\r
    ot("  movls r1,r1,lsl #1\n");\r
    ot("  bcc Shift%.4x\n",op);\r
    ot("\n");\r
\r
    ot("Divide%.4x%s\n",op,ms?"":":");\r
    ot("  cmp r2,r1\n");\r
    ot("  adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n");\r
    ot("  subcs r2,r2,r1\n");\r
    ot("  teq r1,r0\n");\r
    ot("  movne r1,r1,lsr #1\n");\r
    ot("  bne Divide%.4x\n",op);\r
    ot("\n");\r
    ot(";@r3==quotient,r2==remainder\n");\r
\r
    if (sign)\r
    {\r
      // sign correction\r
      ot("  and r1,r12,#1\n");\r
      ot("  teq r1,r12,lsr #1\n");\r
      ot("  rsbne r3,r3,#0 ;@ negate if quotient is negative\n");\r
      ot("  tst r12,#2\n");\r
      ot("  rsbne r2,r2,#0 ;@ negate the remainder if divident was negative\n");\r
      ot("\n");\r
\r
      // signed overflow check\r
      ot("  mov r1,r3,asl #16\n");\r
      ot("  cmp r3,r1,asr #16 ;@ signed overflow?\n");\r
      ot("  orrne r10,r10,#0x10000000 ;@ set overflow flag\n");\r
      ot("  bne endofop%.4x ;@ overflow!\n",op);\r
      ot("\n");\r
      ot("wrendofop%.4x%s\n",op,ms?"":":");\r
    }\r
    else\r
    {\r
      // overflow check\r
      ot("  movs r1,r3,lsr #16 ;@ check for overflow condition\n");\r
      ot("  orrne r10,r10,#0x10000000 ;@ set overflow flag\n");\r
      ot("  bne endofop%.4x ;@ overflow!\n",op);\r
      ot("\n");\r
    }\r
\r
    ot("  movs r1,r3,lsl #16 ;@ Clip to 16-bits\n");\r
    OpGetFlagsNZ(1);\r
\r
    ot("  mov r1,r1,lsr #16\n");\r
    ot("  orr r1,r1,r2,lsl #16 ;@ Insert remainder\n");\r
  }\r
\r
  if (type==1)\r
  {\r
    ot(";@ Get 16-bit signs right:\n");\r
    ot("  mov r0,r1,%s #16\n",sign?"asr":"lsr");\r
    ot("  mov r2,r2,lsl #16\n");\r
    ot("  mov r2,r2,%s #16\n",sign?"asr":"lsr");\r
    ot("\n");\r
\r
    ot("  muls r1,r2,r0\n");\r
    OpGetFlagsNZ(1);\r
  }\r
  ot("\n");\r
\r
  EaWrite(11, 1,rea, 2,0x0e00,earwt_shifted_up);\r
\r
  if (type==0) ot("endofop%.4x%s\n",op,ms?"":":");\r
  OpEnd(ea);\r
\r
  if (type==0) // div\r
  {\r
    ot("divzero%.4x%s\n",op,ms?"":":");\r
    ot("  mov r0,#5 ;@ Divide by zero\n");\r
    ot("  bl Exception\n");\r
    Cycles+=38;\r
    OpEnd(ea);\r
    ot("\n");\r
  }\r
\r
  return 0;\r
}\r
\r
// Get X Bit into carry - trashes r2\r
int GetXBit(int subtract)\r
{\r
  ot(";@ Get X bit:\n");\r
  ot("  ldr r2,[r7,#0x4c]\n");\r
  if (subtract) ot("  mvn r2,r2 ;@ Invert it\n");\r
  ot("  tst r2,r2,lsl #3 ;@ Get into Carry\n");\r
  ot("\n");\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0x8100+ ---------------------\r
// 1t00ddd1 0000asss - sbcd/abcd Ds,Dd or -(As),-(Ad)\r
int OpAbcd(int op)\r
{\r
  int use=0;\r
  int type=0,sea=0,mem=0,dea=0;\r
  \r
  type=(op>>14)&1; // sbcd/abcd\r
  dea =(op>> 9)&7;\r
  mem =(op>> 3)&1;\r
  sea = op     &7;\r
\r
  if (mem) { sea|=0x20; dea|=0x20; }\r
\r
  use=op&~0x0e07; // Use same opcode for all registers..\r
  if (sea==0x27) use|=0x0007; // ___x.b -(a7)\r
  if (dea==0x27) use|=0x0e00; // ___x.b -(a7)\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,sea,dea); Cycles=6;\r
\r
  if (mem)\r
  {\r
    ot(";@ Get src/dest EA vals\n");\r
    EaCalc (0,0x000f, sea,0,earwt_msb_dont_care);\r
    EaRead (0,     6, sea,0,0x000f,earwt_msb_dont_care);\r
    EaCalcRead(11,0,dea,0,0x0e00,earwt_msb_dont_care);\r
  }\r
  else\r
  {\r
    ot(";@ Get src/dest reg vals\n");\r
    EaCalcRead(-1,6,sea,0,0x0007,earwt_msb_dont_care);\r
    EaCalcRead(11,0,dea,0,0x0e00,earwt_msb_dont_care);\r
  }\r
\r
  ot("  bic r10,r10,#0xb1000000 ;@ clear all flags except old Z\n");\r
\r
  ot("  ldr r1,[r7,#0x4c] ;@ Get X bit\n");\r
  ot("  and r2,r0,#0x0f\n");\r
  ot("  movs r12,r1,lsl #3 ;@ X into carry\n");\r
  ot("  and r1,r6,#0x0f\n");\r
  if (type)\r
  {\r
    // abcd\r
    ot("  adc r1,r2,r1\n");\r
    ot("  cmp r1,#9\n");\r
\r
    ot("  and r0,r0,#0xf0\n");\r
    ot("  and r6,r6,#0xf0\n");\r
    ot("  add r1,r1,r0\n");\r
    ot("  add r1,r1,r6\n");\r
    ot("  mov r12,r1\n");\r
    ot("  addhi r12,r12,#6 ;@ Decimal adjust units\n");\r
    ot("  tst r1,#0x80\n");\r
    ot("  orreq r10,r10,#0x10000000 ;@ Undefined V behavior\n");\r
    ot("  cmp r12,#0x9f\n");\r
    ot("  orrhi r10,r10,#0x20000000 ;@ C\n");\r
    ot("  subhi r12,r12,#0xa0\n");\r
    ot("  movs r0,r12,lsl #24\n");\r
    ot("  bicpl r10,r10,#0x10000000 ;@ Undefined V behavior part II\n");\r
  }\r
  else\r
  {\r
    // sbcd\r
    ot("  mov r12,#0 ;@ corf\n");\r
    ot("  adc r1,r1,#0\n");\r
    ot("  sub r1,r2,r1\n");\r
    ot("  cmp r1,#0x0f\n");\r
    ot("  movhi r12,#6\n");\r
\r
    ot("  and r0,r0,#0xf0\n");\r
    ot("  and r6,r6,#0xf0\n");\r
    ot("  add r1,r1,r0\n");\r
    ot("  sub r1,r1,r6\n");\r
    ot("  tst r1,#0x80\n");\r
    ot("  orrne r10,r10,#0x10000000 ;@ Undefined V behavior\n");\r
    ot("  cmp r1,r12\n");\r
    ot("  orrlt r10,r10,#0x20000000 ;@ C\n");\r
    ot("  cmp r1,#0xff\n");\r
    ot("  addhi r1,r1,#0xa0\n");\r
    ot("  sub r12,r1,r12\n");\r
    ot("  movs r0,r12,lsl #24\n");\r
    ot("  bicmi r10,r10,#0x10000000 ;@ Undefined V behavior part II\n");\r
  }\r
\r
  ot("  orrmi r10,r10,#0x80000000 ;@ Undefined N behavior\n");\r
  ot("  bicne r10,r10,#0x40000000 ;@ Z flag\n");\r
  ot("  str r10,[r7,#0x4c] ;@ Save X bit\n");\r
  ot("\n");\r
\r
  EaWrite(11, 0, dea,0,0x0e00,earwt_shifted_up);\r
\r
  ot("  ldr r6,[r7,#0x54]\n");\r
  OpEnd(sea,dea);\r
\r
  return 0;\r
}\r
\r
// 01001000 00eeeeee - nbcd <ea>\r
int OpNbcd(int op)\r
{\r
  int use=0;\r
  int ea=0;\r
  \r
  ea=op&0x3f;\r
\r
  if(EaCanWrite(ea)==0||EaAn(ea)) return 1;\r
\r
  use=OpBase(op,0);\r
  if(op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,ea); Cycles=6;\r
  if(ea >= 8)  Cycles+=2;\r
\r
  EaCalcRead(11,0,ea,0,0x003f,earwt_zero_extend);\r
\r
  // this is rewrite of Musashi's code\r
  ot("  ldr r2,[r7,#0x4c]\n");\r
  ot("  bic r10,r10,#0xb0000000 ;@ clear all flags, except Z\n");\r
  ot("  and r2,r2,#0x20000000\n");\r
  ot("  rsb r1,r0,#0 ;@ do arithmetic\n");\r
  ot("  subs r1,r1,r2,lsr #29 ;@ X\n");\r
\r
  ot("  beq finish%.4x\n",op);\r
  ot("\n");\r
\r
  ot("  movs r1,r1,lsl #24\n");\r
  ot("  orrmi r10,r10,#0x10000000 ;@ Undefined V behavior\n");\r
  ot("  orr r2,r1,r0,lsl #24\n");\r
  ot("  tst r2,#0x0f000000\n");\r
  ot("  andeq r1,r1,#0xf0000000\n");\r
  ot("  orreq r1,r1,#0x06000000\n");\r
  ot("  adds r1,r1,#0x9a000000\n");\r
  ot("  bicmi r10,r10,#0x10000000 ;@ Undefined V behavior part II\n");\r
  ot("  orrmi r10,r10,#0x80000000 ;@ Undefined N behavior\n");\r
  ot("  bicne r10,r10,#0x40000000 ;@ Z\n");\r
  ot("  orr r10,r10,#0x20000000 ;@ C\n");\r
  ot("\n");\r
\r
  EaWrite(11, 1, ea,0,0x3f,earwt_shifted_up);\r
\r
  ot("finish%.4x%s\n",op,ms?"":":");\r
  ot("  str r10,[r7,#0x4c] ;@ Save X\n");\r
  ot("\n");\r
\r
  ot("  ldr r6,[r7,#0x54]\n");\r
  OpEnd(ea);\r
\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0x90c0+ ---------------------\r
// Suba/Cmpa/Adda 1tt1nnnx 11eeeeee (tt=type, x=size, eeeeee=Source EA)\r
int OpAritha(int op)\r
{\r
  int use=0;\r
  int type=0,size=0,sea=0,dea=0;\r
  const char *asr="";\r
\r
  // Suba/Cmpa/Adda/(invalid):\r
  type=(op>>13)&3; if (type>=3) return 1;\r
\r
  size=(op>>8)&1; size++;\r
  dea=(op>>9)&7; dea|=8; // Dest=An\r
  sea=op&0x003f; // Source\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead(sea,size)==0) return 1;\r
\r
  use=OpBase(op,size);\r
  use&=~0x0e00; // Use same opcode for An\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,sea); Cycles=(size==2)?6:8;\r
  if(size==2&&(sea<0x10||sea==0x3c)) Cycles+=2;\r
  if(type==1) Cycles=6;\r
\r
  // EA calculation order defines how situations like  suba.w (A0)+, A0 get handled.\r
  // different emus act differently in this situation, I couldn't fugure which is right behaviour.\r
  //if (type == 1)\r
  {\r
    EaCalcRead(-1,0,sea,size,0x003f,earwt_msb_dont_care);\r
    EaCalcRead(type!=1?11:-1,1,dea,2,0x0e00,earwt_msb_dont_care);\r
  }\r
#if 0\r
  else\r
  {\r
    EaCalcRead(type!=1?11:-1,1,dea,2,0x0e00,earwt_msb_dont_care);\r
    EaCalcRead(-1,0,sea,size,0x003f,earwt_msb_dont_care);\r
  }\r
#endif\r
\r
  if (size<2) ot("  mov r0,r0,asl #%d\n\n",size?16:24);\r
  if (size<2) asr=(char *)(size?",asr #16":",asr #24");\r
\r
  if (type==0) ot("  sub r1,r1,r0%s\n",asr);\r
  if (type==1) ot("  cmp r1,r0%s ;@ Defines NZCV\n",asr);\r
  if (type==1) OpGetFlags(1,0); // Get Cmp flags\r
  if (type==2) ot("  add r1,r1,r0%s\n",asr);\r
  ot("\n");\r
\r
  if (type!=1) EaWrite(11, 1, dea,2,0x0e00);\r
\r
  OpEnd(sea);\r
\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0x9100+ ---------------------\r
// Emit a Subx/Addx opcode, 1t01ddd1 zz00rsss addx.z Ds,Dd\r
int OpAddx(int op)\r
{\r
  int use=0;\r
  int type=0,size=0,dea=0,sea=0,mem=0;\r
  const char *asl="";\r
\r
  type=(op>>14)&1;\r
  dea =(op>> 9)&7;\r
  size=(op>> 6)&3; if (size>=3) return 1;\r
  sea = op&7;\r
  mem =(op>> 3)&1;\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead(sea,size)==0) return 1;\r
  if (EaCanWrite(dea)==0) return 1;\r
\r
  if (mem) { sea+=0x20; dea+=0x20; }\r
\r
  use=op&~0x0e07; // Use same opcode for Dn\r
  if (size==0&&sea==0x27) use|=0x0007; // ___x.b -(a7)\r
  if (size==0&&dea==0x27) use|=0x0e00; // ___x.b -(a7)\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,sea,dea); Cycles=4;\r
  if(size>=2)   Cycles+=4;\r
  if(sea>=0x10) Cycles+=2;\r
\r
  if (mem)\r
  {\r
    ot(";@ Get src/dest EA vals\n");\r
    EaCalc (0,0x000f, sea,size,earwt_shifted_up);\r
    EaRead (0,     6, sea,size,0x000f,earwt_shifted_up);\r
    EaCalcRead(11,0,dea,size,0x0e00,earwt_msb_dont_care);\r
  }\r
  else\r
  {\r
    ot(";@ Get src/dest reg vals\n");\r
    EaCalcRead(-1,6,sea,size,0x0007,earwt_msb_dont_care);\r
    EaCalcRead(11,0,dea,size,0x0e00,earwt_msb_dont_care);\r
    if (size<2) ot("  mov r6,r6,asl #%d\n\n",size?16:24);\r
  }\r
\r
  if (size<2) asl=(char *)(size?",asl #16":",asl #24");\r
\r
  ot(";@ Do arithmetic:\n");\r
  GetXBit(type==0);\r
\r
  if (type==1 && size<2)\r
  {\r
    ot(";@ Make sure the carry bit will tip the balance:\n");\r
    ot("  mvn r2,#0\n");\r
    ot("  orr r6,r6,r2,lsr #%i\n",(size==0)?8:16);\r
    ot("\n");\r
  }\r
\r
  if (type==0) ot("  rscs r1,r6,r0%s\n",asl);\r
  if (type==1) ot("  adcs r1,r6,r0%s\n",asl);\r
  ot("  orr r3,r10,#0xb0000000 ;@ for old Z\n");\r
  OpGetFlags(type==0,1,0); // subtract\r
  if (size<2) {\r
    ot("  movs r2,r1,lsr #%i\n", size?16:24);\r
    ot("  orreq r10,r10,#0x40000000 ;@ add potentially missed Z\n");\r
  }\r
  ot("  andeq r10,r10,r3 ;@ fix Z\n");\r
  ot("\n");\r
\r
  ot(";@ Save result:\n");\r
  EaWrite(11, 1, dea,size,0x0e00,earwt_shifted_up);\r
\r
  ot("  ldr r6,[r7,#0x54]\n");\r
  OpEnd(sea,dea);\r
\r
  return 0;\r
}\r
\r
// --------------------- Opcodes 0xb000+ ---------------------\r
// Emit a Cmp/Eor opcode, 1011rrrt xxeeeeee (rrr=Dn, t=cmp/eor, xx=size extension, eeeeee=ea)\r
int OpCmpEor(int op)\r
{\r
  int rea=0,eor=0;\r
  int size=0,ea=0,use=0;\r
  const char *asl="";\r
\r
  // Get EA and register EA\r
  rea=(op>>9)&7;\r
  eor=(op>>8)&1;\r
  size=(op>>6)&3; if (size>=3) return 1;\r
  ea=op&0x3f;\r
\r
  if (eor && (ea>>3) == 1) return 1; // not a valid mode for eor\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead(ea,size)==0) return 1;\r
  if (eor && EaCanWrite(ea)==0) return 1;\r
  if (EaAn(ea)&&(eor||size==0)) return 1;\r
\r
  use=OpBase(op,size);\r
  use&=~0x0e00; // Use 1 handler for register d0-7\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,ea); Cycles=4;\r
  if(eor) {\r
    if(ea>8)     Cycles+=4;\r
    if(size>=2)  Cycles+=4;\r
  } else {\r
    if(size>=2)  Cycles+=2;\r
  }\r
\r
  ot(";@ Get EA into r11 and value into r0:\n");\r
  EaCalcRead(eor?11:-1,0,ea,size,0x003f,earwt_msb_dont_care);\r
\r
  ot(";@ Get register operand into r1:\n");\r
  EaCalcRead(-1,1,rea,size,0x0e00,earwt_msb_dont_care);\r
\r
  if (size<2) ot("  mov r0,r0,asl #%d\n\n",size?16:24);\r
  if (size<2) asl=(char *)(size?",asl #16":",asl #24");\r
\r
  ot(";@ Do arithmetic:\n");\r
  if (eor)\r
  {\r
    ot("  eors r1,r0,r1%s\n",asl);\r
    OpGetFlagsNZ(1);\r
  }\r
  else\r
  {\r
    ot("  rsbs r1,r0,r1%s\n",asl);\r
    OpGetFlags(1,0); // Cmp like subtract\r
  }\r
  ot("\n");\r
\r
  if (eor) EaWrite(11, 1,ea,size,0x003f,earwt_shifted_up);\r
\r
  OpEnd(ea);\r
  return 0;\r
}\r
\r
// Emit a Cmpm opcode, 1011ddd1 xx001sss (rrr=Adst, xx=size extension, sss=Asrc)\r
int OpCmpm(int op)\r
{\r
  int size=0,sea=0,dea=0,use=0;\r
  const char *asl="";\r
\r
  // get size, get EAs\r
  size=(op>>6)&3; if (size>=3) return 1;\r
  sea=(op&7)|0x18;\r
  dea=(op>>9)&0x3f;\r
\r
  use=op&~0x0e07; // Use 1 handler for all registers..\r
  if (size==0&&sea==0x1f) use|=0x0007; // ..except (a7)+\r
  if (size==0&&dea==0x1f) use|=0x0e00;\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,sea); Cycles=4;\r
\r
  ot(";@ Get src operand into r11:\n");\r
  EaCalc (0,0x0007, sea,size,earwt_shifted_up);\r
  EaRead (0,    11, sea,size,0x0007,earwt_shifted_up);\r
\r
  ot(";@ Get dst operand into r0:\n");\r
  EaCalcRead(-1,0,dea,size,0x0e00,earwt_msb_dont_care);\r
\r
  if (size<2) asl=(char *)(size?",asl #16":",asl #24");\r
\r
  ot("  rsbs r0,r11,r0%s\n",asl);\r
  OpGetFlags(1,0); // Cmp like subtract\r
  ot("\n");\r
\r
  OpEnd(sea);\r
  return 0;\r
}\r
\r
\r
// Emit a Chk opcode, 0100ddd1 x0eeeeee (rrr=Dn, x=size extension, eeeeee=ea)\r
int OpChk(int op)\r
{\r
  int rea=0;\r
  int size=0,ea=0,use=0;\r
\r
  // Get EA and register EA\r
  rea=(op>>9)&7;\r
  if((op>>7)&1)\r
       size=1; // word operation\r
  else size=2; // long\r
  ea=op&0x3f;\r
\r
  if (EaAn(ea)) return 1; // not a valid mode\r
  if (size!=1)  return 1; // 000 variant only supports word\r
\r
  // See if we can do this opcode:\r
  if (EaCanRead(ea,size)==0) return 1;\r
\r
  use=OpBase(op,size);\r
  use&=~0x0e00; // Use 1 handler for register d0-7\r
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
  OpStart(op,ea); Cycles=10;\r
\r
  ot(";@ Get value into r0:\n");\r
  EaCalcRead(-1,0,ea,size,0x003f,earwt_msb_dont_care);\r
\r
  ot(";@ Get register operand into r1:\n");\r
  EaCalcRead(-1,1,rea,size,0x0e00,earwt_msb_dont_care);\r
\r
  if (size<2) ot("  mov r0,r0,asl #%d\n",size?16:24);\r
\r
  if (size<2) ot("  movs r1,r1,asl #%d\n\n",size?16:24);\r
  else        ot("  adds r1,r1,#0 ;@ Define flags\n");\r
\r
  ot(";@ get flags, including undocumented ones\n");\r
  ot("  and r3,r10,#0x80000000\n");\r
  OpGetFlagsNZ(1);\r
\r
  ot(";@ is reg negative?\n");\r
  ot("  bmi chktrap%.4x\n",op);\r
\r
  ot(";@ Do arithmetic:\n");\r
  ot("  cmp r1,r0\n");\r
  ot("  bgt chktrap%.4x\n",op);\r
\r
  ot(";@ old N remains\n");\r
  ot("  orr r10,r10,r3\n");\r
  OpEnd(ea);\r
\r
  ot("chktrap%.4x%s ;@ CHK exception:\n",op,ms?"":":");\r
  ot("  mov r0,#6\n");\r
  ot("  bl Exception\n");\r
  Cycles+=40;\r
  OpEnd(ea);\r
\r
  return 0;\r
}\r
\r
// vim:ts=2:sw=2:expandtab\r