fix compatibility with ancient gas

[cyclone68000.git] / OpBranch.cpp

diff --git a/OpBranch.cpp b/OpBranch.cpp
index c37620a..9a7c8da 100644 (file)
--- a/OpBranch.cpp
+++ b/OpBranch.cpp
@@ -113,8 +113,8 @@ int OpLink(int op)
 \r
   if(reg!=7) {\r
     ot(";@ Get An\n");\r
-    EaCalc(11, 7, 8, 2, 1);\r
-    EaRead(11, 1, 8, 2, 7, 1);\r
+    EaCalc(11, 7, 8, 2);\r
+    EaRead(11, 1, 8, 2, 7);\r
   }\r
 \r
   ot("  ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
@@ -128,7 +128,7 @@ int OpLink(int op)
 \r
   ot(";@ Save to An\n");\r
   if(reg!=7)\r
-    EaWrite(11,8, 8, 2, 7, 1);\r
+    EaWrite(11, 8, 8, 2, 7);\r
 \r
   ot(";@ Get offset:\n");\r
   EaCalc(0,0,0x3c,1);    // abused r8 is ok because of imm EA\r
@@ -154,8 +154,8 @@ int OpUnlk(int op)
   OpStart(op,0x10);\r
 \r
   ot(";@ Get An\n");\r
-  EaCalc(11, 0xf, 8, 2,   1);\r
-  EaRead(11,   0, 8, 2, 0xf, 1);\r
+  EaCalc(11, 0xf, 8, 2);\r
+  EaRead(11,   0, 8, 2, 0xf);\r
 \r
   ot("  add r8,r0,#4 ;@ A7+=4, abuse r8\n");\r
   ot("\n");\r
@@ -165,7 +165,7 @@ int OpUnlk(int op)
   ot("  str r8,[r7,#0x3c] ;@ Save A7\n");\r
   ot("\n");\r
   ot(";@ An = value from stack:\n");\r
-  EaWrite(11, 0, 8, 2, 7, 1);\r
+  EaWrite(11, 0, 8, 2, 7);\r
 \r
   Cycles=12;\r
   OpEnd(0x10);\r
@@ -312,6 +312,7 @@ static const char * const Cond[16]=
 // Emit a Dbra opcode, 0101cccc 11001nnn vv\r
 int OpDbra(int op)\r
 {\r
+  const char *cond;\r
   int use=0;\r
   int cc=0;\r
 \r
@@ -321,25 +322,12 @@ int OpDbra(int op)
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
   OpStart(op);\r
 \r
-  switch (cc)\r
+  if (cc>=2)\r
   {\r
-    case 0: // T\r
-    case 1: // F\r
-      break;\r
-    case 2: // hi\r
-      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
-      ot("  beq DbraTrue\n\n");\r
-      break;\r
-    case 3: // ls\r
-      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");\r
-      ot("  bne DbraTrue\n\n");\r
-      break;\r
-    default:\r
-      ot(";@ Is the condition true?\n");\r
-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
-      ot(";@ If so, don't dbra\n");\r
-      ot("  b%s DbraTrue\n\n",Cond[cc]);\r
-      break;\r
+    ot(";@ Is the condition true?\n");\r
+    cond=TestCond(cc);\r
+    ot(";@ If so, don't dbra\n");\r
+    ot("  b%s DbraTrue\n\n",cond);\r
   }\r
 \r
   if (cc!=0)\r
@@ -348,6 +336,7 @@ int OpDbra(int op)
     ot("  and r1,r8,#0x0007\n");\r
     ot("  mov r1,r1,lsl #2\n");\r
     ot("  ldrsh r0,[r7,r1]\n");\r
+    ot("  strb r8,[r7,#0x45] ;@ not polling\n");\r
     ot("  sub r0,r0,#1\n");\r
     ot("  strh r0,[r7,r1]\n");\r
     ot("\n");\r
@@ -418,6 +407,8 @@ int OpBranch(int op)
   int offset=0;\r
   int cc=0;\r
   const char *asr_r11="";\r
+  const char *cond;\r
+  int pc_reg=0;\r
 \r
   offset=(char)(op&0xff);\r
   cc=(op>>8)&15;\r
@@ -428,30 +419,16 @@ int OpBranch(int op)
 \r
   if (size==2) size=0; // 000 model does not support long displacement\r
   if (size) use=op; // 16-bit or 32-bit\r
-  else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches\r
+  else use=(op&0xff01)+2; // Use same opcode for all 8-bit branches\r
 \r
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
   OpStart(op,size?0x10:0);\r
   Cycles=10; // Assume branch taken\r
 \r
-  switch (cc)\r
+  if (cc>=2)\r
   {\r
-    case 0: // T\r
-    case 1: // F\r
-      break;\r
-    case 2: // hi\r
-      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
-      ot("  bne BccDontBranch%i\n\n",8<<size);\r
-      break;\r
-    case 3: // ls\r
-      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");\r
-      ot("  beq BccDontBranch%i\n\n",8<<size);\r
-      break;\r
-    default:\r
-      ot(";@ Is the condition true?\n");\r
-      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
-      ot("  b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);\r
-      break;\r
+    cond=TestCond(cc,1);\r
+    ot("  b%s BccDontBranch%i\n\n",cond,8<<size);\r
   }\r
 \r
   if (size) \r
@@ -491,8 +468,6 @@ int OpBranch(int op)
     Cycles=18; // always 18\r
   }\r
 \r
-  ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
-\r
 #if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_8\r
   if (offset!=0 && offset!=-1) checkpc=1;\r
 #endif\r
@@ -502,20 +477,48 @@ int OpBranch(int op)
 #if USE_CHECKPC_CALLBACK\r
   if (offset==-1) checkpc=1;\r
 #endif\r
-  if (checkpc) CheckPc();\r
+  if (checkpc)\r
+  {\r
+    ot("  add r0,r4,r11%s ;@ New PC\n",asr_r11);\r
+    CheckPc();\r
+    pc_reg=0;\r
+  }\r
+  else\r
+  {\r
+    ot("  add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
+    pc_reg=4;\r
+  }\r
+\r
+  if ((op & 1) || size != 0)\r
+  {\r
 #if EMULATE_ADDRESS_ERRORS_JUMP\r
-  ot("  mov r4,r0\n");\r
-  ot("  tst r4,#1 ;@ address error?\n");\r
-  ot("  bne ExceptionAddressError_r_prg_r4\n");\r
+    if (pc_reg!=4)\r
+    {\r
+      ot("  mov r4,r%d\n",pc_reg);\r
+      pc_reg=4;\r
+    }\r
+    if (size)\r
+    {\r
+      ot("  tst r4,#1 ;@ address error?\n");\r
+      ot("  bne ExceptionAddressError_r_prg_r4\n");\r
+    }\r
+    else\r
+    {\r
+      ot("  b ExceptionAddressError_r_prg_r4\n");\r
+    }\r
 #else\r
-  ot("  bic r4,r0,#1\n");\r
+    ot("  bic r4,r%d,#1\n",pc_reg);\r
+    pc_reg=4;\r
 #endif\r
+  }\r
+  if (pc_reg!=4)\r
+    ot("  mov r4,r%d\n",pc_reg);\r
   ot("\n");\r
 \r
   OpEnd(size?0x10:0);\r
 \r
   // since all "DontBranch" code is same for every size, output only once\r
-  if (cc>=2&&(op&0xff00)==0x6700)\r
+  if (cc>=2&&(op&0xff01)==0x6700)\r
   {\r
     ot("BccDontBranch%i%s\n", 8<<size, ms?"":":");\r
     if (size) ot("  add r4,r4,#%d\n",1<<size);\r