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merge mapper code from FCEUX
[fceu.git] / boards / konami-qtai.c
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386f5371 1/* FCE Ultra - NES/Famicom Emulator\r
2 *\r
3 * Copyright notice for this file:\r
4 * Copyright (C) 2005-2008 CaH4e3\r
5 *\r
6 * This program is free software; you can redistribute it and/or modify\r
7 * it under the terms of the GNU General Public License as published by\r
8 * the Free Software Foundation; either version 2 of the License, or\r
9 * (at your option) any later version.\r
10 *\r
11 * This program is distributed in the hope that it will be useful,\r
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
14 * GNU General Public License for more details.\r
15 *\r
16 * You should have received a copy of the GNU General Public License\r
17 * along with this program; if not, write to the Free Software\r
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA\r
19 *\r
20 * CAI Shogakko no Sansu\r
21 */\r
22\r
23#include "mapinc.h"\r
24\r
25static uint8 QTAINTRAM[2048];\r
26static writefunc old2007wrap;\r
27\r
28static uint16 CHRSIZE = 8192;\r
29static uint16 WRAMSIZE = 8192 + 4096;\r
30static uint8 *CHRRAM=NULL;\r
31static uint8 *WRAM = NULL;\r
32\r
33static uint8 IRQa, K4IRQ;\r
34static uint32 IRQLatch, IRQCount;\r
35\r
36static uint8 regs[16];\r
37//static uint8 test[8];\r
38static SFORMAT StateRegs[]=\r
39{\r
40 {&IRQCount, 1, "IRQC"},\r
41 {&IRQLatch, 1, "IRQL"},\r
42 {&IRQa, 1, "IRQA"},\r
43 {&K4IRQ, 1, "K4IRQ"},\r
44 {regs, 16, "REGS"},\r
45 {0}\r
46};\r
47\r
48static void chrSync(void)\r
49{\r
50 setchr4r(0x10,0x0000,regs[5]&1);\r
51 setchr4r(0x10,0x1000,0);\r
52}\r
53\r
54static void Sync(void)\r
55{\r
56 chrSync();\r
57// if(regs[0xA]&0x10)\r
58// {\r
59/* setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);\r
60 setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);\r
61 setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);\r
62 setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);\r
63 setchr1r(0x10,0x1000,0);\r
64 setchr1r(0x10,0x1400,1);\r
65 setchr1r(0x10,0x1800,2);\r
66 setchr1r(0x10,0x1c00,3);*/\r
67/* setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);\r
68 setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);\r
69 setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);\r
70 setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);\r
71 setchr1r(0x10,0x1000,(((regs[5]&1)^1)<<2)+4);\r
72 setchr1r(0x10,0x1400,(((regs[5]&1)^1)<<2)+5);\r
73 setchr1r(0x10,0x1800,(((regs[5]&1)^1)<<2)+6);\r
74 setchr1r(0x10,0x1c00,(((regs[5]&1)^1)<<2)+7);\r
75*/\r
76// }\r
77// else\r
78// {\r
79/*\r
80 setchr1r(0x10,0x0000,(((regs[5]&1)^1)<<2)+0);\r
81 setchr1r(0x10,0x0400,(((regs[5]&1)^1)<<2)+1);\r
82 setchr1r(0x10,0x0800,(((regs[5]&1)^1)<<2)+2);\r
83 setchr1r(0x10,0x0c00,(((regs[5]&1)^1)<<2)+3);\r
84 setchr1r(0x10,0x1000,(((regs[5]&1))<<2)+4);\r
85 setchr1r(0x10,0x1400,(((regs[5]&1))<<2)+5);\r
86 setchr1r(0x10,0x1800,(((regs[5]&1))<<2)+6);\r
87 setchr1r(0x10,0x1c00,(((regs[5]&1))<<2)+7);\r
88// }\r
89//*/\r
90/* setchr1r(1,0x0000,test[0]);\r
91 setchr1r(1,0x0400,test[1]);\r
92 setchr1r(1,0x0800,test[2]);\r
93 setchr1r(1,0x0c00,test[3]);\r
94 setchr1r(1,0x1000,test[4]);\r
95 setchr1r(1,0x1400,test[5]);\r
96 setchr1r(1,0x1800,test[6]);\r
97 setchr1r(1,0x1c00,test[7]);\r
98*/\r
99 setprg4r(0x10,0x6000,regs[0]&1);\r
100 if(regs[2]>=0x40)\r
101 setprg8r(1,0x8000,(regs[2]-0x40));\r
102 else\r
103 setprg8r(0,0x8000,(regs[2]&0x3F));\r
104 if(regs[3]>=0x40)\r
105 setprg8r(1,0xA000,(regs[3]-0x40));\r
106 else\r
107 setprg8r(0,0xA000,(regs[3]&0x3F));\r
108 if(regs[4]>=0x40)\r
109 setprg8r(1,0xC000,(regs[4]-0x40));\r
110 else\r
111 setprg8r(0,0xC000,(regs[4]&0x3F));\r
112\r
113 setprg8r(1,0xE000,~0);\r
114 setmirror(MI_V);\r
115}\r
116\r
117/*static DECLFW(TestWrite)\r
118{\r
119 test[A&7] = V;\r
120 Sync();\r
121}*/\r
122\r
123static DECLFW(M190Write)\r
124{\r
125// FCEU_printf("write %04x:%04x %d, %d\n",A,V,scanline,timestamp);\r
126 regs[(A&0x0F00)>>8]=V;\r
127 switch(A)\r
128 { \r
129 case 0xd600:IRQLatch&=0xFF00;IRQLatch|=V;break;\r
130 case 0xd700:IRQLatch&=0x00FF;IRQLatch|=V<<8;break;\r
131 case 0xd900:IRQCount=IRQLatch;IRQa=V&2;K4IRQ=V&1;X6502_IRQEnd(FCEU_IQEXT);break;\r
132 case 0xd800:IRQa=K4IRQ;X6502_IRQEnd(FCEU_IQEXT);break;\r
133 }\r
134 Sync();\r
135}\r
136\r
137static DECLFR(M190Read)\r
138{\r
139// FCEU_printf("read %04x:%04x %d, %d\n",A,regs[(A&0x0F00)>>8],scanline,timestamp);\r
140 return regs[(A&0x0F00)>>8]+regs[0x0B];\r
141}\r
142static void VRC5IRQ(int a)\r
143{\r
144 if(IRQa)\r
145 {\r
146 IRQCount+=a;\r
147 if(IRQCount&0x10000)\r
148 {\r
149 X6502_IRQBegin(FCEU_IQEXT);\r
150// IRQCount=IRQLatch;\r
151 }\r
152 }\r
153}\r
154\r
155static void Mapper190_PPU(uint32 A)\r
156{\r
157 if(A>=0x2000)\r
158 {\r
159 setchr4r(0x10,0x0000,QTAINTRAM[A&0x1FFF]&1);\r
160 setchr4r(0x10,0x1000,QTAINTRAM[A&0x1FFF]&1);\r
161 }\r
162// else\r
163// chrSync();\r
164}\r
165\r
166static DECLFW(M1902007Wrap)\r
167{\r
168 if(A>=0x2000)\r
169 {\r
170 if(regs[0xA]&1)\r
171 QTAINTRAM[A&0x1FFF]=V;\r
172 else\r
173 old2007wrap(A,V);\r
174 }\r
175}\r
176\r
177\r
178static void M190Power(void)\r
179{\r
180/* test[0]=0;\r
181 test[1]=1;\r
182 test[2]=2;\r
183 test[3]=3;\r
184 test[4]=4;\r
185 test[5]=5;\r
186 test[6]=6;\r
187 test[7]=7;\r
188*/ \r
189 setprg4r(0x10,0x7000,2);\r
190\r
191 old2007wrap=GetWriteHandler(0x2007);\r
192 SetWriteHandler(0x2007,0x2007,M1902007Wrap);\r
193\r
194 SetReadHandler(0x6000,0xFFFF,CartBR);\r
195// SetWriteHandler(0x5000,0x5007,TestWrite);\r
196 SetWriteHandler(0x6000,0x7FFF,CartBW);\r
197 SetWriteHandler(0x8000,0xFFFF,M190Write);\r
198 SetReadHandler(0xDC00,0xDC00,M190Read);\r
199 SetReadHandler(0xDD00,0xDD00,M190Read);\r
200 Sync();\r
201}\r
202\r
203static void M190Close(void)\r
204{\r
205 if(CHRRAM)\r
206 FCEU_gfree(CHRRAM);\r
207 CHRRAM=NULL;\r
208 if(WRAM)\r
209 FCEU_gfree(WRAM);\r
210 WRAM=NULL;\r
211}\r
212\r
213static void StateRestore(int version)\r
214{\r
215 Sync();\r
216}\r
217\r
218void Mapper190_Init(CartInfo *info)\r
219{\r
220 info->Power=M190Power;\r
221 info->Close=M190Close;\r
222 GameStateRestore=StateRestore;\r
223\r
224 MapIRQHook=VRC5IRQ;\r
225 //PPU_hook=Mapper190_PPU;\r
226\r
227 CHRRAM=(uint8*)FCEU_gmalloc(CHRSIZE);\r
228 SetupCartCHRMapping(0x10,CHRRAM,CHRSIZE,1);\r
229 AddExState(CHRRAM, CHRSIZE, 0, "CHRRAM");\r
230\r
231 WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
232 SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
233 AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
234\r
235 if(info->battery)\r
236 {\r
237 info->SaveGame[0] = WRAM;\r
238 info->SaveGameLen[0] = WRAMSIZE - 4096;\r
239 }\r
240\r
241 AddExState(&StateRegs, ~0, 0, 0);\r
242}\r
ARM optimized FCE Ultra port