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[fceu.git] / mappers / emu2413.c
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d97315ac 1/***********************************************************************************
2
3 emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
4
5 2001 01-08 : Version 0.10 -- 1st version.
6 2001 01-15 : Version 0.20 -- semi-public version.
7 2001 01-16 : Version 0.30 -- 1st public version.
8 2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
9 : Version 0.32 -- LPF implemented.
10 2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
11 -- Fixed the LFO bug.
12 2001 01-24 : Version 0.35 -- Fixed the drum problem,
13 support undocumented EG behavior.
14 2001 02-02 : Version 0.38 -- Improved the performance.
15 Fixed the hi-hat and cymbal model.
16 Fixed the default percussive datas.
17 Noise reduction.
18 Fixed the feedback problem.
19 2001 03-03 : Version 0.39 -- Fixed some drum bugs.
20 Improved the performance.
21 2001 03-04 : Version 0.40 -- Improved the feedback.
22 Change the default table size.
23 Clock and Rate can be changed during play.
24 2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
25 Added VRC7 patch (OPLL_reset_patch is changed).
26 Fixed OPLL_reset() bug.
27 Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask.
28 Added OPLL_writeIO.
29 2001 09-28 : Version 0.51 -- Removed the noise table.
30 2002 01-28 : Version 0.52 -- Added Stereo mode.
31 2002 02-07 : Version 0.53 -- Fixed some drum bugs.
32 2002 02-20 : Version 0.54 -- Added the best quality mode.
33 2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close.
34 2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
35
36 2004 01-24 : Modified by xodnizel to remove code not needed for the VRC7, among other things.
37
38 References:
39 fmopl.c -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
40 fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
41 s_opl.c -- 2001 written by Mamiya (NEZplug development).
42 fmgen.cpp -- 1999,2000 written by cisc.
43 fmpac.ill -- 2000 created by NARUTO.
44 MSX-Datapack
45 YMU757 data sheet
46 YM2143 data sheet
47
48**************************************************************************************/
49#include <stdio.h>
50#include <stdlib.h>
51#include <string.h>
52#include <math.h>
53#include "emu2413.h"
54
55static const unsigned char default_inst[15][8] = {
56 #include "vrc7tone.h"
57};
58
59/* Size of Sintable ( 8 -- 18 can be used. 9 recommended.)*/
60#define PG_BITS 9
61#define PG_WIDTH (1<<PG_BITS)
62
63/* Phase increment counter */
64#define DP_BITS 18
65#define DP_WIDTH (1<<DP_BITS)
66#define DP_BASE_BITS (DP_BITS - PG_BITS)
67
68/* Dynamic range (Accuracy of sin table) */
69#define DB_BITS 8
70#define DB_STEP (48.0/(1<<DB_BITS))
71#define DB_MUTE (1<<DB_BITS)
72
73/* Dynamic range of envelope */
74#define EG_STEP 0.375
75#define EG_BITS 7
76#define EG_MUTE (1<<EG_BITS)
77
78/* Dynamic range of total level */
79#define TL_STEP 0.75
80#define TL_BITS 6
81#define TL_MUTE (1<<TL_BITS)
82
83/* Dynamic range of sustine level */
84#define SL_STEP 3.0
85#define SL_BITS 4
86#define SL_MUTE (1<<SL_BITS)
87
88#define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP))
89#define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP))
90#define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP))
91
92#define DB_POS(x) (e_uint32)((x)/DB_STEP)
93#define DB_NEG(x) (e_uint32)(DB_MUTE+DB_MUTE+(x)/DB_STEP)
94
95/* Bits for liner value */
96#define DB2LIN_AMP_BITS 11
97#define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
98
99/* Bits for envelope phase incremental counter */
100#define EG_DP_BITS 22
101#define EG_DP_WIDTH (1<<EG_DP_BITS)
102
103/* Bits for Pitch and Amp modulator */
104#define PM_PG_BITS 8
105#define PM_PG_WIDTH (1<<PM_PG_BITS)
106#define PM_DP_BITS 16
107#define PM_DP_WIDTH (1<<PM_DP_BITS)
108#define AM_PG_BITS 8
109#define AM_PG_WIDTH (1<<AM_PG_BITS)
110#define AM_DP_BITS 16
111#define AM_DP_WIDTH (1<<AM_DP_BITS)
112
113/* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
114#define PM_AMP_BITS 8
115#define PM_AMP (1<<PM_AMP_BITS)
116
117/* PM speed(Hz) and depth(cent) */
118#define PM_SPEED 6.4
119#define PM_DEPTH 13.75
120
121/* AM speed(Hz) and depth(dB) */
122#define AM_SPEED 3.7
123//#define AM_DEPTH 4.8
124#define AM_DEPTH 2.4
125
126/* Cut the lower b bit(s) off. */
127#define HIGHBITS(c,b) ((c)>>(b))
128
129/* Leave the lower b bit(s). */
130#define LOWBITS(c,b) ((c)&((1<<(b))-1))
131
132/* Expand x which is s bits to d bits. */
133#define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
134
135/* Expand x which is s bits to d bits and fill expanded bits '1' */
136#define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
137
138/* Adjust envelope speed which depends on sampling rate. */
139#define rate_adjust(x) (rate==49716?x:(e_uint32)((double)(x)*clk/72/rate + 0.5)) /* added 0.5 to round the value*/
140
141#define MOD(o,x) (&(o)->slot[(x)<<1])
142#define CAR(o,x) (&(o)->slot[((x)<<1)|1])
143
144#define BIT(s,b) (((s)>>(b))&1)
145
146/* Input clock */
147static e_uint32 clk = 844451141;
148/* Sampling rate */
149static e_uint32 rate = 3354932;
150
151/* WaveTable for each envelope amp */
152static e_uint16 fullsintable[PG_WIDTH];
153static e_uint16 halfsintable[PG_WIDTH];
154
155static e_uint16 *waveform[2] = { fullsintable, halfsintable };
156
157/* LFO Table */
158static e_int32 pmtable[PM_PG_WIDTH];
159static e_int32 amtable[AM_PG_WIDTH];
160
161/* Phase delta for LFO */
162static e_uint32 pm_dphase;
163static e_uint32 am_dphase;
164
165/* dB to Liner table */
166static e_int16 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2];
167
168/* Liner to Log curve conversion table (for Attack rate). */
169static e_uint16 AR_ADJUST_TABLE[1 << EG_BITS];
170
171/* Definition of envelope mode */
172enum
173{ SETTLE, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, FINISH };
174
175/* Phase incr table for Attack */
176static e_uint32 dphaseARTable[16][16];
177/* Phase incr table for Decay and Release */
178static e_uint32 dphaseDRTable[16][16];
179
180/* KSL + TL Table */
181static e_uint32 tllTable[16][8][1 << TL_BITS][4];
182static e_int32 rksTable[2][8][2];
183
184/* Phase incr table for PG */
185static e_uint32 dphaseTable[512][8][16];
186
187/***************************************************
188
189 Create tables
190
191****************************************************/
192INLINE static e_int32
193Min (e_int32 i, e_int32 j)
194{
195 if(i < j)
196 return i;
197 else
198 return j;
199}
200
201/* Table for AR to LogCurve. */
202static void
203makeAdjustTable (void)
204{
205 e_int32 i;
206
207 AR_ADJUST_TABLE[0] = (1 << EG_BITS);
208 for (i = 1; i < 128; i++)
209 AR_ADJUST_TABLE[i] = (e_uint16) ((double) (1 << EG_BITS) - 1 - (1 << EG_BITS) * log (i) / log (128));
210}
211
212
213/* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
214static void
215makeDB2LinTable (void)
216{
217 e_int32 i;
218
219 for (i = 0; i < DB_MUTE + DB_MUTE; i++)
220 {
221 DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
222 if(i >= DB_MUTE) DB2LIN_TABLE[i] = 0;
223 DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-DB2LIN_TABLE[i]);
224 }
225}
226
227/* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
228static e_int32
229lin2db (double d)
230{
231 if(d == 0)
232 return (DB_MUTE - 1);
233 else
234 return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1); /* 0 -- 127 */
235}
236
237
238/* Sin Table */
239static void
240makeSinTable (void)
241{
242 e_int32 i;
243
244 for (i = 0; i < PG_WIDTH / 4; i++)
245 {
246 fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
247 }
248
249 for (i = 0; i < PG_WIDTH / 4; i++)
250 {
251 fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i];
252 }
253
254 for (i = 0; i < PG_WIDTH / 2; i++)
255 {
256 fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + fullsintable[i]);
257 }
258
259 for (i = 0; i < PG_WIDTH / 2; i++)
260 halfsintable[i] = fullsintable[i];
261 for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
262 halfsintable[i] = fullsintable[0];
263}
264
265/* Table for Pitch Modulator */
266static void
267makePmTable (void)
268{
269 e_int32 i;
270
271 for (i = 0; i < PM_PG_WIDTH; i++)
272 pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200));
273}
274
275/* Table for Amp Modulator */
276static void
277makeAmTable (void)
278{
279 e_int32 i;
280
281 for (i = 0; i < AM_PG_WIDTH; i++)
282 amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH)));
283}
284
285/* Phase increment counter table */
286static void
287makeDphaseTable (void)
288{
289 e_uint32 fnum, block, ML;
290 e_uint32 mltable[16] =
291 { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
292
293 for (fnum = 0; fnum < 512; fnum++)
294 for (block = 0; block < 8; block++)
295 for (ML = 0; ML < 16; ML++)
296 dphaseTable[fnum][block][ML] = rate_adjust (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
297}
298
299static void
300makeTllTable (void)
301{
302#define dB2(x) ((x)*2)
303
304 static double kltable[16] = {
305 dB2 (0.000), dB2 (9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
306 dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
307 };
308
309 e_int32 tmp;
310 e_int32 fnum, block, TL, KL;
311
312 for (fnum = 0; fnum < 16; fnum++)
313 for (block = 0; block < 8; block++)
314 for (TL = 0; TL < 64; TL++)
315 for (KL = 0; KL < 4; KL++)
316 {
317 if(KL == 0)
318 {
319 tllTable[fnum][block][TL][KL] = TL2EG (TL);
320 }
321 else
322 {
323 tmp = (e_int32) (kltable[fnum] - dB2 (3.000) * (7 - block));
324 if(tmp <= 0)
325 tllTable[fnum][block][TL][KL] = TL2EG (TL);
326 else
327 tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL);
328 }
329 }
330}
331
332#ifdef USE_SPEC_ENV_SPEED
333static double attacktime[16][4] = {
334 {0, 0, 0, 0},
335 {1730.15, 1400.60, 1153.43, 988.66},
336 {865.08, 700.30, 576.72, 494.33},
337 {432.54, 350.15, 288.36, 247.16},
338 {216.27, 175.07, 144.18, 123.58},
339 {108.13, 87.54, 72.09, 61.79},
340 {54.07, 43.77, 36.04, 30.90},
341 {27.03, 21.88, 18.02, 15.45},
342 {13.52, 10.94, 9.01, 7.72},
343 {6.76, 5.47, 4.51, 3.86},
344 {3.38, 2.74, 2.25, 1.93},
345 {1.69, 1.37, 1.13, 0.97},
346 {0.84, 0.70, 0.60, 0.54},
347 {0.50, 0.42, 0.34, 0.30},
348 {0.28, 0.22, 0.18, 0.14},
349 {0.00, 0.00, 0.00, 0.00}
350};
351
352static double decaytime[16][4] = {
353 {0, 0, 0, 0},
354 {20926.60, 16807.20, 14006.00, 12028.60},
355 {10463.30, 8403.58, 7002.98, 6014.32},
356 {5231.64, 4201.79, 3501.49, 3007.16},
357 {2615.82, 2100.89, 1750.75, 1503.58},
358 {1307.91, 1050.45, 875.37, 751.79},
359 {653.95, 525.22, 437.69, 375.90},
360 {326.98, 262.61, 218.84, 187.95},
361 {163.49, 131.31, 109.42, 93.97},
362 {81.74, 65.65, 54.71, 46.99},
363 {40.87, 32.83, 27.36, 23.49},
364 {20.44, 16.41, 13.68, 11.75},
365 {10.22, 8.21, 6.84, 5.87},
366 {5.11, 4.10, 3.42, 2.94},
367 {2.55, 2.05, 1.71, 1.47},
368 {1.27, 1.27, 1.27, 1.27}
369};
370#endif
371
372/* Rate Table for Attack */
373static void
374makeDphaseARTable (void)
375{
376 e_int32 AR, Rks, RM, RL;
377#ifdef USE_SPEC_ENV_SPEED
378 e_uint32 attacktable[16][4];
379
380 for (RM = 0; RM < 16; RM++)
381 for (RL = 0; RL < 4; RL++)
382 {
383 if(RM == 0)
384 attacktable[RM][RL] = 0;
385 else if(RM == 15)
386 attacktable[RM][RL] = EG_DP_WIDTH;
387 else
388 attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
389
390 }
391#endif
392
393 for (AR = 0; AR < 16; AR++)
394 for (Rks = 0; Rks < 16; Rks++)
395 {
396 RM = AR + (Rks >> 2);
397 RL = Rks & 3;
398 if(RM > 15)
399 RM = 15;
400 switch (AR)
401 {
402 case 0:
403 dphaseARTable[AR][Rks] = 0;
404 break;
405 case 15:
406 dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
407 break;
408 default:
409#ifdef USE_SPEC_ENV_SPEED
410 dphaseARTable[AR][Rks] = rate_adjust (attacktable[RM][RL]);
411#else
412 dphaseARTable[AR][Rks] = rate_adjust ((3 * (RL + 4) << (RM + 1)));
413#endif
414 break;
415 }
416 }
417}
418
419/* Rate Table for Decay and Release */
420static void
421makeDphaseDRTable (void)
422{
423 e_int32 DR, Rks, RM, RL;
424
425#ifdef USE_SPEC_ENV_SPEED
426 e_uint32 decaytable[16][4];
427
428 for (RM = 0; RM < 16; RM++)
429 for (RL = 0; RL < 4; RL++)
430 if(RM == 0)
431 decaytable[RM][RL] = 0;
432 else
433 decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
434#endif
435
436 for (DR = 0; DR < 16; DR++)
437 for (Rks = 0; Rks < 16; Rks++)
438 {
439 RM = DR + (Rks >> 2);
440 RL = Rks & 3;
441 if(RM > 15)
442 RM = 15;
443 switch (DR)
444 {
445 case 0:
446 dphaseDRTable[DR][Rks] = 0;
447 break;
448 default:
449#ifdef USE_SPEC_ENV_SPEED
450 dphaseDRTable[DR][Rks] = rate_adjust (decaytable[RM][RL]);
451#else
452 dphaseDRTable[DR][Rks] = rate_adjust ((RL + 4) << (RM - 1));
453#endif
454 break;
455 }
456 }
457}
458
459static void
460makeRksTable (void)
461{
462
463 e_int32 fnum8, block, KR;
464
465 for (fnum8 = 0; fnum8 < 2; fnum8++)
466 for (block = 0; block < 8; block++)
467 for (KR = 0; KR < 2; KR++)
468 {
469 if(KR != 0)
470 rksTable[fnum8][block][KR] = (block << 1) + fnum8;
471 else
472 rksTable[fnum8][block][KR] = block >> 1;
473 }
474}
475
476/************************************************************
477
478 Calc Parameters
479
480************************************************************/
481
482INLINE static e_uint32
483calc_eg_dphase (OPLL_SLOT * slot)
484{
485
486 switch (slot->eg_mode)
487 {
488 case ATTACK:
489 return dphaseARTable[slot->patch.AR][slot->rks];
490
491 case DECAY:
492 return dphaseDRTable[slot->patch.DR][slot->rks];
493
494 case SUSHOLD:
495 return 0;
496
497 case SUSTINE:
498 return dphaseDRTable[slot->patch.RR][slot->rks];
499
500 case RELEASE:
501 if(slot->sustine)
502 return dphaseDRTable[5][slot->rks];
503 else if(slot->patch.EG)
504 return dphaseDRTable[slot->patch.RR][slot->rks];
505 else
506 return dphaseDRTable[7][slot->rks];
507
508 case FINISH:
509 return 0;
510
511 default:
512 return 0;
513 }
514}
515
516/*************************************************************
517
518 OPLL internal interfaces
519
520*************************************************************/
521
522#define UPDATE_PG(S) (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch.ML]
523#define UPDATE_TLL(S)\
524(((S)->type==0)?\
525((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch.TL][(S)->patch.KL]):\
526((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch.KL]))
527#define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch.KR]
528#define UPDATE_WF(S) (S)->sintbl = waveform[(S)->patch.WF]
529#define UPDATE_EG(S) (S)->eg_dphase = calc_eg_dphase(S)
530#define UPDATE_ALL(S)\
531 UPDATE_PG(S);\
532 UPDATE_TLL(S);\
533 UPDATE_RKS(S);\
534 UPDATE_WF(S); \
535 UPDATE_EG(S) /* EG should be updated last. */
536
537
538/* Slot key on */
539INLINE static void
540slotOn (OPLL_SLOT * slot)
541{
542 slot->eg_mode = ATTACK;
543 slot->eg_phase = 0;
544 slot->phase = 0;
545}
546
547/* Slot key on without reseting the phase */
548INLINE static void
549slotOn2 (OPLL_SLOT * slot)
550{
551 slot->eg_mode = ATTACK;
552 slot->eg_phase = 0;
553}
554
555/* Slot key off */
556INLINE static void
557slotOff (OPLL_SLOT * slot)
558{
559 if(slot->eg_mode == ATTACK)
560 slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)], EG_BITS, EG_DP_BITS);
561 slot->eg_mode = RELEASE;
562}
563
564/* Channel key on */
565INLINE static void
566keyOn (OPLL * opll, e_int32 i)
567{
568 if(!opll->slot_on_flag[i * 2])
569 slotOn (MOD(opll,i));
570 if(!opll->slot_on_flag[i * 2 + 1])
571 slotOn (CAR(opll,i));
572 opll->key_status[i] = 1;
573}
574
575/* Channel key off */
576INLINE static void
577keyOff (OPLL * opll, e_int32 i)
578{
579 if(opll->slot_on_flag[i * 2 + 1])
580 slotOff (CAR(opll,i));
581 opll->key_status[i] = 0;
582}
583
584/* Set sustine parameter */
585INLINE static void
586setSustine (OPLL * opll, e_int32 c, e_int32 sustine)
587{
588 CAR(opll,c)->sustine = sustine;
589 if(MOD(opll,c)->type)
590 MOD(opll,c)->sustine = sustine;
591}
592
593/* Volume : 6bit ( Volume register << 2 ) */
594INLINE static void
595setVolume (OPLL * opll, e_int32 c, e_int32 volume)
596{
597 CAR(opll,c)->volume = volume;
598}
599
600INLINE static void
601setSlotVolume (OPLL_SLOT * slot, e_int32 volume)
602{
603 slot->volume = volume;
604}
605
606/* Set F-Number ( fnum : 9bit ) */
607INLINE static void
608setFnumber (OPLL * opll, e_int32 c, e_int32 fnum)
609{
610 CAR(opll,c)->fnum = fnum;
611 MOD(opll,c)->fnum = fnum;
612}
613
614/* Set Block data (block : 3bit ) */
615INLINE static void
616setBlock (OPLL * opll, e_int32 c, e_int32 block)
617{
618 CAR(opll,c)->block = block;
619 MOD(opll,c)->block = block;
620}
621
622INLINE static void update_key_status (OPLL * opll)
623{
624 int ch;
625
626 for (ch = 0; ch < 6; ch++)
627 opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->HiFreq[ch]) & 0x10;
628}
629
630/***********************************************************
631
632 Initializing
633
634***********************************************************/
635
636static void
637OPLL_SLOT_reset (OPLL_SLOT * slot, int type)
638{
639 slot->type = type;
640 slot->sintbl = waveform[0];
641 slot->phase = 0;
642 slot->dphase = 0;
643 slot->output[0] = 0;
644 slot->output[1] = 0;
645 slot->feedback = 0;
646 slot->eg_mode = SETTLE;
647 slot->eg_phase = EG_DP_WIDTH;
648 slot->eg_dphase = 0;
649 slot->rks = 0;
650 slot->tll = 0;
651 slot->sustine = 0;
652 slot->fnum = 0;
653 slot->block = 0;
654 slot->volume = 0;
655 slot->pgout = 0;
656 slot->egout = 0;
657}
658
659static void
660internal_refresh (void)
661{
662 makeDphaseTable ();
663 makeDphaseARTable ();
664 makeDphaseDRTable ();
665 pm_dphase = (e_uint32) rate_adjust (PM_SPEED * PM_DP_WIDTH / (clk / 72));
666 am_dphase = (e_uint32) rate_adjust (AM_SPEED * AM_DP_WIDTH / (clk / 72));
667}
668
669static void
670maketables (e_uint32 c, e_uint32 r)
671{
672 if(c != clk)
673 {
674 clk = c;
675 makePmTable ();
676 makeAmTable ();
677 makeDB2LinTable ();
678 makeAdjustTable ();
679 makeTllTable ();
680 makeRksTable ();
681 makeSinTable ();
682 //makeDefaultPatch ();
683 }
684
685 if(r != rate)
686 {
687 rate = r;
688 internal_refresh ();
689 }
690}
691
692OPLL *OPLL_new (e_uint32 clk, e_uint32 rate)
693{
694 OPLL *opll;
695
696 maketables (clk, rate);
697
698 opll = (OPLL *) calloc (sizeof (OPLL), 1);
699 if(opll == NULL)
700 return NULL;
701
702 opll->mask = 0;
703
704 OPLL_reset (opll);
705
706 return opll;
707}
708
709
710void
711OPLL_delete (OPLL * opll)
712{
713 free (opll);
714}
715
716/* Reset whole of OPLL except patch datas. */
717void
718OPLL_reset (OPLL * opll)
719{
720 e_int32 i;
721
722 if(!opll)
723 return;
724
725 opll->adr = 0;
726 opll->out = 0;
727
728 opll->pm_phase = 0;
729 opll->am_phase = 0;
730
731 opll->mask = 0;
732
733 for (i = 0; i < 12; i++)
734 OPLL_SLOT_reset(&opll->slot[i], i%2);
735
736 for (i = 0; i < 6; i++)
737 {
738 opll->key_status[i] = 0;
739 //setPatch (opll, i, 0);
740 }
741
742 for (i = 0; i < 0x40; i++)
743 OPLL_writeReg (opll, i, 0);
744
745#ifndef EMU2413_COMPACTION
746 opll->realstep = (e_uint32) ((1 << 31) / rate);
747 opll->opllstep = (e_uint32) ((1 << 31) / (clk / 72));
748 opll->oplltime = 0;
749#endif
750}
751
752/* Force Refresh (When external program changes some parameters). */
753void
754OPLL_forceRefresh (OPLL * opll)
755{
756 e_int32 i;
757
758 if(opll == NULL)
759 return;
760
761 for (i = 0; i < 12; i++)
762 {
763 UPDATE_PG (&opll->slot[i]);
764 UPDATE_RKS (&opll->slot[i]);
765 UPDATE_TLL (&opll->slot[i]);
766 UPDATE_WF (&opll->slot[i]);
767 UPDATE_EG (&opll->slot[i]);
768 }
769}
770
771void
772OPLL_set_rate (OPLL * opll, e_uint32 r)
773{
774 if(opll->quality)
775 rate = 49716;
776 else
777 rate = r;
778 internal_refresh ();
779 rate = r;
780}
781
782void
783OPLL_set_quality (OPLL * opll, e_uint32 q)
784{
785 opll->quality = q;
786 OPLL_set_rate (opll, rate);
787}
788
789/*********************************************************
790
791 Generate wave data
792
793*********************************************************/
794/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
795#if( SLOT_AMP_BITS - PG_BITS ) > 0
796#define wave2_2pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
797#else
798#define wave2_2pi(e) ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
799#endif
800
801/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
802#if( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
803#define wave2_4pi(e) (e)
804#elif( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
805#define wave2_4pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
806#else
807#define wave2_4pi(e) ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
808#endif
809
810/* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
811#if( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
812#define wave2_8pi(e) (e)
813#elif( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
814#define wave2_8pi(e) ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
815#else
816#define wave2_8pi(e) ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
817#endif
818
819
820
821/* Update AM, PM unit */
822static void
823update_ampm (OPLL * opll)
824{
825 opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1);
826 opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1);
827 opll->lfo_am = amtable[HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)];
828 opll->lfo_pm = pmtable[HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)];
829}
830
831/* PG */
832INLINE static void
833calc_phase (OPLL_SLOT * slot, e_int32 lfo)
834{
835 if(slot->patch.PM)
836 slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
837 else
838 slot->phase += slot->dphase;
839
840 slot->phase &= (DP_WIDTH - 1);
841
842 slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
843}
844
845/* EG */
846static void
847calc_envelope (OPLL_SLOT * slot, e_int32 lfo)
848{
849#define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
850
851 static e_uint32 SL[16] = {
852 S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
853 S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
854 };
855
856 e_uint32 egout;
857
858 switch (slot->eg_mode)
859 {
860
861 case ATTACK:
862 egout = AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)];
863 slot->eg_phase += slot->eg_dphase;
864 if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch.AR==15))
865 {
866 egout = 0;
867 slot->eg_phase = 0;
868 slot->eg_mode = DECAY;
869 UPDATE_EG (slot);
870 }
871 break;
872
873 case DECAY:
874 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
875 slot->eg_phase += slot->eg_dphase;
876 if(slot->eg_phase >= SL[slot->patch.SL])
877 {
878 if(slot->patch.EG)
879 {
880 slot->eg_phase = SL[slot->patch.SL];
881 slot->eg_mode = SUSHOLD;
882 UPDATE_EG (slot);
883 }
884 else
885 {
886 slot->eg_phase = SL[slot->patch.SL];
887 slot->eg_mode = SUSTINE;
888 UPDATE_EG (slot);
889 }
890 }
891 break;
892
893 case SUSHOLD:
894 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
895 if(slot->patch.EG == 0)
896 {
897 slot->eg_mode = SUSTINE;
898 UPDATE_EG (slot);
899 }
900 break;
901
902 case SUSTINE:
903 case RELEASE:
904 egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
905 slot->eg_phase += slot->eg_dphase;
906 if(egout >= (1 << EG_BITS))
907 {
908 slot->eg_mode = FINISH;
909 egout = (1 << EG_BITS) - 1;
910 }
911 break;
912
913 case FINISH:
914 egout = (1 << EG_BITS) - 1;
915 break;
916
917 default:
918 egout = (1 << EG_BITS) - 1;
919 break;
920 }
921
922 if(slot->patch.AM)
923 egout = EG2DB (egout + slot->tll) + lfo;
924 else
925 egout = EG2DB (egout + slot->tll);
926
927 if(egout >= DB_MUTE)
928 egout = DB_MUTE - 1;
929
930 slot->egout = egout;
931}
932
933/* CARRIOR */
934INLINE static e_int32
935calc_slot_car (OPLL_SLOT * slot, e_int32 fm)
936{
937 slot->output[1] = slot->output[0];
938
939 if(slot->egout >= (DB_MUTE - 1))
940 {
941 slot->output[0] = 0;
942 }
943 else
944 {
945 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
946 }
947
948 return (slot->output[1] + slot->output[0]) >> 1;
949}
950
951/* MODULATOR */
952INLINE static e_int32
953calc_slot_mod (OPLL_SLOT * slot)
954{
955 e_int32 fm;
956
957 slot->output[1] = slot->output[0];
958
959 if(slot->egout >= (DB_MUTE - 1))
960 {
961 slot->output[0] = 0;
962 }
963 else if(slot->patch.FB != 0)
964 {
965 fm = wave2_4pi (slot->feedback) >> (7 - slot->patch.FB);
966 slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout + fm)&(PG_WIDTH-1)] + slot->egout];
967 }
968 else
969 {
970 slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
971 }
972
973 slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
974
975 return slot->feedback;
976
977}
978
979static INLINE e_int16 calc (OPLL * opll)
980{
981 e_int32 inst = 0, out = 0;
982 e_int32 i;
983
984 update_ampm (opll);
985
986 for (i = 0; i < 12; i++)
987 {
988 calc_phase(&opll->slot[i],opll->lfo_pm);
989 calc_envelope(&opll->slot[i],opll->lfo_am);
990 }
991
992 for (i = 0; i < 6; i++)
993 if(!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
994 inst += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i)));
995
996 out = inst;
997 return (e_int16) out;
998}
999
1000void moocow(OPLL* opll, e_int32 *buf, e_int32 len, int shift)
1001{
1002 while(len > 0)
1003 {
1004 *buf+=(calc(opll)+32768)<<shift;
1005 buf++;
1006 len--;
1007 }
1008}
1009
1010#ifdef EMU2413_COMPACTION
1011e_int16
1012OPLL_calc (OPLL * opll)
1013{
1014 return calc (opll);
1015}
1016#else
1017e_int16
1018OPLL_calc (OPLL * opll)
1019{
1020 if(!opll->quality)
1021 return calc (opll);
1022
1023 while (opll->realstep > opll->oplltime)
1024 {
1025 opll->oplltime += opll->opllstep;
1026 opll->prev = opll->next;
1027 opll->next = calc (opll);
1028 }
1029
1030 opll->oplltime -= opll->realstep;
1031 opll->out = (e_int16) (((double) opll->next * (opll->opllstep - opll->oplltime)
1032 + (double) opll->prev * opll->oplltime) / opll->opllstep);
1033
1034 return (e_int16) opll->out;
1035}
1036#endif
1037
1038e_uint32
1039OPLL_setMask (OPLL * opll, e_uint32 mask)
1040{
1041 e_uint32 ret;
1042
1043 if(opll)
1044 {
1045 ret = opll->mask;
1046 opll->mask = mask;
1047 return ret;
1048 }
1049 else
1050 return 0;
1051}
1052
1053e_uint32
1054OPLL_toggleMask (OPLL * opll, e_uint32 mask)
1055{
1056 e_uint32 ret;
1057
1058 if(opll)
1059 {
1060 ret = opll->mask;
1061 opll->mask ^= mask;
1062 return ret;
1063 }
1064 else
1065 return 0;
1066}
1067
1068/****************************************************
1069
1070 I/O Ctrl
1071
1072*****************************************************/
1073
1074static void setInstrument(OPLL * opll, e_uint i, e_uint inst)
1075{
1076 const e_uint8 *src;
1077 OPLL_PATCH *modp, *carp;
1078
1079 opll->patch_number[i]=inst;
1080
1081 if(inst)
1082 src=default_inst[inst-1];
1083 else
1084 src=opll->CustInst;
1085
1086 modp=&MOD(opll,i)->patch;
1087 carp=&CAR(opll,i)->patch;
1088
1089 modp->AM=(src[0]>>7)&1;
1090 modp->PM=(src[0]>>6)&1;
1091 modp->EG=(src[0]>>5)&1;
1092 modp->KR=(src[0]>>4)&1;
1093 modp->ML=(src[0]&0xF);
1094
1095 carp->AM=(src[1]>>7)&1;
1096 carp->PM=(src[1]>>6)&1;
1097 carp->EG=(src[1]>>5)&1;
1098 carp->KR=(src[1]>>4)&1;
1099 carp->ML=(src[1]&0xF);
1100
1101 modp->KL=(src[2]>>6)&3;
1102 modp->TL=(src[2]&0x3F);
1103
1104 carp->KL = (src[3] >> 6) & 3;
1105 carp->WF = (src[3] >> 4) & 1;
1106
1107 modp->WF = (src[3] >> 3) & 1;
1108
1109 modp->FB = (src[3]) & 7;
1110
1111 modp->AR = (src[4]>>4)&0xF;
1112 modp->DR = (src[4]&0xF);
1113
1114 carp->AR = (src[5]>>4)&0xF;
1115 carp->DR = (src[5]&0xF);
1116
1117 modp->SL = (src[6]>>4)&0xF;
1118 modp->RR = (src[6]&0xF);
1119
1120 carp->SL = (src[7]>>4)&0xF;
1121 carp->RR = (src[7]&0xF);
1122}
1123
1124
1125void
1126OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data)
1127{
1128
1129 e_int32 i, v, ch;
1130
1131 data = data & 0xff;
1132 reg = reg & 0x3f;
1133
1134 switch (reg)
1135 {
1136 case 0x00:
1137 opll->CustInst[0]=data;
1138 for (i = 0; i < 6; i++)
1139 {
1140 if(opll->patch_number[i] == 0)
1141 {
1142 setInstrument(opll, i, 0);
1143 UPDATE_PG (MOD(opll,i));
1144 UPDATE_RKS (MOD(opll,i));
1145 UPDATE_EG (MOD(opll,i));
1146 }
1147 }
1148 break;
1149
1150 case 0x01:
1151 opll->CustInst[1]=data;
1152 for (i = 0; i < 6; i++)
1153 {
1154 if(opll->patch_number[i] == 0)
1155 {
1156 setInstrument(opll, i, 0);
1157 UPDATE_PG (CAR(opll,i));
1158 UPDATE_RKS (CAR(opll,i));
1159 UPDATE_EG (CAR(opll,i));
1160 }
1161 }
1162 break;
1163
1164 case 0x02:
1165 opll->CustInst[2]=data;
1166 for (i = 0; i < 6; i++)
1167 {
1168 if(opll->patch_number[i] == 0)
1169 {
1170 setInstrument(opll, i, 0);
1171 UPDATE_TLL(MOD(opll,i));
1172 }
1173 }
1174 break;
1175
1176 case 0x03:
1177 opll->CustInst[3]=data;
1178 for (i = 0; i < 6; i++)
1179 {
1180 if(opll->patch_number[i] == 0)
1181 {
1182 setInstrument(opll, i, 0);
1183 UPDATE_WF(MOD(opll,i));
1184 UPDATE_WF(CAR(opll,i));
1185 }
1186 }
1187 break;
1188
1189 case 0x04:
1190 opll->CustInst[4]=data;
1191 for (i = 0; i < 6; i++)
1192 {
1193 if(opll->patch_number[i] == 0)
1194 {
1195 setInstrument(opll, i, 0);
1196 UPDATE_EG (MOD(opll,i));
1197 }
1198 }
1199 break;
1200
1201 case 0x05:
1202 opll->CustInst[5]=data;
1203 for (i = 0; i < 6; i++)
1204 {
1205 if(opll->patch_number[i] == 0)
1206 {
1207 setInstrument(opll, i, 0);
1208 UPDATE_EG(CAR(opll,i));
1209 }
1210 }
1211 break;
1212
1213 case 0x06:
1214 opll->CustInst[6]=data;
1215 for (i = 0; i < 6; i++)
1216 {
1217 if(opll->patch_number[i] == 0)
1218 {
1219 setInstrument(opll, i, 0);
1220 UPDATE_EG (MOD(opll,i));
1221 }
1222 }
1223 break;
1224
1225 case 0x07:
1226 opll->CustInst[7]=data;
1227 for (i = 0; i < 6; i++)
1228 {
1229 if(opll->patch_number[i] == 0)
1230 {
1231 setInstrument(opll, i, 0);
1232 UPDATE_EG (CAR(opll,i));
1233 }
1234 }
1235 break;
1236
1237 case 0x10:
1238 case 0x11:
1239 case 0x12:
1240 case 0x13:
1241 case 0x14:
1242 case 0x15:
1243 ch = reg - 0x10;
1244 opll->LowFreq[ch]=data;
1245 setFnumber (opll, ch, data + ((opll->HiFreq[ch] & 1) << 8));
1246 UPDATE_ALL (MOD(opll,ch));
1247 UPDATE_ALL (CAR(opll,ch));
1248 break;
1249
1250 case 0x20:
1251 case 0x21:
1252 case 0x22:
1253 case 0x23:
1254 case 0x24:
1255 case 0x25:
1256 ch = reg - 0x20;
1257 opll->HiFreq[ch]=data;
1258
1259 setFnumber (opll, ch, ((data & 1) << 8) + opll->LowFreq[ch]);
1260 setBlock (opll, ch, (data >> 1) & 7);
1261 setSustine (opll, ch, (data >> 5) & 1);
1262 if(data & 0x10)
1263 keyOn (opll, ch);
1264 else
1265 keyOff (opll, ch);
1266 UPDATE_ALL (MOD(opll,ch));
1267 UPDATE_ALL (CAR(opll,ch));
1268 update_key_status (opll);
1269 break;
1270
1271 case 0x30:
1272 case 0x31:
1273 case 0x32:
1274 case 0x33:
1275 case 0x34:
1276 case 0x35:
1277 opll->InstVol[reg-0x30]=data;
1278 i = (data >> 4) & 15;
1279 v = data & 15;
1280 setInstrument(opll, reg-0x30, i);
1281 setVolume (opll, reg - 0x30, v << 2);
1282 UPDATE_ALL (MOD(opll,reg - 0x30));
1283 UPDATE_ALL (CAR(opll,reg - 0x30));
1284 break;
1285
1286 default:
1287 break;
1288
1289 }
1290}
1291
1292void
1293OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val)
1294{
1295 if(adr & 1)
1296 OPLL_writeReg (opll, opll->adr, val);
1297 else
1298 opll->adr = val;
1299}
1300
ARM optimized FCE Ultra port