merge mapper code from FCEUX

[fceu.git] / boards / 23.c

/* FCE Ultra - NES/Famicom Emulator\r
 *\r
 * Copyright notice for this file:\r
 *  Copyright (C) 2007 CaH4e3\r
 *\r
 * This program is free software; you can redistribute it and/or modify\r
 * it under the terms of the GNU General Public License as published by\r
 * the Free Software Foundation; either version 2 of the License, or\r
 * (at your option) any later version.\r
 *\r
 * This program is distributed in the hope that it will be useful,\r
 * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
 * GNU General Public License for more details.\r
 *\r
 * You should have received a copy of the GNU General Public License\r
 * along with this program; if not, write to the Free Software\r
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA\r
 */\r
\r
#include "mapinc.h"\r
\r
static uint8 is23;\r
static uint16 IRQCount;\r
static uint8 IRQLatch,IRQa;\r
static uint8 prgreg[2];\r
static uint8 chrreg[8];\r
static uint8 regcmd, irqcmd, mirr, big_bank;\r
static uint16 acount=0;\r
\r
static uint8 *WRAM=NULL;\r
static uint32 WRAMSIZE;\r
\r
static SFORMAT StateRegs[]=\r
{\r
  {prgreg, 2, "PRGREGS"},\r
  {chrreg, 8, "CHRREGS"},\r
  {&regcmd, 1, "REGCMD"},\r
  {&irqcmd, 1, "IRQCMD"},\r
  {&mirr, 1, "MIRR"},\r
  {&big_bank, 1, "BIGB"},\r
  {&IRQCount, 2, "IRCN"},\r
  {&IRQLatch, 1, "IRQL"},\r
  {&IRQa, 1, "IRQA"},\r
  {0}\r
};\r
\r
static void Sync(void)\r
{\r
  if(regcmd&2)\r
  {\r
    setprg8(0xC000,prgreg[0]|big_bank);\r
    setprg8(0x8000,((~1)&0x1F)|big_bank);\r
  }\r
  else\r
  {\r
    setprg8(0x8000,prgreg[0]|big_bank);\r
    setprg8(0xC000,((~1)&0x1F)|big_bank);\r
  }\r
  setprg8(0xA000,prgreg[1]|big_bank);\r
  setprg8(0xE000,((~0)&0x1F)|big_bank);\r
  if(UNIFchrrama)\r
    setchr8(0);\r
  else\r
  {\r
    uint8 i;\r
    for(i=0; i<8; i++)\r
       setchr1(i<<10, chrreg[i]);\r
  }\r
  switch(mirr&0x3)\r
  {\r
    case 0: setmirror(MI_V); break;\r
    case 1: setmirror(MI_H); break;\r
    case 2: setmirror(MI_0); break;\r
    case 3: setmirror(MI_1); break;\r
  }\r
}\r
\r
static DECLFW(M23Write)\r
{\r
//  FCEU_printf("%04x:%04x\n",A,V);\r
  A|=((A>>2)&0x3)|((A>>4)&0x3)|((A>>6)&0x3); // actually there is many-in-one mapper source, some pirate or\r
                                             // licensed games use various address bits for registers\r
  A&=0xF003;\r
  if((A>=0xB000)&&(A<=0xE003))\r
  {\r
    if(UNIFchrrama)\r
      big_bank=(V&8)<<2;                    // my personally many-in-one feature ;) just for support pirate cart 2-in-1\r
    else\r
    {    \r
      uint16 i=((A>>1)&1)|((A-0xB000)>>11);\r
      chrreg[i]&=(0xF0)>>((A&1)<<2);\r
      chrreg[i]|=(V&0xF)<<((A&1)<<2);\r
    }\r
    Sync();\r
  }\r
  else\r
    switch(A&0xF003)\r
    {\r
      case 0x8000: \r
      case 0x8001: \r
      case 0x8002: \r
      case 0x8003: if(is23) \r
                     prgreg[0]=V&0x1F; \r
                   Sync(); \r
                   break;\r
      case 0xA000: \r
      case 0xA001: \r
      case 0xA002: \r
      case 0xA003: if(is23) \r
                     prgreg[1]=V&0x1F; \r
                   else\r
                   {\r
                     prgreg[0]=(V<<1)&0x1F;\r
                     prgreg[1]=((V<<1)&0x1F)|1;\r
                   }\r
                   Sync();\r
                   break;\r
      case 0x9000:\r
      case 0x9001: if(V!=0xFF) mirr=V; Sync(); break;\r
      case 0x9002: \r
      case 0x9003: regcmd=V; Sync(); break;\r
      case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch&=0xF0; IRQLatch|=V&0xF; break;\r
      case 0xF001: X6502_IRQEnd(FCEU_IQEXT); IRQLatch&=0x0F; IRQLatch|=V<<4; break;\r
      case 0xF002: X6502_IRQEnd(FCEU_IQEXT); acount=0; IRQCount=IRQLatch; IRQa=V&2; irqcmd=V&1; break;\r
      case 0xF003: X6502_IRQEnd(FCEU_IQEXT); IRQa=irqcmd; break;\r
    }\r
}\r
\r
static void M23Power(void)\r
{\r
  big_bank=0x20;  \r
  Sync();\r
  setprg8r(0x10,0x6000,0);              // another many-in-one code, WRAM actually contain only WaiWaiWorld game\r
  SetReadHandler(0x6000,0x7FFF,CartBR);\r
  SetWriteHandler(0x6000,0x7FFF,CartBW);\r
  SetReadHandler(0x8000,0xFFFF,CartBR);\r
  SetWriteHandler(0x8000,0xFFFF,M23Write);\r
}\r
\r
static void M23Reset(void)\r
{\r
}\r
\r
void M23IRQHook(int a)\r
{\r
  #define LCYCS 341\r
  if(IRQa)\r
  {\r
    acount+=a*3;\r
    if(acount>=LCYCS)\r
    {\r
      while(acount>=LCYCS)\r
      {\r
        acount-=LCYCS;\r
        IRQCount++;\r
        if(IRQCount&0x100) \r
        {\r
          X6502_IRQBegin(FCEU_IQEXT);\r
          IRQCount=IRQLatch;\r
        }\r
      }\r
    }\r
  }\r
}\r
\r
static void StateRestore(int version)\r
{\r
  Sync();\r
}\r
\r
static void M23Close(void)\r
{\r
  if(WRAM)\r
    FCEU_gfree(WRAM);\r
}\r
\r
void Mapper23_Init(CartInfo *info)\r
{\r
  is23=1;\r
  info->Power=M23Power;\r
  info->Close=M23Close;\r
  MapIRQHook=M23IRQHook;\r
  GameStateRestore=StateRestore;\r
\r
  WRAMSIZE=8192;\r
  WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
  SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
  AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
\r
  AddExState(&StateRegs, ~0, 0, 0);\r
}\r
\r
void UNLT230_Init(CartInfo *info)\r
{\r
  is23=0;\r
  info->Power=M23Power;\r
  info->Close=M23Close;\r
  MapIRQHook=M23IRQHook;\r
  GameStateRestore=StateRestore;\r
\r
  WRAMSIZE=8192;\r
  WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
  SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
  AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
\r
  AddExState(&StateRegs, ~0, 0, 0);\r
}\r