--- /dev/null
+/* FCE Ultra - NES/Famicom Emulator\r
+ *\r
+ * Copyright notice for this file:\r
+ * Copyright (C) 2009 CaH4e3\r
+ *\r
+ * This program is free software; you can redistribute it and/or modify\r
+ * it under the terms of the GNU General Public License as published by\r
+ * the Free Software Foundation; either version 2 of the License, or\r
+ * (at your option) any later version.\r
+ *\r
+ * This program is distributed in the hope that it will be useful,\r
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ * GNU General Public License for more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License\r
+ * along with this program; if not, write to the Free Software\r
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA\r
+ */\r
+\r
+#include "mapinc.h"\r
+\r
+static uint8 chrlo[8], chrhi[8], prg[2], mirr, vlock;\r
+static int32 IRQa, IRQCount, IRQLatch, IRQClock; \r
+static uint8 *WRAM=NULL;\r
+static uint32 WRAMSIZE;\r
+static uint8 *CHRRAM=NULL;\r
+static uint32 CHRRAMSIZE;\r
+\r
+static SFORMAT StateRegs[]=\r
+{\r
+ {chrlo, 8, "CHRLO"},\r
+ {chrhi, 8, "CHRHI"},\r
+ {prg, 2, "PRGR"},\r
+ {&mirr, 1, "MIRR"},\r
+ {&vlock, 1, "VLOCK"},\r
+ {&IRQa, 4, "IRQA"},\r
+ {&IRQCount, 4, "IRQC"},\r
+ {&IRQLatch, 4, "IRQL"},\r
+ {&IRQClock, 4, "IRQK"},\r
+ {0}\r
+};\r
+\r
+static void Sync(void)\r
+{\r
+ uint8 i;\r
+ setprg8r(0x10,0x6000,0);\r
+ setprg8(0x8000,prg[0]);\r
+ setprg8(0xa000,prg[1]);\r
+ setprg8(0xc000,~1);\r
+ setprg8(0xe000,~0);\r
+ for(i=0; i<8; i++)\r
+ {\r
+ uint32 chr = chrlo[i]|(chrhi[i]<<8);\r
+ if(chrlo[i]==0xc8)\r
+ {\r
+ vlock = 0;\r
+ continue;\r
+ }\r
+ else if(chrlo[i]==0x88)\r
+ {\r
+ vlock = 1;\r
+ continue;\r
+ }\r
+ if(((chrlo[i]==4)||(chrlo[i]==5))&&!vlock)\r
+ setchr1r(0x10,i<<10,chr&1);\r
+ else\r
+ setchr1(i<<10,chr);\r
+ }\r
+ switch(mirr)\r
+ {\r
+ case 0: setmirror(MI_V); break;\r
+ case 1: setmirror(MI_H); break;\r
+ case 2: setmirror(MI_0); break;\r
+ case 3: setmirror(MI_1); break;\r
+ }\r
+}\r
+\r
+static DECLFW(M253Write)\r
+{\r
+ if((A>=0xB000)&&(A<=0xE00C))\r
+ {\r
+ uint8 ind=((((A&8)|(A>>8))>>3)+2)&7;\r
+ uint8 sar=A&4;\r
+ chrlo[ind]=(chrlo[ind]&(0xF0>>sar))|((V&0x0F)<<sar);\r
+ if(A&4)\r
+ chrhi[ind]=V>>4;\r
+ Sync();\r
+ }\r
+ else\r
+ switch(A)\r
+ {\r
+ case 0x8010: prg[0]=V; Sync(); break;\r
+ case 0xA010: prg[1]=V; Sync(); break;\r
+ case 0x9400: mirr=V&3; Sync(); break;\r
+ case 0xF000: IRQLatch = (IRQLatch & 0xF0) | (V & 0x0F); break;\r
+ case 0xF004: IRQLatch = (IRQLatch & 0x0F) | (V << 4); break;\r
+ case 0xF008:\r
+ IRQa = V&3;\r
+ if(IRQa&2)\r
+ {\r
+ IRQCount = IRQLatch;\r
+ IRQClock = 0;\r
+ }\r
+ X6502_IRQEnd(FCEU_IQEXT);\r
+ break;\r
+ }\r
+}\r
+\r
+static void M253Power(void)\r
+{\r
+ Sync();\r
+ SetReadHandler(0x6000,0x7FFF,CartBR);\r
+ SetWriteHandler(0x6000,0x7FFF,CartBW);\r
+ SetReadHandler(0x8000,0xFFFF,CartBR);\r
+ SetWriteHandler(0x8000,0xFFFF,M253Write);\r
+}\r
+\r
+static void M253Close(void)\r
+{\r
+ if(WRAM)\r
+ FCEU_gfree(WRAM);\r
+ if(CHRRAM)\r
+ FCEU_gfree(CHRRAM);\r
+ WRAM=CHRRAM=NULL;\r
+}\r
+\r
+static void M253IRQ(int cycles)\r
+{\r
+ if(IRQa&2) \r
+ {\r
+ if((IRQClock+=cycles)>=0x72) \r
+ {\r
+ IRQClock -= 0x72;\r
+ if(IRQCount==0xFF) \r
+ {\r
+ IRQCount = IRQLatch;\r
+ IRQa = IRQa|((IRQa&1)<<1);\r
+ X6502_IRQBegin(FCEU_IQEXT);\r
+ }\r
+ else \r
+ IRQCount++;\r
+ }\r
+ }\r
+}\r
+\r
+static void StateRestore(int version)\r
+{\r
+ Sync();\r
+}\r
+\r
+void Mapper253_Init(CartInfo *info)\r
+{\r
+ info->Power=M253Power;\r
+ info->Close=M253Close;\r
+ MapIRQHook=M253IRQ;\r
+ GameStateRestore=StateRestore;\r
+\r
+ CHRRAMSIZE=4096;\r
+ CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSIZE);\r
+ SetupCartCHRMapping(0x10,CHRRAM,CHRRAMSIZE,1);\r
+ AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");\r
+\r
+ WRAMSIZE=8192;\r
+ WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
+ SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
+ AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
+ if(info->battery)\r
+ {\r
+ info->SaveGame[0]=WRAM;\r
+ info->SaveGameLen[0]=WRAMSIZE;\r
+ }\r
+\r
+ AddExState(&StateRegs, ~0, 0, 0);\r
+}\r