--- /dev/null
+/* FCE Ultra - NES/Famicom Emulator\r
+ *\r
+ * Copyright notice for this file:\r
+ * Copyright (C) 2011 CaH4e3\r
+ *\r
+ * This program is free software; you can redistribute it and/or modify\r
+ * it under the terms of the GNU General Public License as published by\r
+ * the Free Software Foundation; either version 2 of the License, or\r
+ * (at your option) any later version.\r
+ *\r
+ * This program is distributed in the hope that it will be useful,\r
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
+ * GNU General Public License for more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License\r
+ * along with this program; if not, write to the Free Software\r
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA\r
+ */\r
+\r
+#ifdef COPYFAMI\r
+\r
+#include "__serial.h"\r
+#include "mapinc.h"\r
+#include "mmc3.h"\r
+\r
+//#define DEBUG_SERIAL\r
+\r
+// *** COPY FAMICOM EMULATION ***\r
+\r
+/*\r
+Êàðòà ïàìÿòè\r
+\r
+ $0000-$1FFF Îñíîâíîå ÎÇÓ\r
+ $2000-$200F Ðåãèñòðû PPU\r
+ $2010-$3FFB Ñèñòåìíîå ÎÇÓ\r
+ $3FFC-$3FFF Ñèñòåìíûå ðåãèñòðû\r
+ $4000-$7FFF APU ðåãèñòðû/ñâîáîäíî\r
+ $8000-$FFF9 CART/ROM\r
+ $FFFA-$FFFB CART/Âåêòîð NMI\r
+ $FFFE-$FFFF CART/Âåêòîð IRQ\r
+\r
+Ðåãèñòðû\r
+\r
+ CTRL R/W $3FFC ---aenic ($00 at reset)\r
+\r
+ c - Ðåæèì êàðòðèäæà\r
+ 0 - âûêëþ÷åí\r
+ 1 - âêëþ÷åí\r
+ i - Ðåæèì IRQ âåêòîðà\r
+ 0 - îðèãèíàëüíûé âåêòîð\r
+ 1 - âåêòîð ïåðåõâà÷åí\r
+ n - Ðåæèì NMI âåêòîðà\r
+ 0 - îðèãèíàëüíûé âåêòîð\r
+ 1 - âåêòîð ïåðåõâà÷åí\r
+ e - Çàïðåò NMI\r
+ 0 - çàïðåùåí\r
+ 1 - ðàçðåøåí\r
+ a - Ðåæèì AROM\r
+ 0 - âûêëþ÷åí\r
+ 1 - âêëþ÷åí\r
+\r
+ BANK R/W $3FFD ---mbbbb\r
+\r
+ b - Íîìåð áàíêà âíóòðåííåîãî ÏÇÓ\r
+ m - Ìèððîðèíã â ðåæèìå ÀROM\r
+\r
+ USBDATA R/W $3FFE dddddddd\r
+\r
+ d - Áàéò äàííûõ ïðèåìà/ïåðåäà÷è\r
+\r
+ STATUS R $3FFF vmnicptr\r
+\r
+ r - Ñòàòóñ äàííûõ äëÿ ÷òåíèÿ èç USB\r
+ 0 - Åñòü äàííûå\r
+ 1 - Íåò äàííûõ\r
+ t - Ñòàòóñ áóôåðà äëÿ çàïèñè â USB\r
+ 0 - Åñòü ìåñòî\r
+ 1 - Íåò ìåñòà\r
+ p - Ñòàòóñ ïîäêëþ÷åíèÿ USB êàáåëÿ\r
+ 0 - Ïîäêëþ÷åí\r
+ 1 - Îòêëþ÷åí\r
+ c - Íàëè÷èå êàðòðèäæà â ñëîòå\r
+ 0 - Ïðèñóòñòâóåò\r
+ 1 - Îòñóòñòâóåò\r
+ i - Ñîñòîÿíèå ñèãíàëà IRQ êàðòðèäæà\r
+ 0 - Àêòèâåí\r
+ 1 - Íåàêòèâåí\r
+ n - Ñîñòîÿíèå ñèãíàëà NMI êàðòðèäæà\r
+ 0 - Àêòèâåí\r
+ 1 - Íåàêòèâåí\r
+ m - Ñîñòîÿíèå àäðåñíîé øèíû À10 VRAM (ìèððîðèíã)\r
+ v - Ñîñòîÿíèå VRAM\r
+ 0 - Âûáðàíà\r
+ 1 - Íå âûáðàíà\r
+\r
+Ðåæèì AROM\r
+\r
+ Àêòèâèðóåòñÿ âíóòðåííÿÿ VRAM\r
+ Ðåãèñòðû áàíêîâ è ìèððîðèíãà íà 8000-FFFF\r
+*/\r
+\r
+#define CTRL 0x00\r
+#define CCART 0x01\r
+#define CVIRQ 0x02\r
+#define CVNMI 0x04\r
+#define CDNMI 0x08\r
+#define CAROM 0x10\r
+#define BANK 0x01\r
+#define BMIRR 0x10\r
+#define USB 0x02\r
+#define STATUS 0x03\r
+#define SRX 0x01\r
+#define STX 0x02\r
+#define SPEN 0x04\r
+#define SCART 0x08\r
+#define SIRQ 0x10\r
+#define SNMI 0x20\r
+#define SA10 0x40\r
+#define SVRAM 0x80\r
+\r
+#ifdef DEBUG_SERIAL\r
+static uint8 debug_serial_data[] = { \r
+ 0xDE, 0xAD, 0xBE, 0xEF, 0x00,\r
+ 0xDE, 0xAD, 0xBE, 0xEF, 0x01,\r
+ \r
+ 0x02,\r
+\r
+ 0x14, 0x50, 0xB0,\r
+ \r
+ 0x02,\r
+\r
+ 0x14, 0x50, 0xB0,\r
+\r
+ 0x02,\r
+\r
+ };\r
+static uint32 debug_serial_data_size = sizeof(debug_serial_data);\r
+static uint32 debug_serial_data_pos;\r
+#endif\r
+\r
+static uint8 *CHRRAM=NULL;\r
+static uint32 CHRRAMSIZE;\r
+\r
+static uint8 regs[4];\r
+\r
+static readfunc def_read_ram, def_read_rom;\r
+static writefunc def_write_ram;\r
+\r
+static SFORMAT StateRegs[]=\r
+{\r
+ {regs, 4, "CREGS"},\r
+ {0}\r
+};\r
+\r
+static void Sync()\r
+{\r
+ FixMMC3PRG(MMC3_cmd);\r
+ FixMMC3CHR(MMC3_cmd);\r
+}\r
+\r
+static void MCopyFamiMMC3PW(uint32 A, uint8 V)\r
+{\r
+ if(regs[CTRL] & CCART)\r
+ setprg8(A,V);\r
+ else\r
+ setprg32r(1,0x8000,(regs[BANK]&0x0F)^0x08);\r
+}\r
+\r
+static void MCopyFamiMMC3CW(uint32 A, uint8 V)\r
+{\r
+ if((regs[STATUS] & SCART) && (regs[CTRL] & CAROM))\r
+ setchr8r(0x10,0);\r
+ else\r
+ setchr1r(0,A,V);\r
+}\r
+\r
+static void MCopyFamiMMC3MW(uint8 V)\r
+{\r
+ if(regs[CTRL] & CAROM)\r
+ {\r
+ setmirror(MI_0+((regs[BANK]>>4)&1));\r
+ }\r
+ else\r
+ {\r
+ A000B=V;\r
+ setmirror((V&1)^1);\r
+ }\r
+}\r
+\r
+static uint32 direction = 0xffffffff;\r
+static uint32 bytes_count = 0;\r
+\r
+static DECLFW(MCopyFamiWriteReg)\r
+{\r
+ if(((A&3) == USB)&&!fceuindbg) {\r
+ if(direction != 0) {\r
+ direction = 0;\r
+ bytes_count = 0;\r
+ FCEU_printf(" >");\r
+ }\r
+#ifndef DEBUG_SERIAL\r
+ while (!SerialSendChar(V)) {};\r
+#endif\r
+ bytes_count++;\r
+// FCEU_printf(" %02X",V);\r
+ }\r
+ else\r
+ {\r
+ regs[A&3]=V;\r
+ Sync();\r
+ }\r
+}\r
+\r
+static DECLFR(MCopyFamiReadReg)\r
+{\r
+#ifdef DEBUG_SERIAL\r
+ if(debug_serial_data_pos == debug_serial_data_size)\r
+ regs[STATUS] |= SRX;\r
+ else\r
+ regs[STATUS] &= ~SRX;\r
+#endif\r
+ if (!fceuindbg) \r
+ {\r
+#ifndef DEBUG_SERIAL\r
+ if((A&3) == STATUS)\r
+ {\r
+ int data;\r
+ if((data = SerialGetChar()) == EOF)\r
+ regs[STATUS] |= SRX;\r
+ else\r
+ regs[STATUS] &= ~SRX;\r
+ regs[USB] = data & 0xff;\r
+ } else\r
+#endif\r
+ if((A&3) == USB)\r
+ {\r
+#ifdef DEBUG_SERIAL\r
+ regs[USB] = debug_serial_data[debug_serial_data_pos++];\r
+#endif\r
+ if(direction != 1) {\r
+ if(direction != 0xffffffff) FCEU_printf(" bytes sent: %08x",bytes_count);\r
+ direction = 1;\r
+ bytes_count = 0;\r
+ FCEU_printf("\n<");\r
+ }\r
+ FCEU_printf(" %02X",regs[USB]);\r
+ }\r
+ }\r
+ return regs[A&3];\r
+}\r
+\r
+static DECLFW(MCopyFamiMMC3Write)\r
+{\r
+ if(regs[CTRL] & CAROM)\r
+ {\r
+ regs[BANK] = V & 0x1F;\r
+ Sync();\r
+ }\r
+ else\r
+ {\r
+ if(A >= 0xC000)\r
+ MMC3_IRQWrite(A,V);\r
+ else\r
+ MMC3_CMDWrite(A,V);\r
+ }\r
+}\r
+\r
+static DECLFW(MCopyFamiMMC3WriteNMI)\r
+{\r
+ if(regs[CTRL] & CVNMI)\r
+ def_write_ram(0x3FFC + (A & 1), V);\r
+ else\r
+ MCopyFamiMMC3Write(A, V);\r
+}\r
+\r
+static DECLFW(MCopyFamiMMC3WriteIRQ)\r
+{\r
+ if(regs[CTRL] & CVIRQ)\r
+ def_write_ram(0x3FFE + (A & 1), V);\r
+ else\r
+ MCopyFamiMMC3Write(A, V);\r
+}\r
+\r
+static DECLFR(MCopyFamiReadNMI)\r
+{\r
+ if(regs[CTRL] & CVNMI)\r
+ return def_read_ram(0x3FFC + (A & 1));\r
+ else\r
+ return def_read_rom(A);\r
+}\r
+\r
+static DECLFR(MCopyFamiReadIRQ)\r
+{\r
+ if(regs[CTRL] & CVIRQ)\r
+ return def_read_ram(0x3FFE + (A & 1));\r
+ else\r
+ return def_read_rom(A);\r
+}\r
+\r
+static void MCopyFamiMMC3Power(void)\r
+{\r
+ regs[CTRL] = regs[USB] = 0;\r
+ regs[STATUS] = SIRQ | SNMI | SVRAM;\r
+ regs[BANK] = 0x08;\r
+#ifdef DEBUG_SERIAL\r
+ debug_serial_data_pos = 0;\r
+#endif\r
+ GenMMC3Power();\r
+ Sync();\r
+\r
+ def_write_ram = GetWriteHandler(0x3FFC);\r
+ SetWriteHandler(0x3FFC,0x3FFF,MCopyFamiWriteReg);\r
+ def_read_ram = GetReadHandler(0x3FFC);\r
+ SetReadHandler(0x3FFC,0x3FFF,MCopyFamiReadReg);\r
+\r
+ SetWriteHandler(0x8000,0xFFF9,MCopyFamiMMC3Write);\r
+ SetWriteHandler(0xFFFA,0xFFFB,MCopyFamiMMC3WriteNMI);\r
+ SetWriteHandler(0xFFFE,0xFFFF,MCopyFamiMMC3WriteIRQ);\r
+\r
+ def_read_rom = GetReadHandler(0xFFFA);\r
+ SetReadHandler(0xFFFA,0xFFFB,MCopyFamiReadNMI);\r
+ SetReadHandler(0xFFFE,0xFFFF,MCopyFamiReadIRQ);\r
+}\r
+\r
+static void MCopyFamiMMC3Reset(void)\r
+{\r
+ regs[CTRL] = regs[USB] = 0;\r
+ regs[STATUS] = SIRQ | SNMI | SVRAM;\r
+ regs[BANK] = 0x08;\r
+#ifdef DEBUG_SERIAL\r
+ debug_serial_data_pos = 0;\r
+#endif\r
+ MMC3RegReset();\r
+ Sync();\r
+}\r
+\r
+static void MCopyFamiClose(void)\r
+{\r
+ if(CHRRAM)\r
+ FCEU_gfree(CHRRAM);\r
+ CHRRAM=NULL;\r
+ SerialClose();\r
+}\r
+\r
+static void StateRestore(int version)\r
+{\r
+ Sync();\r
+}\r
+\r
+void MapperCopyFamiMMC3_Init(CartInfo *info)\r
+{\r
+ GenMMC3_Init(info, 512, 512, 8, 0);\r
+\r
+ cwrap=MCopyFamiMMC3CW;\r
+ pwrap=MCopyFamiMMC3PW;\r
+ mwrap=MCopyFamiMMC3MW;\r
+\r
+ info->Reset=MCopyFamiMMC3Reset;\r
+ info->Power=MCopyFamiMMC3Power;\r
+ info->Close=MCopyFamiClose;\r
+ GameStateRestore=StateRestore;\r
+\r
+ CHRRAMSIZE=8192;\r
+ CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSIZE);\r
+ SetupCartCHRMapping(0x10,CHRRAM,CHRRAMSIZE,1);\r
+ AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");\r
+\r
+#ifndef DEBUG_SERIAL\r
+ FCEU_printf("WAITING FOR PORT...\n");\r
+ \r
+ while(!SerialOpen(20, 921600)) {}\r
+\r
+ FCEU_printf("PORT READY.\n");\r
+#endif\r
+\r
+ AddExState(&StateRegs, ~0, 0, 0);\r
+}\r
+\r
+#endif\r
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