+static const unsigned int sig_execve2[] = {
+ 0xef90000b, // svc 0x90000b
+ 0xe3700a01, // cmn r0, #4096
+ 0xe1a04000, // mov r4, r0
+};
+#define sig_mask_execve2 sig_mask_all
+
+static const unsigned int sig_chdir[] = {
+ 0xef90000c, // svc 0x90000c
+ 0xe3700a01, // cmn r0, #4096
+ 0x312fff1e, // bxcc lr
+ 0xea0004bb, // b *
+};
+static const unsigned int sig_mask_chdir[] = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xff000000
+};
+
+/* additional wrapper for harder case of syscalls within the code stream */
+extern int hw_ioctl(int fd, int request, void *argp);
+asm(
+"hw_ioctl:\n"
+" stmfd sp!, {r1-r3,r12,lr}\n"
+#ifdef PND // fix PC, not needed on ARM9
+" ldr r1, [sp, #5*4]\n"
+" add r1, r1, #4\n"
+" str r1, [sp, #5*4]\n"
+#endif
+" bl w_ioctl\n"
+" cmn r0, #0x1000\n"
+" mov r4, r0\n"
+" ldmfd sp!, {r1-r3,r12,lr,pc}\n"
+);
+
+#define PATCH_(f, p, t) { sig_##p, sig_mask_##p, ARRAY_SIZE(sig_##p), t, f }
+#define PATCH(f) PATCH_(w_##f, f, 0)