+static const unsigned int sig_readlink[] = {
+ 0xef900055, // svc 0x900055
+ 0xe3700a01, // cmn r0, #0x1000
+ 0x312fff1e, // bxcc lr
+};
+#define sig_mask_readlink sig_mask_all
+
+/* special */
+static const unsigned int sig_cache1[] = {
+ 0xee073f5e, // mcr 15, 0, r3, cr7, cr14, 2
+};
+#define sig_mask_cache1 sig_mask_all
+
+static const unsigned int sig_cache2[] = {
+ 0xee070f17, // mcr 15, 0, r0, cr7, cr7, 0
+};
+#define sig_mask_cache2 sig_mask_all
+
+/* additional wrappers for harder case of syscalls within the code stream */
+#ifdef PND /* fix PC, not needed on ARM9 */
+# define SVC_CMN_R0_MOV_R4_PC_ADJ() \
+" ldr r12, [sp, #5*4]\n" \
+" add r12, r12, #4\n" \
+" str r12, [sp, #5*4]\n"
+#else
+# define SVC_CMN_R0_MOV_R4_PC_ADJ()
+#endif
+
+#define SVC_CMN_R0_MOV_R4_WRAPPER(name, target) \
+extern int name(); \
+asm( \
+#name ":\n" \
+" stmfd sp!, {r1-r3,r12,lr}\n" \
+ SVC_CMN_R0_MOV_R4_PC_ADJ() \
+" bl " #target "\n" \
+" cmn r0, #0x1000\n" \
+" mov r4, r0\n" \
+" ldmfd sp!, {r1-r3,r12,lr,pc}\n" \
+);
+
+SVC_CMN_R0_MOV_R4_WRAPPER(hw_read, w_read_raw)
+SVC_CMN_R0_MOV_R4_WRAPPER(hw_ioctl, w_ioctl_raw)
+
+#define PATCH_(p, f, t) { sig_##p, sig_mask_##p, ARRAY_SIZE(sig_##p), t, f, #p }
+#define PATCH(f) PATCH_(f, w_##f, 0)