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ALL: Huge upstream synch + PerRom DelaySI & CountPerOp parameters
[mupen64plus-pandora.git] / source / mupen64plus-core / src / debugger / dbg_memory.c
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451ab91e 1/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus - dbg_memory.c *
3 * Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ *
4 * Copyright (C) 2008 DarkJeztr *
5 * Copyright (C) 2002 Blight *
6 * *
7 * This program is free software; you can redistribute it and/or modify *
8 * it under the terms of the GNU General Public License as published by *
9 * the Free Software Foundation; either version 2 of the License, or *
10 * (at your option) any later version. *
11 * *
12 * This program is distributed in the hope that it will be useful, *
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
15 * GNU General Public License for more details. *
16 * *
17 * You should have received a copy of the GNU General Public License *
18 * along with this program; if not, write to the *
19 * Free Software Foundation, Inc., *
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
21 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22
23#include <string.h>
24
25#include "dbg_types.h"
26#include "dbg_memory.h"
27#include "dbg_breakpoints.h"
28
29#include "api/m64p_types.h"
30#include "api/callbacks.h"
31#include "memory/memory.h"
32#include "r4300/r4300.h"
33#include "r4300/ops.h"
34#include "main/rom.h"
35
36/* Following are the breakpoint functions for memory access calls. See debugger/memory.h
37 * These macros generate the memory breakpoint function calls.*/
38MEMBREAKALL_local(nothing);
39MEMBREAKALL_local(nomem);
40MEMBREAKALL(rdram);
41MEMBREAKALL(rdramFB);
42MEMBREAKALL_local(rdramreg);
43MEMBREAKALL_local(rsp_mem);
44MEMBREAKALL_local(rsp_reg);
45MEMBREAKALL_local(rsp);
46MEMBREAKALL_local(dp);
47MEMBREAKALL_local(dps);
48MEMBREAKALL_local(mi);
49MEMBREAKALL_local(vi);
50MEMBREAKALL_local(ai);
51MEMBREAKALL_local(pi);
52MEMBREAKALL_local(ri);
53MEMBREAKALL_local(si);
54MEMBREAKALL_local(pif);
55
56static MEMBREAKREAD(read_flashram_status, 4);
57static MEMBREAKREAD(read_flashram_statusb, 1);
58static MEMBREAKREAD(read_flashram_statush, 2);
59static MEMBREAKREAD(read_flashram_statusd, 8);
60static MEMBREAKWRITE(write_flashram_dummy, 4);
61static MEMBREAKWRITE(write_flashram_dummyb, 1);
62static MEMBREAKWRITE(write_flashram_dummyh, 2);
63static MEMBREAKWRITE(write_flashram_dummyd, 8);
64static MEMBREAKWRITE(write_flashram_command, 4);
65static MEMBREAKWRITE(write_flashram_commandb, 1);
66static MEMBREAKWRITE(write_flashram_commandh, 2);
67static MEMBREAKWRITE(write_flashram_commandd, 8);
68
69static MEMBREAKREAD(read_rom, 4);
70static MEMBREAKREAD(read_romb, 1);
71static MEMBREAKREAD(read_romh, 2);
72static MEMBREAKREAD(read_romd, 8);
73
74static MEMBREAKWRITE(write_rom, 8);
75
76#if !defined(NO_ASM) && (defined(__i386__) || defined(__x86_64__))
77
2d262872 78/* we must define PACKAGE so that bfd.h (which is included from dis-asm.h) doesn't throw an error */
79#define PACKAGE "mupen64plus-core"
451ab91e 80#include <dis-asm.h>
81#include <stdarg.h>
82
83static int lines_recompiled;
84static uint32 addr_recompiled;
85static int num_decoded;
86
87static char opcode_recompiled[564][MAX_DISASSEMBLY];
88static char args_recompiled[564][MAX_DISASSEMBLY*4];
89static void *opaddr_recompiled[564];
90
91static disassemble_info dis_info;
92
93#define CHECK_MEM(address) \
94 if (!invalid_code[(address) >> 12] && blocks[(address) >> 12]->block[((address) & 0xFFF) / 4].ops != current_instruction_table.NOTCOMPILED) \
95 invalid_code[(address) >> 12] = 1;
96
97static void process_opcode_out(void *strm, const char *fmt, ...){
98 va_list ap;
99 va_start(ap, fmt);
100 char *arg;
101 char buff[256];
102
103 if(num_decoded==0)
104 {
105 if(strcmp(fmt,"%s")==0)
106 {
107 arg = va_arg(ap, char*);
108 strcpy(opcode_recompiled[lines_recompiled],arg);
109 }
110 else
111 strcpy(opcode_recompiled[lines_recompiled],"OPCODE-X");
112 num_decoded++;
113 *(args_recompiled[lines_recompiled])=0;
114 }
115 else
116 {
117 vsprintf(buff, fmt, ap);
118 sprintf(args_recompiled[lines_recompiled],"%s%s",
119 args_recompiled[lines_recompiled],buff);
120 }
121 va_end(ap);
122}
123
124// Callback function that will be called by libopcodes to read the
125// bytes to disassemble ('read_memory_func' member of 'disassemble_info').
126static int read_memory_func(bfd_vma memaddr, bfd_byte *myaddr,
127 unsigned int length, disassemble_info *info) {
128 char* from = (char*)(long)(memaddr);
129 char* to = (char*)myaddr;
130
131 while (length-- != 0) {
132 *to++ = *from++;
133 }
134 return (0);
135}
136
137void init_host_disassembler(void){
138
139
140 INIT_DISASSEMBLE_INFO(dis_info, stderr, process_opcode_out);
141 dis_info.fprintf_func = (fprintf_ftype) process_opcode_out;
142 dis_info.stream = stderr;
143 dis_info.bytes_per_line=1;
144 dis_info.endian = 1;
145 dis_info.mach = bfd_mach_i386_i8086;
146 dis_info.disassembler_options = (char*) "i386,suffix";
147 dis_info.read_memory_func = read_memory_func;
148}
149
150static void decode_recompiled(uint32 addr)
151{
152 unsigned char *assemb, *end_addr;
153
154 lines_recompiled=0;
155
156 if(blocks[addr>>12] == NULL)
157 return;
158
159 if(blocks[addr>>12]->block[(addr&0xFFF)/4].ops == current_instruction_table.NOTCOMPILED)
160 // recompile_block((int *) SP_DMEM, blocks[addr>>12], addr);
161 {
162 strcpy(opcode_recompiled[0],"INVLD");
163 strcpy(args_recompiled[0],"NOTCOMPILED");
164 opaddr_recompiled[0] = (void *) 0;
165 addr_recompiled=0;
166 lines_recompiled++;
167 return;
168 }
169
170 assemb = (blocks[addr>>12]->code) +
171 (blocks[addr>>12]->block[(addr&0xFFF)/4].local_addr);
172
173 end_addr = blocks[addr>>12]->code;
174
175 if( (addr & 0xFFF) >= 0xFFC)
176 end_addr += blocks[addr>>12]->code_length;
177 else
178 end_addr += blocks[addr>>12]->block[(addr&0xFFF)/4+1].local_addr;
179
180 while(assemb < end_addr)
181 {
182 opaddr_recompiled[lines_recompiled] = assemb;
183 num_decoded=0;
184
185 assemb += print_insn_i386((bfd_vma)(long) assemb, &dis_info);
186
187 lines_recompiled++;
188 }
189
190 addr_recompiled = addr;
191}
192
193char* get_recompiled_opcode(uint32 addr, int index)
194{
195 if(addr != addr_recompiled)
196 decode_recompiled(addr);
197
198 if(index < lines_recompiled)
199 return opcode_recompiled[index];
200 else
201 return NULL;
202}
203
204char* get_recompiled_args(uint32 addr, int index)
205{
206 if(addr != addr_recompiled)
207 decode_recompiled(addr);
208
209 if(index < lines_recompiled)
210 return args_recompiled[index];
211 else
212 return NULL;
213}
214
215void * get_recompiled_addr(uint32 addr, int index)
216{
217 if(addr != addr_recompiled)
218 decode_recompiled(addr);
219
220 if(index < lines_recompiled)
221 return opaddr_recompiled[index];
222 else
223 return 0;
224}
225
226int get_num_recompiled(uint32 addr)
227{
228 if(addr != addr_recompiled)
229 decode_recompiled(addr);
230
231 return lines_recompiled;
232}
233
234int get_has_recompiled(uint32 addr)
235{
236 unsigned char *assemb, *end_addr;
237
238 if(r4300emu != CORE_DYNAREC || blocks[addr>>12] == NULL)
239 return FALSE;
240
241 assemb = (blocks[addr>>12]->code) +
242 (blocks[addr>>12]->block[(addr&0xFFF)/4].local_addr);
243
244 end_addr = blocks[addr>>12]->code;
245
246 if( (addr & 0xFFF) >= 0xFFC)
247 end_addr += blocks[addr>>12]->code_length;
248 else
249 end_addr += blocks[addr>>12]->block[(addr&0xFFF)/4+1].local_addr;
250 if(assemb==end_addr)
251 return FALSE;
252
253 return TRUE;
254}
255
256#else
257
258#define CHECK_MEM(address)
259
260int get_num_recompiled(uint32 addr)
261{
262 return 0;
263}
264
265char* get_recompiled_opcode(uint32 addr, int index)
266{
267 return NULL;
268}
269
270char* get_recompiled_args(uint32 addr, int index)
271{
272 return NULL;
273}
274
275void * get_recompiled_addr(uint32 addr, int index)
276{
277 return 0;
278}
279
280int get_has_recompiled(uint32 addr)
281{
282 return 0;
283}
284
285void init_host_disassembler(void)
286{
287
288}
289
290#endif
291
292uint64 read_memory_64(uint32 addr)
293{
294 return ((uint64)read_memory_32(addr) << 32) | (uint64)read_memory_32(addr + 4);
295}
296
297uint64 read_memory_64_unaligned(uint32 addr)
298{
299 uint64 w[2];
300
301 w[0] = read_memory_32_unaligned(addr);
302 w[1] = read_memory_32_unaligned(addr + 4);
303 return (w[0] << 32) | w[1];
304}
305
306void write_memory_64(uint32 addr, uint64 value)
307{
308 write_memory_32(addr, (uint32) (value >> 32));
309 write_memory_32(addr + 4, (uint32) (value & 0xFFFFFFFF));
310}
311
312void write_memory_64_unaligned(uint32 addr, uint64 value)
313{
314 write_memory_32_unaligned(addr, (uint32) (value >> 32));
315 write_memory_32_unaligned(addr + 4, (uint32) (value & 0xFFFFFFFF));
316}
317
318uint32 read_memory_32(uint32 addr){
319 const uint32 addrlow = (addr & 0xFFFF);
320
321 switch(get_memory_type(addr))
322 {
323 case M64P_MEM_NOMEM:
324 if(tlb_LUT_r[addr>>12])
325 return read_memory_32((tlb_LUT_r[addr>>12]&0xFFFFF000)|(addr&0xFFF));
326 return M64P_MEM_INVALID;
327 case M64P_MEM_RDRAM:
328 return *((uint32 *)(rdramb + (addr & 0xFFFFFF)));
329 case M64P_MEM_RSPMEM:
330 if ((addr & 0xFFFF) < 0x1000)
331 return *((uint32 *)(SP_DMEMb + (addr&0xFFF)));
332 else if ((addr&0xFFFF) < 0x2000)
333 return *((uint32 *)(SP_IMEMb + (addr&0xFFF)));
334 else
335 return M64P_MEM_INVALID;
336 case M64P_MEM_ROM:
337 return *((uint32 *)(rom + (addr & 0x03FFFFFF)));
338 case M64P_MEM_RDRAMREG:
339 if (addrlow < 0x28)
340 return *(readrdramreg[addrlow&0xfffc]);
341 break;
342 case M64P_MEM_RSPREG:
343 if (addrlow < 0x20)
344 return *(readrspreg[addrlow&0xfffc]);
345 break;
346 case M64P_MEM_RSP:
347 if (addrlow < 0x8)
348 return *(readrsp[addrlow&0xfffc]);
349 break;
350 case M64P_MEM_DP:
351 if (addrlow < 0x20)
352 return *(readdp[addrlow&0xfffc]);
353 break;
354 case M64P_MEM_DPS:
355 if (addrlow < 0x10)
356 return *(readdps[addrlow&0xfffc]);
357 break;
358 case M64P_MEM_VI:
359 if (addrlow < 0x38)
360 return *(readvi[addrlow&0xfffc]);
361 break;
362 case M64P_MEM_AI:
363 if (addrlow < 0x18)
364 return *(readai[addrlow&0xfffc]);
365 break;
366 case M64P_MEM_PI:
367 if (addrlow < 0x34)
368 return *(readpi[addrlow&0xfffc]);
369 break;
370 case M64P_MEM_RI:
371 if (addrlow < 0x20)
372 return *(readri[addrlow&0xfffc]);
373 break;
374 case M64P_MEM_SI:
375 if (addrlow < 0x1c)
376 return *(readsi[addrlow&0xfffc]);
377 break;
378 case M64P_MEM_PIF:
379 if (addrlow >= 0x7C0 && addrlow <= 0x7FF)
380 return sl(*((unsigned int *)(PIF_RAMb + (addrlow & 0x7FF) - 0x7C0)));
381 break;
382 case M64P_MEM_MI:
383 if (addrlow < 0x10)
384 return *(readmi[addrlow&0xfffc]);
385 break;
386 default:
387 break;
388 }
389 return M64P_MEM_INVALID;
390}
391
392uint32 read_memory_32_unaligned(uint32 addr)
393{
394 uint8 i, b[4];
395
396 for(i=0; i<4; i++) b[i] = read_memory_8(addr + i);
397 return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];
398}
399
400void write_memory_32(uint32 addr, uint32 value){
401 switch(get_memory_type(addr))
402 {
403 case M64P_MEM_RDRAM:
404 *((uint32 *)(rdramb + (addr & 0xFFFFFF))) = value;
405 CHECK_MEM(addr)
406 break;
407 }
408}
409
410void write_memory_32_unaligned(uint32 addr, uint32 value)
411{
412 write_memory_8(addr + 0, value >> 24);
413 write_memory_8(addr + 1, (value >> 16) & 0xFF);
414 write_memory_8(addr + 2, (value >> 8) & 0xFF);
415 write_memory_8(addr + 3, value & 0xFF);
416}
417
418//read_memory_16_unaligned and write_memory_16_unaligned don't exist because
419//read_memory_16 and write_memory_16 work unaligned already.
420uint16 read_memory_16(uint32 addr)
421{
422 return ((uint16)read_memory_8(addr) << 8) | (uint16)read_memory_8(addr+1); //cough cough hack hack
423}
424
425void write_memory_16(uint32 addr, uint16 value)
426{
427 write_memory_8(addr, value >> 8); //this isn't much better
428 write_memory_8(addr + 1, value & 0xFF); //then again, it works unaligned
429}
430
431uint8 read_memory_8(uint32 addr)
432{
433 uint32 word;
434
435 word = read_memory_32(addr & ~3);
436 return (word >> ((3 - (addr & 3)) * 8)) & 0xFF;
437}
438
439void write_memory_8(uint32 addr, uint8 value)
440{
441 uint32 word, mask;
442
443 word = read_memory_32(addr & ~3);
444 mask = 0xFF << ((3 - (addr & 3)) * 8);
445 word = (word & ~mask) | (value << ((3 - (addr & 3)) * 8));
446 write_memory_32(addr & ~3, word);
447}
448
449uint32 get_memory_flags(uint32 addr)
450{
451 int type=get_memory_type(addr);
452 const uint32 addrlow = (addr & 0xFFFF);
453 uint32 flags = 0;
454
455 switch(type)
456 {
457 case M64P_MEM_NOMEM:
458 if(tlb_LUT_r[addr>>12])
459 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
460 break;
461 case M64P_MEM_NOTHING:
462 if (((addr >> 16) == 0x8801 || (addr >> 16 == 0xA801)) && addrlow == 0)
463 flags = M64P_MEM_FLAG_WRITABLE_EMUONLY; // for flashram command
464 break;
465 case M64P_MEM_RDRAM:
466 flags = M64P_MEM_FLAG_WRITABLE;
467 case M64P_MEM_ROM:
468 flags |= M64P_MEM_FLAG_READABLE;
469 break;
470 case M64P_MEM_RDRAMREG:
471 if (addrlow < 0x28)
472 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
473 break;
474 case M64P_MEM_RSPMEM:
475 if (addrlow < 0x2000)
476 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
477 break;
478 case M64P_MEM_RSPREG:
479 if (addrlow < 0x20)
480 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
481 break;
482 case M64P_MEM_RSP:
483 if (addrlow < 0x8)
484 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
485 break;
486 case M64P_MEM_DP:
487 if (addrlow < 0x20)
488 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
489 break;
490 case M64P_MEM_DPS:
491 if (addrlow < 0x10)
492 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
493 break;
494 case M64P_MEM_VI:
495 if (addrlow < 0x38)
496 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
497 break;
498 case M64P_MEM_AI:
499 if (addrlow < 0x18)
500 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
501 break;
502 case M64P_MEM_PI:
503 if (addrlow < 0x34)
504 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
505 break;
506 case M64P_MEM_RI:
507 if (addrlow < 0x20)
508 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
509 break;
510 case M64P_MEM_SI:
511 if (addrlow < 0x1c)
512 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
513 break;
514 case M64P_MEM_FLASHRAMSTAT:
515 if (addrlow == 0)
516 flags = M64P_MEM_FLAG_READABLE_EMUONLY;
517 break;
518 case M64P_MEM_PIF:
519 if (addrlow >= 0x7C0 && addrlow <= 0x7FF)
520 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
521 break;
522 case M64P_MEM_MI:
523 if (addrlow < 0x10)
524 flags = M64P_MEM_FLAG_READABLE | M64P_MEM_FLAG_WRITABLE_EMUONLY;
525 break;
526 default:
527 break;
528 }
529
530 return flags;
531}
532
533int get_memory_type(uint32 addr){
534 void (*readfunc)() = readmem[addr >> 16];
535
536 if((readfunc == read_nomem) || (readfunc == read_nomem_break))
537 return M64P_MEM_NOMEM;
538 else if((readfunc == read_nothing) || (readfunc == read_nothing_break))
539 return M64P_MEM_NOTHING;
540 else if((readfunc == read_rdram) || (readfunc == read_rdram_break))
541 return M64P_MEM_RDRAM;
542 else if((readfunc == read_rdramreg) || (readfunc == read_rdramreg_break))
543 return M64P_MEM_RDRAMREG;
544 else if((readfunc == read_rsp_mem) || (readfunc == read_rsp_mem_break))
545 return M64P_MEM_RSPMEM;
546 else if((readfunc == read_rsp_reg) || (readfunc == read_rsp_reg_break))
547 return M64P_MEM_RSPREG;
548 else if((readfunc == read_rsp) || (readfunc == read_rsp_break))
549 return M64P_MEM_RSP;
550 else if((readfunc == read_dp) || (readfunc == read_dp_break))
551 return M64P_MEM_DP;
552 else if((readfunc == read_dps) || (readfunc == read_dps_break))
553 return M64P_MEM_DPS;
554 else if((readfunc == read_vi) || (readfunc == read_vi_break))
555 return M64P_MEM_VI;
556 else if((readfunc == read_ai) || (readfunc == read_ai_break))
557 return M64P_MEM_AI;
558 else if((readfunc == read_pi) || (readfunc == read_pi_break))
559 return M64P_MEM_PI;
560 else if((readfunc == read_ri) || (readfunc == read_ri_break))
561 return M64P_MEM_RI;
562 else if((readfunc == read_si) || (readfunc == read_si_break))
563 return M64P_MEM_SI;
564 else if((readfunc == read_flashram_status) ||
565 (readfunc == read_flashram_status_break))
566 return M64P_MEM_FLASHRAMSTAT;
567 else if((readfunc == read_rom) || (readfunc == read_rom_break))
568 return M64P_MEM_ROM;
569 else if((readfunc == read_pif) || (readfunc == read_pif_break))
570 return M64P_MEM_PIF;
571 else if((readfunc == read_mi) || (readfunc == read_mi_break))
572 return M64P_MEM_MI;
573 else
574 DebugMessage(M64MSG_ERROR, "Unknown memory type in debugger get_memory_type(): %p", readfunc);
575 return M64P_MEM_NOMEM;
576}
577
578void activate_memory_break_read(uint32 addr) {
579 void (*readfunc)() = readmem[addr >> 16];
580
581 if(readfunc == read_nomem) {
582 readmem[addr >> 16] = read_nomem_break;
583 readmemb[addr >> 16] = read_nomemb_break;
584 readmemh[addr >> 16] = read_nomemh_break;
585 readmemd[addr >> 16] = read_nomemd_break;
586 }
587 else if(readfunc == read_nothing) {
588 readmem[addr >> 16] = read_nothing_break;
589 readmemb[addr >> 16] = read_nothingb_break;
590 readmemh[addr >> 16] = read_nothingh_break;
591 readmemd[addr >> 16] = read_nothingd_break;
592 }
593 else if(readfunc == read_rdram) {
594 readmem[addr >> 16] = read_rdram_break;
595 readmemb[addr >> 16] = read_rdramb_break;
596 readmemh[addr >> 16] = read_rdramh_break;
597 readmemd[addr >> 16] = read_rdramd_break;
598 }
599 else if(readfunc == read_rdramFB) {
600 readmem[addr >> 16] = read_rdramFB_break;
601 readmemb[addr >> 16] = read_rdramFBb_break;
602 readmemh[addr >> 16] = read_rdramFBh_break;
603 readmemd[addr >> 16] = read_rdramFBd_break;
604 }
605 else if(readfunc == read_rdramreg) {
606 readmem[addr >> 16] = read_rdramreg_break;
607 readmemb[addr >> 16] = read_rdramregb_break;
608 readmemh[addr >> 16] = read_rdramregh_break;
609 readmemd[addr >> 16] = read_rdramregd_break;
610 }
611 else if(readfunc == read_rsp_mem) {
612 readmem[addr >> 16] = read_rsp_mem_break;
613 readmemb[addr >> 16] = read_rsp_memb_break;
614 readmemh[addr >> 16] = read_rsp_memh_break;
615 readmemd[addr >> 16] = read_rsp_memd_break;
616 }
617 else if(readfunc == read_rsp_reg) {
618 readmem[addr >> 16] = read_rsp_reg_break;
619 readmemb[addr >> 16] = read_rsp_regh_break;
620 readmemh[addr >> 16] = read_rsp_regb_break;
621 readmemd[addr >> 16] = read_rsp_regd_break;
622 }
623 else if(readfunc == read_rsp) {
624 readmem[addr >> 16] = read_rsp_break;
625 readmemb[addr >> 16] = read_rsph_break;
626 readmemh[addr >> 16] = read_rspb_break;
627 readmemd[addr >> 16] = read_rspd_break;
628 }
629 else if(readfunc == read_dp) {
630 readmem[addr >> 16] = read_dp_break;
631 readmemb[addr >> 16] = read_dpb_break;
632 readmemh[addr >> 16] = read_dph_break;
633 readmemd[addr >> 16] = read_dpd_break;
634 }
635 else if(readfunc == read_dps) {
636 readmem[addr >> 16] = read_dps_break;
637 readmemb[addr >> 16] = read_dpsb_break;
638 readmemh[addr >> 16] = read_dpsh_break;
639 readmemd[addr >> 16] = read_dpsd_break;
640 }
641 else if(readfunc == read_mi) {
642 readmem[addr >> 16] = read_mi_break;
643 readmemb[addr >> 16] = read_mib_break;
644 readmemh[addr >> 16] = read_mih_break;
645 readmemd[addr >> 16] = read_mid_break;
646 }
647 else if(readfunc == read_vi) {
648 readmem[addr >> 16] = read_vi_break;
649 readmemb[addr >> 16] = read_vib_break;
650 readmemh[addr >> 16] = read_vih_break;
651 readmemd[addr >> 16] = read_vid_break;
652 }
653 else if(readfunc == read_ai) {
654 readmem[addr >> 16] = read_ai_break;
655 readmemb[addr >> 16] = read_aib_break;
656 readmemh[addr >> 16] = read_aih_break;
657 readmemd[addr >> 16] = read_aid_break;
658 }
659 else if(readfunc == read_pi) {
660 readmem[addr >> 16] = read_pi_break;
661 readmemb[addr >> 16] = read_pib_break;
662 readmemh[addr >> 16] = read_pih_break;
663 readmemd[addr >> 16] = read_pid_break;
664 }
665 else if(readfunc == read_ri) {
666 readmem[addr >> 16] = read_ri_break;
667 readmemb[addr >> 16] = read_rib_break;
668 readmemh[addr >> 16] = read_rih_break;
669 readmemd[addr >> 16] = read_rid_break;
670 }
671 else if(readfunc == read_si) {
672 readmem[addr >> 16] = read_si_break;
673 readmemb[addr >> 16] = read_sib_break;
674 readmemh[addr >> 16] = read_sih_break;
675 readmemd[addr >> 16] = read_sid_break;
676 }
677 else if(readfunc == read_pif) {
678 readmem[addr >> 16] = read_pif_break;
679 readmemb[addr >> 16] = read_pifb_break;
680 readmemh[addr >> 16] = read_pifh_break;
681 readmemd[addr >> 16] = read_pifd_break;
682 }
683 else if(readfunc == read_flashram_status) {
684 readmem[addr >> 16] = read_flashram_status_break;
685 readmemb[addr >> 16] = read_flashram_statusb_break;
686 readmemh[addr >> 16] = read_flashram_statush_break;
687 readmemd[addr >> 16] = read_flashram_statusd_break;
688 }
689 else if(readfunc == read_rom) {
690 readmem[addr >> 16] = read_rom_break;
691 readmemb[addr >> 16] = read_romb_break;
692 readmemh[addr >> 16] = read_romh_break;
693 readmemd[addr >> 16] = read_romd_break;
694 }
695 else
696 DebugMessage(M64MSG_ERROR, "Unknown memory type in debugger activate_memory_break_read(): %p", readfunc);
697}
698
699void deactivate_memory_break_read(uint32 addr) {
700 void (*readfunc)() = readmem[addr >> 16];
701
702 if(readfunc == read_nomem_break) {
703 readmem[addr >> 16] = read_nomem;
704 readmemb[addr >> 16] = read_nomemb;
705 readmemh[addr >> 16] = read_nomemh;
706 readmemd[addr >> 16] = read_nomemd;
707 }
708 else if(readfunc == read_nothing_break) {
709 readmem[addr >> 16] = read_nothing;
710 readmemb[addr >> 16] = read_nothingb;
711 readmemh[addr >> 16] = read_nothingh;
712 readmemd[addr >> 16] = read_nothingd;
713 }
714 else if(readfunc == read_rdram_break) {
715 readmem[addr >> 16] = read_rdram;
716 readmemb[addr >> 16] = read_rdramb;
717 readmemh[addr >> 16] = read_rdramh;
718 readmemd[addr >> 16] = read_rdramd;
719 }
720 else if(readfunc == read_rdramFB_break) {
721 readmem[addr >> 16] = read_rdramFB;
722 readmemb[addr >> 16] = read_rdramFBb;
723 readmemh[addr >> 16] = read_rdramFBh;
724 readmemd[addr >> 16] = read_rdramFBd;
725 }
726 else if(readfunc == read_rdramreg_break) {
727 readmem[addr >> 16] = read_rdramreg;
728 readmemb[addr >> 16] = read_rdramregb;
729 readmemh[addr >> 16] = read_rdramregh;
730 readmemd[addr >> 16] = read_rdramregd;
731 }
732 else if(readfunc == read_rsp_mem_break) {
733 readmem[addr >> 16] = read_rsp_mem;
734 readmemb[addr >> 16] = read_rsp_memb;
735 readmemh[addr >> 16] = read_rsp_memh;
736 readmemd[addr >> 16] = read_rsp_memd;
737 }
738 else if(readfunc == read_rsp_reg_break) {
739 readmem[addr >> 16] = read_rsp_reg;
740 readmemb[addr >> 16] = read_rsp_regh;
741 readmemh[addr >> 16] = read_rsp_regb;
742 readmemd[addr >> 16] = read_rsp_regd;
743 }
744 else if(readfunc == read_rsp_break) {
745 readmem[addr >> 16] = read_rsp;
746 readmemb[addr >> 16] = read_rsph;
747 readmemh[addr >> 16] = read_rspb;
748 readmemd[addr >> 16] = read_rspd;
749 }
750 else if(readfunc == read_dp_break) {
751 readmem[addr >> 16] = read_dp;
752 readmemb[addr >> 16] = read_dpb;
753 readmemh[addr >> 16] = read_dph;
754 readmemd[addr >> 16] = read_dpd;
755 }
756 else if(readfunc == read_dps_break) {
757 readmem[addr >> 16] = read_dps;
758 readmemb[addr >> 16] = read_dpsb;
759 readmemh[addr >> 16] = read_dpsh;
760 readmemd[addr >> 16] = read_dpsd;
761 }
762 else if(readfunc == read_mi_break) {
763 readmem[addr >> 16] = read_mi;
764 readmemb[addr >> 16] = read_mib;
765 readmemh[addr >> 16] = read_mih;
766 readmemd[addr >> 16] = read_mid;
767 }
768 else if(readfunc == read_vi_break) {
769 readmem[addr >> 16] = read_vi;
770 readmemb[addr >> 16] = read_vib;
771 readmemh[addr >> 16] = read_vih;
772 readmemd[addr >> 16] = read_vid;
773 }
774 else if(readfunc == read_ai_break) {
775 readmem[addr >> 16] = read_ai;
776 readmemb[addr >> 16] = read_aib;
777 readmemh[addr >> 16] = read_aih;
778 readmemd[addr >> 16] = read_aid;
779 }
780 else if(readfunc == read_pi_break) {
781 readmem[addr >> 16] = read_pi;
782 readmemb[addr >> 16] = read_pib;
783 readmemh[addr >> 16] = read_pih;
784 readmemd[addr >> 16] = read_pid;
785 }
786 else if(readfunc == read_ri_break) {
787 readmem[addr >> 16] = read_ri;
788 readmemb[addr >> 16] = read_rib;
789 readmemh[addr >> 16] = read_rih;
790 readmemd[addr >> 16] = read_rid;
791 }
792 else if(readfunc == read_si_break) {
793 readmem[addr >> 16] = read_si;
794 readmemb[addr >> 16] = read_sib;
795 readmemh[addr >> 16] = read_sih;
796 readmemd[addr >> 16] = read_sid;
797 }
798 else if(readfunc == read_pif_break) {
799 readmem[addr >> 16] = read_pif;
800 readmemb[addr >> 16] = read_pifb;
801 readmemh[addr >> 16] = read_pifh;
802 readmemd[addr >> 16] = read_pifd;
803 }
804 else if(readfunc == read_flashram_status_break) {
805 readmem[addr >> 16] = read_flashram_status;
806 readmemb[addr >> 16] = read_flashram_statusb;
807 readmemh[addr >> 16] = read_flashram_statush;
808 readmemd[addr >> 16] = read_flashram_statusd;
809 }
810 else if(readfunc == read_rom_break) {
811 readmem[addr >> 16] = read_rom;
812 readmemb[addr >> 16] = read_romb;
813 readmemh[addr >> 16] = read_romh;
814 readmemd[addr >> 16] = read_romd;
815 }
816 else
817 DebugMessage(M64MSG_ERROR, "Unknown memory type in debugger deactivate_memory_break_read(): %p", readfunc);
818}
819
820void activate_memory_break_write(uint32 addr) {
821 void (*writefunc)() = writemem[addr >> 16];
822
823 if(writefunc == write_nomem) {
824 writemem[addr >> 16] = write_nomem_break;
825 writememb[addr >> 16] = write_nomemb_break;
826 writememh[addr >> 16] = write_nomemh_break;
827 writememd[addr >> 16] = write_nomemd_break;
828 }
829 else if(writefunc == write_nothing) {
830 writemem[addr >> 16] = write_nothing_break;
831 writememb[addr >> 16] = write_nothingb_break;
832 writememh[addr >> 16] = write_nothingh_break;
833 writememd[addr >> 16] = write_nothingd_break;
834 }
835 else if(writefunc == write_rdram) {
836 writemem[addr >> 16] = write_rdram_break;
837 writememb[addr >> 16] = write_rdramb_break;
838 writememh[addr >> 16] = write_rdramh_break;
839 writememd[addr >> 16] = write_rdramd_break;
840 }
841 else if(writefunc == write_rdramFB) {
842 writemem[addr >> 16] = write_rdramFB_break;
843 writememb[addr >> 16] = write_rdramFBb_break;
844 writememh[addr >> 16] = write_rdramFBh_break;
845 writememd[addr >> 16] = write_rdramFBd_break;
846 }
847 else if(writefunc == write_rdramreg) {
848 writemem[addr >> 16] = write_rdramreg_break;
849 writememb[addr >> 16] = write_rdramregb_break;
850 writememh[addr >> 16] = write_rdramregh_break;
851 writememd[addr >> 16] = write_rdramregd_break;
852 }
853 else if(writefunc == write_rsp_mem) {
854 writemem[addr >> 16] = write_rsp_mem_break;
855 writememb[addr >> 16] = write_rsp_memb_break;
856 writememh[addr >> 16] = write_rsp_memh_break;
857 writememd[addr >> 16] = write_rsp_memd_break;
858 }
859 else if(writefunc == write_rsp_reg) {
860 writemem[addr >> 16] = write_rsp_reg_break;
861 writememb[addr >> 16] = write_rsp_regh_break;
862 writememh[addr >> 16] = write_rsp_regb_break;
863 writememd[addr >> 16] = write_rsp_regd_break;
864 }
865 else if(writefunc == write_rsp) {
866 writemem[addr >> 16] = write_rsp_break;
867 writememb[addr >> 16] = write_rsph_break;
868 writememh[addr >> 16] = write_rspb_break;
869 writememd[addr >> 16] = write_rspd_break;
870 }
871 else if(writefunc == write_dp) {
872 writemem[addr >> 16] = write_dp_break;
873 writememb[addr >> 16] = write_dpb_break;
874 writememh[addr >> 16] = write_dph_break;
875 writememd[addr >> 16] = write_dpd_break;
876 }
877 else if(writefunc == write_dps) {
878 writemem[addr >> 16] = write_dps_break;
879 writememb[addr >> 16] = write_dpsb_break;
880 writememh[addr >> 16] = write_dpsh_break;
881 writememd[addr >> 16] = write_dpsd_break;
882 }
883 else if(writefunc == write_mi) {
884 writemem[addr >> 16] = write_mi_break;
885 writememb[addr >> 16] = write_mib_break;
886 writememh[addr >> 16] = write_mih_break;
887 writememd[addr >> 16] = write_mid_break;
888 }
889 else if(writefunc == write_vi) {
890 writemem[addr >> 16] = write_vi_break;
891 writememb[addr >> 16] = write_vib_break;
892 writememh[addr >> 16] = write_vih_break;
893 writememd[addr >> 16] = write_vid_break;
894 }
895 else if(writefunc == write_ai) {
896 writemem[addr >> 16] = write_ai_break;
897 writememb[addr >> 16] = write_aib_break;
898 writememh[addr >> 16] = write_aih_break;
899 writememd[addr >> 16] = write_aid_break;
900 }
901 else if(writefunc == write_pi) {
902 writemem[addr >> 16] = write_pi_break;
903 writememb[addr >> 16] = write_pib_break;
904 writememh[addr >> 16] = write_pih_break;
905 writememd[addr >> 16] = write_pid_break;
906 }
907 else if(writefunc == write_ri) {
908 writemem[addr >> 16] = write_ri_break;
909 writememb[addr >> 16] = write_rib_break;
910 writememh[addr >> 16] = write_rih_break;
911 writememd[addr >> 16] = write_rid_break;
912 }
913 else if(writefunc == write_si) {
914 writemem[addr >> 16] = write_si_break;
915 writememb[addr >> 16] = write_sib_break;
916 writememh[addr >> 16] = write_sih_break;
917 writememd[addr >> 16] = write_sid_break;
918 }
919 else if(writefunc == write_pif) {
920 writemem[addr >> 16] = write_pif_break;
921 writememb[addr >> 16] = write_pifb_break;
922 writememh[addr >> 16] = write_pifh_break;
923 writememd[addr >> 16] = write_pifd_break;
924 }
925 else if(writefunc == write_flashram_dummy) {
926 writemem[addr >> 16] = write_flashram_dummy_break;
927 writememb[addr >> 16] = write_flashram_dummyb_break;
928 writememh[addr >> 16] = write_flashram_dummyh_break;
929 writememd[addr >> 16] = write_flashram_dummyd_break;
930 }
931 else if(writefunc == write_flashram_command) {
932 writemem[addr >> 16] = write_flashram_command_break;
933 writememb[addr >> 16] = write_flashram_commandb_break;
934 writememh[addr >> 16] = write_flashram_commandh_break;
935 writememd[addr >> 16] = write_flashram_commandd_break;
936 }
937 else if(writefunc == write_rom) {
938 writemem[addr >> 16] = write_rom_break;
939 writememb[addr >> 16] = write_nothingb_break;
940 writememh[addr >> 16] = write_nothingh_break;
941 writememd[addr >> 16] = write_nothingd_break;
942 }
943 else
944 DebugMessage(M64MSG_ERROR, "Unknown memory type in debugger activate_memory_break_write(): %p", writefunc);
945}
946
947void deactivate_memory_break_write(uint32 addr) {
948 void (*writefunc)() = writemem[addr >> 16];
949
950 if(writefunc == write_nomem_break) {
951 writemem[addr >> 16] = write_nomem;
952 writememb[addr >> 16] = write_nomemb;
953 writememh[addr >> 16] = write_nomemh;
954 writememd[addr >> 16] = write_nomemd;
955 }
956 else if(writefunc == write_nothing_break) {
957 writemem[addr >> 16] = write_nothing;
958 writememb[addr >> 16] = write_nothingb;
959 writememh[addr >> 16] = write_nothingh;
960 writememd[addr >> 16] = write_nothingd;
961 }
962 else if(writefunc == write_rdram_break) {
963 writemem[addr >> 16] = write_rdram;
964 writememb[addr >> 16] = write_rdramb;
965 writememh[addr >> 16] = write_rdramh;
966 writememd[addr >> 16] = write_rdramd;
967 }
968 else if(writefunc == write_rdramFB_break) {
969 writemem[addr >> 16] = write_rdramFB;
970 writememb[addr >> 16] = write_rdramFBb;
971 writememh[addr >> 16] = write_rdramFBh;
972 writememd[addr >> 16] = write_rdramFBd;
973 }
974 else if(writefunc == write_rdramreg_break) {
975 writemem[addr >> 16] = write_rdramreg;
976 writememb[addr >> 16] = write_rdramregb;
977 writememh[addr >> 16] = write_rdramregh;
978 writememd[addr >> 16] = write_rdramregd;
979 }
980 else if(writefunc == write_rsp_mem_break) {
981 writemem[addr >> 16] = write_rsp_mem;
982 writememb[addr >> 16] = write_rsp_memb;
983 writememh[addr >> 16] = write_rsp_memh;
984 writememd[addr >> 16] = write_rsp_memd;
985 }
986 else if(writefunc == write_rsp_reg_break) {
987 writemem[addr >> 16] = write_rsp_reg;
988 writememb[addr >> 16] = write_rsp_regh;
989 writememh[addr >> 16] = write_rsp_regb;
990 writememd[addr >> 16] = write_rsp_regd;
991 }
992 else if(writefunc == write_rsp_break) {
993 writemem[addr >> 16] = write_rsp;
994 writememb[addr >> 16] = write_rsph;
995 writememh[addr >> 16] = write_rspb;
996 writememd[addr >> 16] = write_rspd;
997 }
998 else if(writefunc == write_dp_break) {
999 writemem[addr >> 16] = write_dp;
1000 writememb[addr >> 16] = write_dpb;
1001 writememh[addr >> 16] = write_dph;
1002 writememd[addr >> 16] = write_dpd;
1003 }
1004 else if(writefunc == write_dps_break) {
1005 writemem[addr >> 16] = write_dps;
1006 writememb[addr >> 16] = write_dpsb;
1007 writememh[addr >> 16] = write_dpsh;
1008 writememd[addr >> 16] = write_dpsd;
1009 }
1010 else if(writefunc == write_mi_break) {
1011 writemem[addr >> 16] = write_mi;
1012 writememb[addr >> 16] = write_mib;
1013 writememh[addr >> 16] = write_mih;
1014 writememd[addr >> 16] = write_mid;
1015 }
1016 else if(writefunc == write_vi_break) {
1017 writemem[addr >> 16] = write_vi;
1018 writememb[addr >> 16] = write_vib;
1019 writememh[addr >> 16] = write_vih;
1020 writememd[addr >> 16] = write_vid;
1021 }
1022 else if(writefunc == write_ai_break) {
1023 writemem[addr >> 16] = write_ai;
1024 writememb[addr >> 16] = write_aib;
1025 writememh[addr >> 16] = write_aih;
1026 writememd[addr >> 16] = write_aid;
1027 }
1028 else if(writefunc == write_pi_break) {
1029 writemem[addr >> 16] = write_pi;
1030 writememb[addr >> 16] = write_pib;
1031 writememh[addr >> 16] = write_pih;
1032 writememd[addr >> 16] = write_pid;
1033 }
1034 else if(writefunc == write_ri_break) {
1035 writemem[addr >> 16] = write_ri;
1036 writememb[addr >> 16] = write_rib;
1037 writememh[addr >> 16] = write_rih;
1038 writememd[addr >> 16] = write_rid;
1039 }
1040 else if(writefunc == write_si_break) {
1041 writemem[addr >> 16] = write_si;
1042 writememb[addr >> 16] = write_sib;
1043 writememh[addr >> 16] = write_sih;
1044 writememd[addr >> 16] = write_sid;
1045 }
1046 else if(writefunc == write_pif_break) {
1047 writemem[addr >> 16] = write_pif;
1048 writememb[addr >> 16] = write_pifb;
1049 writememh[addr >> 16] = write_pifh;
1050 writememd[addr >> 16] = write_pifd;
1051 }
1052 else if(writefunc == write_flashram_dummy_break) {
1053 writemem[addr >> 16] = write_flashram_dummy;
1054 writememb[addr >> 16] = write_flashram_dummyb;
1055 writememh[addr >> 16] = write_flashram_dummyh;
1056 writememd[addr >> 16] = write_flashram_dummyd;
1057 }
1058 else if(writefunc == write_flashram_command_break) {
1059 writemem[addr >> 16] = write_flashram_command;
1060 writememb[addr >> 16] = write_flashram_commandb;
1061 writememh[addr >> 16] = write_flashram_commandh;
1062 writememd[addr >> 16] = write_flashram_commandd;
1063 }
1064 else if(writefunc == write_rom_break) {
1065 writemem[addr >> 16] = write_rom;
1066 writememb[addr >> 16] = write_nothingb;
1067 writememh[addr >> 16] = write_nothingh;
1068 writememd[addr >> 16] = write_nothingd;
1069 }
1070 else
1071 DebugMessage(M64MSG_ERROR, "Unknown memory type in debugger deactivate_memory_break_write(): %p", writefunc);
1072}
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