drc: rework cycle counting
authornotaz <notasas@gmail.com>
Sun, 28 Nov 2021 15:12:04 +0000 (17:12 +0200)
committernotaz <notasas@gmail.com>
Sun, 28 Nov 2021 23:33:54 +0000 (01:33 +0200)
commit2330734fa3064bf3a159c3c56f9a2e005598360e
tree0db5e73604c2845dc9d6a23dfb2f9b343035eb47
parentb7ec323c2e42a9ff8df844e5a95665733abb4bc1
drc: rework cycle counting

The way it was done before caused different behaviour on different
platforms because the dynarec can invert branches depending on register
pressure and maybe other things. Because of that cycle counts would
change slightly but sufficiently to break/fix timing sensitive games.
Now it should be more consistent, maybe.
libpcsxcore/new_dynarec/assem_arm.c
libpcsxcore/new_dynarec/assem_arm64.c
libpcsxcore/new_dynarec/emu_if.c
libpcsxcore/new_dynarec/new_dynarec.c
libpcsxcore/new_dynarec/patches/trace_drc_chk
libpcsxcore/new_dynarec/patches/trace_intr