5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
9 #include "../pico_int.h"
10 #include "../sound/ym2612.h"
12 extern unsigned char formatted_bram[4*0x10];
14 static unsigned int mcd_m68k_cycle_mult;
15 static unsigned int mcd_m68k_cycle_base;
16 static unsigned int mcd_s68k_cycle_base;
18 void (*PicoMCDopenTray)(void) = NULL;
19 void (*PicoMCDcloseTray)(void) = NULL;
22 PICO_INTERNAL void PicoInitMCD(void)
27 PICO_INTERNAL void PicoExitMCD(void)
31 PICO_INTERNAL void PicoPowerMCD(void)
33 SekCycleCntS68k = SekCycleAimS68k = 0;
35 int fmt_size = sizeof(formatted_bram);
36 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
37 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
38 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
39 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
40 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
41 formatted_bram, fmt_size);
42 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
43 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
44 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
45 Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum
51 // cold reset state (tested)
52 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
53 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
54 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
55 memset(Pico_mcd->bios + 0x70, 0xff, 4);
58 void pcd_soft_reset(void)
60 // Reset_CD(); // breaks Fahrenheit CD swap
62 Pico_mcd->m.s68k_pend_ints = 0;
65 #ifdef _ASM_CD_MEMORY_C
66 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
69 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
71 // TODO: test if register state/timers change
74 PICO_INTERNAL int PicoResetMCD(void)
76 // reset button doesn't affect MCD hardware
78 // use SRam.data for RAM cart
79 if (PicoOpt & POPT_EN_MCD_RAMCART) {
80 if (SRam.data == NULL)
81 SRam.data = calloc(1, 0x12000);
83 else if (SRam.data != NULL) {
87 SRam.start = SRam.end = 0; // unused
92 static __inline void SekRunS68k(unsigned int to)
97 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
100 if (SekShouldInterrupt())
101 Pico_mcd->m.s68k_poll_a = 0;
103 SekCycleCntS68k += cyc_do;
104 #if defined(EMU_C68K)
105 PicoCpuCS68k.cycles = cyc_do;
106 CycloneRun(&PicoCpuCS68k);
107 SekCycleCntS68k -= PicoCpuCS68k.cycles;
108 #elif defined(EMU_M68K)
109 m68k_set_context(&PicoCpuMS68k);
110 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
111 m68k_set_context(&PicoCpuMM68k);
112 #elif defined(EMU_F68K)
113 g_m68kcontext = &PicoCpuFS68k;
114 SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
115 g_m68kcontext = &PicoCpuFM68k;
119 static void pcd_set_cycle_mult(void)
121 // ~1.63 for NTSC, ~1.645 for PAL
123 mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
125 mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
128 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
130 return (long long)c * mcd_m68k_cycle_mult >> 16;
134 static void pcd_cdc_event(unsigned int now)
139 /* check if a new CDD command has been processed */
140 if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
142 /* reset CDD command wait flag */
143 Pico_mcd->s68k_regs[0x4b] = 0xf0;
145 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
146 elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4");
151 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
154 static void pcd_int3_timer_event(unsigned int now)
156 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
157 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
161 if (Pico_mcd->s68k_regs[0x31] != 0)
162 pcd_event_schedule(now, PCD_EVENT_TIMER3,
163 Pico_mcd->s68k_regs[0x31] * 384);
166 static void pcd_dma_event(unsigned int now)
171 typedef void (event_cb)(unsigned int now);
173 /* times are in s68k (12.5MHz) cycles */
174 unsigned int pcd_event_times[PCD_EVENT_COUNT];
175 static unsigned int event_time_next;
176 static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
177 [PCD_EVENT_CDC] = pcd_cdc_event,
178 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
179 [PCD_EVENT_GFX] = gfx_update,
180 [PCD_EVENT_DMA] = pcd_dma_event,
183 void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
190 pcd_event_times[event] = 0;
196 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
197 pcd_event_times[event] = when;
199 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
200 event_time_next = when;
203 void pcd_event_schedule_s68k(enum pcd_event event, int after)
205 if (SekCyclesLeftS68k > after)
206 SekEndRunS68k(after);
208 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
211 static void pcd_run_events(unsigned int until)
213 int oldest, oldest_diff, time;
217 oldest = -1, oldest_diff = 0x7fffffff;
219 for (i = 0; i < PCD_EVENT_COUNT; i++) {
220 if (pcd_event_times[i]) {
221 diff = pcd_event_times[i] - until;
222 if (diff < oldest_diff) {
229 if (oldest_diff <= 0) {
230 time = pcd_event_times[oldest];
231 pcd_event_times[oldest] = 0;
232 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
233 pcd_event_cbs[oldest](time);
235 else if (oldest_diff < 0x7fffffff) {
236 event_time_next = pcd_event_times[oldest];
246 elprintf(EL_CD, "cd: next event #%d at %u",
247 oldest, event_time_next);
250 int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
252 #define now SekCycleCntS68k
253 unsigned int s68k_target;
256 target = m68k_target - mcd_m68k_cycle_base;
257 s68k_target = mcd_s68k_cycle_base +
258 ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
260 elprintf(EL_CD, "s68k sync to %u, %u->%u",
261 m68k_target, now, s68k_target);
263 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
264 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
265 pcd_run_events(m68k_target);
269 while (CYCLES_GT(s68k_target, now)) {
270 if (event_time_next && CYCLES_GE(now, event_time_next))
273 target = s68k_target;
274 if (event_time_next && CYCLES_GT(target, event_time_next))
275 target = event_time_next;
278 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
282 return s68k_target - now;
286 #define pcd_run_cpus_normal pcd_run_cpus
287 //#define pcd_run_cpus_lockstep pcd_run_cpus
289 static void SekSyncM68k(void);
291 void pcd_run_cpus_normal(int m68k_cycles)
293 SekCycleAim += m68k_cycles;
294 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
295 Pico_mcd->m.m68k_poll_cnt = 0;
296 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
297 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
298 if (s68k_left <= 0) {
299 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
300 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
301 SekCycleCnt = SekCycleAim;
304 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
310 void pcd_run_cpus_lockstep(int m68k_cycles)
312 unsigned int target = SekCycleAim + m68k_cycles;
316 pcd_sync_s68k(SekCycleAim, 0);
317 } while (CYCLES_GT(target, SekCycleAim));
319 SekCycleAim = target;
323 #define CPUS_RUN(m68k_cycles) \
324 pcd_run_cpus(m68k_cycles)
326 #include "../pico_cmn.c"
329 void pcd_prepare_frame(void)
331 pcd_set_cycle_mult();
333 // need this because we can't have direct mapping between
334 // master<->slave cycle counters because of overflows
335 mcd_m68k_cycle_base = SekCycleAim;
336 mcd_s68k_cycle_base = SekCycleAimS68k;
339 PICO_INTERNAL void PicoFrameMCD(void)
347 void pcd_state_loaded(void)
352 pcd_set_cycle_mult();
353 pcd_state_loaded_mem();
355 memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
356 Pico_mcd->pcm_mixbuf_dirty = 0;
357 Pico_mcd->pcm_mixpos = 0;
358 Pico_mcd->pcm_regs_dirty = 1;
361 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
362 diff = cycles - SekCycleAimS68k;
363 if (diff < -1000 || diff > 1000) {
364 SekCycleCntS68k = SekCycleAimS68k = cycles;
366 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
367 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
369 if (Pico_mcd->s68k_regs[0x31])
370 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
371 Pico_mcd->s68k_regs[0x31] * 384);
374 diff = cycles - Pico_mcd->pcm.update_cycles;
375 if ((unsigned int)diff > 12500000/50)
376 Pico_mcd->pcm.update_cycles = cycles;
380 pcd_run_events(SekCycleCntS68k);
383 // vim:shiftwidth=2:ts=2:expandtab