2 * Memory I/O handlers for Sega/Mega CD.
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3 * (C) notaz, 2007-2009
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5 * This work is licensed under the terms of MAME license.
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6 * See COPYING file in the top-level directory.
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9 #include "../pico_int.h"
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10 #include "../memory.h"
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12 uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
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13 uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
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14 uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
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15 uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
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17 MAKE_68K_READ8(s68k_read8, s68k_read8_map)
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18 MAKE_68K_READ16(s68k_read16, s68k_read16_map)
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19 MAKE_68K_READ32(s68k_read32, s68k_read16_map)
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20 MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
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21 MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
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22 MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
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24 // -----------------------------------------------------------------
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26 // provided by ASM code:
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27 #ifdef _ASM_CD_MEMORY_C
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28 u32 PicoReadS68k8_pr(u32 a);
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29 u32 PicoReadS68k16_pr(u32 a);
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30 void PicoWriteS68k8_pr(u32 a, u32 d);
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31 void PicoWriteS68k16_pr(u32 a, u32 d);
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33 u32 PicoReadM68k8_cell0(u32 a);
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34 u32 PicoReadM68k8_cell1(u32 a);
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35 u32 PicoReadM68k16_cell0(u32 a);
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36 u32 PicoReadM68k16_cell1(u32 a);
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37 void PicoWriteM68k8_cell0(u32 a, u32 d);
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38 void PicoWriteM68k8_cell1(u32 a, u32 d);
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39 void PicoWriteM68k16_cell0(u32 a, u32 d);
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40 void PicoWriteM68k16_cell1(u32 a, u32 d);
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42 u32 PicoReadS68k8_dec0(u32 a);
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43 u32 PicoReadS68k8_dec1(u32 a);
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44 u32 PicoReadS68k16_dec0(u32 a);
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45 u32 PicoReadS68k16_dec1(u32 a);
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46 void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);
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47 void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);
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48 void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);
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49 void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);
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50 void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);
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51 void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);
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52 void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);
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53 void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);
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54 void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);
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55 void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);
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56 void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
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57 void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
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60 static void remap_prg_window(u32 r1, u32 r3);
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61 static void remap_word_ram(u32 r3);
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64 #define POLL_LIMIT 16
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65 #define POLL_CYCLES 64
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67 void m68k_comm_check(u32 a)
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69 pcd_sync_s68k(SekCyclesDone(), 0);
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70 if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {
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71 Pico_mcd->m.m68k_poll_a = a;
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72 Pico_mcd->m.m68k_poll_cnt = 0;
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76 Pico_mcd->m.m68k_poll_cnt++;
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79 #ifndef _ASM_CD_MEMORY_C
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80 static u32 m68k_reg_read16(u32 a)
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87 // here IFL2 is always 0, just like in Gens
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88 d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)
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89 | Pico_mcd->m.busreq;
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93 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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94 elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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97 d = Pico_mcd->s68k_regs[4]<<8;
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100 d = *(u16 *)(Pico_mcd->bios + 0x72);
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103 d = Read_CDC_Host(0);
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106 elprintf(EL_UIO, "m68k FIXME: reserved read");
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108 case 0xC: // 384 cycle stopwatch timer
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110 d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
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111 d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
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113 elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
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118 // comm flag/cmd/status (0xE-0x2F)
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119 m68k_comm_check(a);
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120 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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124 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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131 #ifndef _ASM_CD_MEMORY_C
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134 void m68k_reg_write8(u32 a, u32 d)
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142 if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
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143 elprintf(EL_INTS, "m68k: s68k irq 2");
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144 pcd_sync_s68k(SekCyclesDone(), 0);
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145 SekInterruptS68k(2);
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150 dold = Pico_mcd->m.busreq;
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152 d |= 2; // verified: can't release bus on reset
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156 pcd_sync_s68k(SekCyclesDone(), 0);
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158 if ((dold ^ d) & 1)
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159 elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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161 Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;
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162 else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {
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163 Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;
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164 elprintf(EL_CDREGS, "m68k: resetting s68k");
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167 if ((dold ^ d) & 2) {
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168 elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
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169 remap_prg_window(d, Pico_mcd->s68k_regs[3]);
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171 Pico_mcd->m.busreq = d;
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174 elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
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175 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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178 dold = Pico_mcd->s68k_regs[3];
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179 elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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180 if ((d ^ dold) & 0xc0) {
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181 elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
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182 (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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183 remap_prg_window(Pico_mcd->m.busreq, d);
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186 // 2M mode state is tracked regardless of current mode
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188 Pico_mcd->m.dmna_ret_2m |= 2;
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189 Pico_mcd->m.dmna_ret_2m &= ~1;
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191 if (dold & 4) { // 1M mode
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192 d ^= 2; // 0 sets DMNA, 1 does nothing
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193 d = (d & 0xc2) | (dold & 0x1f);
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196 d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
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200 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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203 Pico_mcd->bios[0x72] = d;
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204 elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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205 ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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213 if ((a&0xf0) == 0x10)
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216 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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220 if (d == Pico_mcd->s68k_regs[a])
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223 pcd_sync_s68k(SekCyclesDone(), 0);
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224 Pico_mcd->s68k_regs[a] = d;
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225 if (Pico_mcd->m.s68k_poll_a == (a & ~1)
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226 && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT)
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229 Pico_mcd->m.s68k_poll_a = 0;
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230 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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234 u32 s68k_poll_detect(u32 a, u32 d)
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236 #ifdef USE_POLL_DETECT
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237 u32 cycles, cnt = 0;
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238 if (SekIsStoppedS68k())
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241 cycles = SekCyclesDoneS68k();
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242 if (!SekNotPolling && a == Pico_mcd->m.s68k_poll_a) {
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243 u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
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244 if (clkdiff <= POLL_CYCLES) {
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245 cnt = Pico_mcd->m.s68k_poll_cnt + 1;
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246 //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
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247 if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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249 elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
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254 Pico_mcd->m.s68k_poll_a = a;
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255 Pico_mcd->m.s68k_poll_clk = cycles;
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256 Pico_mcd->m.s68k_poll_cnt = cnt;
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257 SekNotPollingS68k = 0;
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262 #define READ_FONT_DATA(basemask) \
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264 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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265 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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266 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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267 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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268 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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269 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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273 #ifndef _ASM_CD_MEMORY_C
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276 u32 s68k_reg_read16(u32 a)
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282 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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284 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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285 elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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286 return s68k_poll_detect(a, d);
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288 return CDC_Read_Reg();
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290 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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292 d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
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295 elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
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298 elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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299 return Pico_mcd->s68k_regs[31];
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300 case 0x34: // fader
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301 return 0; // no busy bit
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302 case 0x50: // font data (check: Lunar 2, Silpheed)
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303 READ_FONT_DATA(0x00100000);
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306 READ_FONT_DATA(0x00010000);
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309 READ_FONT_DATA(0x10000000);
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312 READ_FONT_DATA(0x01000000);
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316 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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318 if (a >= 0x0e && a < 0x30)
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319 return s68k_poll_detect(a, d);
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324 #ifndef _ASM_CD_MEMORY_C
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327 void s68k_reg_write8(u32 a, u32 d)
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329 // Warning: d might have upper bits set
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336 return; // only m68k can change WP
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338 int dold = Pico_mcd->s68k_regs[3];
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339 elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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345 Pico_mcd->m.dmna_ret_2m |= 1;
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346 Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears
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352 elprintf(EL_CDREG3, "wram mode 2M->1M");
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353 wram_2M_to_1M(Pico_mcd->word_ram2M);
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356 if ((d ^ dold) & 0x1d)
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359 if ((d ^ dold) & 0x05)
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360 d &= ~2; // clear DMNA - swap complete
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365 elprintf(EL_CDREG3, "wram mode 1M->2M");
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366 wram_1M_to_2M(Pico_mcd->word_ram2M);
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369 d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;
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374 elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
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375 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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378 //dprintf("s68k CDC reg addr: %x", d&0xf);
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384 elprintf(EL_CDREGS, "s68k set CDC dma addr");
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387 case 0xd: // 384 cycle stopwatch timer
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388 elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
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389 // does this also reset internal 384 cycle counter?
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390 Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
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396 case 0x31: // 384 cycle int3 timer
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398 elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
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399 Pico_mcd->s68k_regs[a] = (u8) d;
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400 if (d) // d or d+1??
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401 pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
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403 pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
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405 case 0x33: // IRQ mask
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406 elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
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408 if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
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409 if (Pico_mcd->s68k_regs[0x37] & 4)
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410 CDD_Export_Status();
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413 case 0x34: // fader
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414 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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417 return; // d/m bit is unsetable
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419 u32 d_old = Pico_mcd->s68k_regs[0x37];
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420 Pico_mcd->s68k_regs[0x37] = d&7;
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421 if ((d&4) && !(d_old&4)) {
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422 CDD_Export_Status();
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427 Pico_mcd->s68k_regs[a] = (u8) d;
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428 CDD_Import_Command();
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434 if ((a&0x1f0) == 0x20)
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437 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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439 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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443 Pico_mcd->s68k_regs[a] = (u8) d;
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447 Pico_mcd->s68k_regs[a] = (u8) d;
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448 if (Pico_mcd->m.m68k_poll_cnt)
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450 Pico_mcd->m.m68k_poll_cnt = 0;
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453 void s68k_reg_write16(u32 a, u32 d)
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455 u8 *r = Pico_mcd->s68k_regs;
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457 if ((a & 0x1f0) == 0x20)
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462 // special case, 2 byte writes would be handled differently
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466 case 0x58: // stamp data size
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469 case 0x5a: // stamp map base address
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471 r[0x5b] = d & 0xe0;
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473 case 0x5c: // V cell size
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474 r[0x5d] = d & 0x1f;
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476 case 0x5e: // image buffer start address
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478 r[0x5f] = d & 0xf8;
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480 case 0x60: // image buffer offset
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481 r[0x61] = d & 0x3f;
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483 case 0x62: // h dot size
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484 r[0x62] = (d >> 8) & 1;
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487 case 0x64: // v dot size
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490 case 0x66: // trace vector base address
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500 s68k_reg_write8(a, d >> 8);
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501 s68k_reg_write8(a + 1, d & 0xff);
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507 if (Pico_mcd->m.m68k_poll_cnt)
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509 Pico_mcd->m.m68k_poll_cnt = 0;
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512 // -----------------------------------------------------------------
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514 // -----------------------------------------------------------------
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516 #ifndef _ASM_CD_MEMORY_C
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517 #include "cell_map.c"
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519 // WORD RAM, cell aranged area (220000 - 23ffff)
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520 static u32 PicoReadM68k8_cell0(u32 a)
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522 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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523 return Pico_mcd->word_ram1M[0][a ^ 1];
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526 static u32 PicoReadM68k8_cell1(u32 a)
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528 a = (a&3) | (cell_map(a >> 2) << 2);
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529 return Pico_mcd->word_ram1M[1][a ^ 1];
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532 static u32 PicoReadM68k16_cell0(u32 a)
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534 a = (a&2) | (cell_map(a >> 2) << 2);
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535 return *(u16 *)(Pico_mcd->word_ram1M[0] + a);
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538 static u32 PicoReadM68k16_cell1(u32 a)
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540 a = (a&2) | (cell_map(a >> 2) << 2);
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541 return *(u16 *)(Pico_mcd->word_ram1M[1] + a);
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544 static void PicoWriteM68k8_cell0(u32 a, u32 d)
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546 a = (a&3) | (cell_map(a >> 2) << 2);
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547 Pico_mcd->word_ram1M[0][a ^ 1] = d;
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550 static void PicoWriteM68k8_cell1(u32 a, u32 d)
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552 a = (a&3) | (cell_map(a >> 2) << 2);
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553 Pico_mcd->word_ram1M[1][a ^ 1] = d;
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556 static void PicoWriteM68k16_cell0(u32 a, u32 d)
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558 a = (a&3) | (cell_map(a >> 2) << 2);
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559 *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;
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562 static void PicoWriteM68k16_cell1(u32 a, u32 d)
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564 a = (a&3) | (cell_map(a >> 2) << 2);
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565 *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;
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569 // RAM cart (40000 - 7fffff, optional)
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570 static u32 PicoReadM68k8_ramc(u32 a)
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573 if (a == 0x400001) {
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574 if (SRam.data != NULL)
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579 if ((a & 0xfe0000) == 0x600000) {
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580 if (SRam.data != NULL)
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581 d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
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586 return Pico_mcd->m.bcram_reg;
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588 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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592 static u32 PicoReadM68k16_ramc(u32 a)
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594 elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
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595 return PicoReadM68k8_ramc(a + 1);
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598 static void PicoWriteM68k8_ramc(u32 a, u32 d)
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600 if ((a & 0xfe0000) == 0x600000) {
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601 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
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602 SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
\r
608 if (a == 0x7fffff) {
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609 Pico_mcd->m.bcram_reg = d;
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613 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",
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614 a, d & 0xff, SekPc);
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617 static void PicoWriteM68k16_ramc(u32 a, u32 d)
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619 elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x",
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621 PicoWriteM68k8_ramc(a + 1, d);
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624 // IO/control/cd registers (a10000 - ...)
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625 #ifndef _ASM_CD_MEMORY_C
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626 u32 PicoRead8_mcd_io(u32 a)
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629 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
\r
630 d = m68k_reg_read16(a); // TODO: m68k_reg_read8
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634 elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x",
\r
635 a & 0x3f, d, SekPc);
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639 // fallback to default MD handler
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640 return PicoRead8_io(a);
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643 u32 PicoRead16_mcd_io(u32 a)
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646 if ((a & 0xff00) == 0x2000) {
\r
647 d = m68k_reg_read16(a);
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648 elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x",
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649 a & 0x3f, d, SekPc);
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653 return PicoRead16_io(a);
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656 void PicoWrite8_mcd_io(u32 a, u32 d)
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658 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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659 elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",
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660 a & 0x3f, d, SekPc);
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661 m68k_reg_write8(a, d);
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665 PicoWrite16_io(a, d);
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668 void PicoWrite16_mcd_io(u32 a, u32 d)
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670 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
\r
671 elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",
\r
672 a & 0x3f, d, SekPc);
\r
674 m68k_reg_write8(a, d >> 8);
\r
675 if ((a & 0x3e) != 0x0e) // special case
\r
676 m68k_reg_write8(a + 1, d & 0xff);
\r
680 PicoWrite16_io(a, d);
\r
684 // -----------------------------------------------------------------
\r
686 // -----------------------------------------------------------------
\r
688 static u32 s68k_unmapped_read8(u32 a)
\r
690 elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
\r
694 static u32 s68k_unmapped_read16(u32 a)
\r
696 elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
\r
700 static void s68k_unmapped_write8(u32 a, u32 d)
\r
702 elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x",
\r
703 a, d & 0xff, SekPc);
\r
706 static void s68k_unmapped_write16(u32 a, u32 d)
\r
708 elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x",
\r
709 a, d & 0xffff, SekPc);
\r
712 // PRG RAM protected range (000000 - 01fdff)?
\r
713 // XXX verify: ff00 or 1fe00 max?
\r
714 static void PicoWriteS68k8_prgwp(u32 a, u32 d)
\r
716 if (a >= (Pico_mcd->s68k_regs[2] << 9))
\r
717 Pico_mcd->prg_ram[a ^ 1] = d;
\r
720 static void PicoWriteS68k16_prgwp(u32 a, u32 d)
\r
722 if (a >= (Pico_mcd->s68k_regs[2] << 9))
\r
723 *(u16 *)(Pico_mcd->prg_ram + a) = d;
\r
726 #ifndef _ASM_CD_MEMORY_C
\r
728 // decode (080000 - 0bffff, in 1M mode)
\r
729 static u32 PicoReadS68k8_dec0(u32 a)
\r
731 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
\r
739 static u32 PicoReadS68k8_dec1(u32 a)
\r
741 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
\r
749 static u32 PicoReadS68k16_dec0(u32 a)
\r
751 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
\r
757 static u32 PicoReadS68k16_dec1(u32 a)
\r
759 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
\r
765 /* check: jaguar xj 220 (draws entire world using decode) */
\r
766 #define mk_decode_w8(bank) \
\r
767 static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \
\r
769 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
772 *pd = (*pd & 0x0f) | (d << 4); \
\r
774 *pd = (*pd & 0xf0) | (d & 0x0f); \
\r
777 static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \
\r
779 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
780 u8 mask = (a & 1) ? 0x0f : 0xf0; \
\r
782 if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \
\r
783 PicoWriteS68k8_dec_m0b##bank(a, d); \
\r
786 static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \
\r
788 if (d & 0x0f) /* overwrite */ \
\r
789 PicoWriteS68k8_dec_m0b##bank(a, d); \
\r
795 #define mk_decode_w16(bank) \
\r
796 static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \
\r
798 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
801 *pd = d | (d >> 4); \
\r
804 static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \
\r
806 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
808 d &= 0x0f0f; /* underwrite */ \
\r
809 if (!(*pd & 0xf0)) *pd |= d >> 4; \
\r
810 if (!(*pd & 0x0f)) *pd |= d; \
\r
813 static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \
\r
815 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
817 d &= 0x0f0f; /* overwrite */ \
\r
820 if (!(d & 0xf0)) d |= *pd & 0xf0; \
\r
821 if (!(d & 0x0f)) d |= *pd & 0x0f; \
\r
830 // backup RAM (fe0000 - feffff)
\r
831 static u32 PicoReadS68k8_bram(u32 a)
\r
833 return Pico_mcd->bram[(a>>1)&0x1fff];
\r
836 static u32 PicoReadS68k16_bram(u32 a)
\r
839 elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
840 a = (a >> 1) & 0x1fff;
\r
841 d = Pico_mcd->bram[a++];
\r
842 d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
\r
846 static void PicoWriteS68k8_bram(u32 a, u32 d)
\r
848 Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
\r
852 static void PicoWriteS68k16_bram(u32 a, u32 d)
\r
854 elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
855 a = (a >> 1) & 0x1fff;
\r
856 Pico_mcd->bram[a++] = d;
\r
857 Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
\r
861 #ifndef _ASM_CD_MEMORY_C
\r
863 // PCM and registers (ff0000 - ffffff)
\r
864 static u32 PicoReadS68k8_pr(u32 a)
\r
869 if ((a & 0xfe00) == 0x8000) {
\r
871 if (a >= 0x0e && a < 0x30) {
\r
872 d = Pico_mcd->s68k_regs[a];
\r
873 s68k_poll_detect(a & ~1, d);
\r
876 d = s68k_reg_read16(a & ~1);
\r
882 elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",
\r
888 // XXX: verify: probably odd addrs only?
\r
889 if ((a & 0x8000) == 0x0000) {
\r
892 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
\r
893 else if (a >= 0x20)
\r
894 d = pcd_pcm_read(a >> 1);
\r
899 return s68k_unmapped_read8(a);
\r
902 static u32 PicoReadS68k16_pr(u32 a)
\r
907 if ((a & 0xfe00) == 0x8000) {
\r
909 d = s68k_reg_read16(a);
\r
911 elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",
\r
917 if ((a & 0x8000) == 0x0000) {
\r
920 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
\r
921 else if (a >= 0x20)
\r
922 d = pcd_pcm_read(a >> 1);
\r
927 return s68k_unmapped_read16(a);
\r
930 static void PicoWriteS68k8_pr(u32 a, u32 d)
\r
933 if ((a & 0xfe00) == 0x8000) {
\r
935 elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);
\r
936 if (0x59 <= a && a < 0x68) // word regs
\r
937 s68k_reg_write16(a & ~1, (d << 8) | d);
\r
939 s68k_reg_write8(a, d);
\r
944 if ((a & 0x8000) == 0x0000) {
\r
947 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
949 pcd_pcm_write(a>>1, d);
\r
953 s68k_unmapped_write8(a, d);
\r
956 static void PicoWriteS68k16_pr(u32 a, u32 d)
\r
959 if ((a & 0xfe00) == 0x8000) {
\r
961 elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);
\r
962 s68k_reg_write16(a, d);
\r
967 if ((a & 0x8000) == 0x0000) {
\r
970 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
972 pcd_pcm_write(a>>1, d & 0xff);
\r
976 s68k_unmapped_write16(a, d);
\r
981 static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };
\r
982 static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };
\r
983 static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };
\r
984 static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };
\r
986 static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };
\r
987 static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };
\r
989 static const void *s68k_dec_write8[2][4] = {
\r
990 { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },
\r
991 { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },
\r
994 static const void *s68k_dec_write16[2][4] = {
\r
995 { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },
\r
996 { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },
\r
999 // -----------------------------------------------------------------
\r
1001 static void remap_prg_window(u32 r1, u32 r3)
\r
1005 void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];
\r
1006 cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
\r
1009 m68k_map_unmap(0x020000, 0x03ffff);
\r
1013 static void remap_word_ram(u32 r3)
\r
1019 // 2M mode. XXX: allowing access in all cases for simplicity
\r
1020 bank = Pico_mcd->word_ram2M;
\r
1021 cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
\r
1022 cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
\r
1023 // TODO: handle 0x0c0000
\r
1027 int m = (r3 & 0x18) >> 3;
\r
1028 bank = Pico_mcd->word_ram1M[b0];
\r
1029 cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
\r
1030 bank = Pico_mcd->word_ram1M[b0 ^ 1];
\r
1031 cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
\r
1032 // "cell arrange" on m68k
\r
1033 cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
\r
1034 cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
\r
1035 cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
\r
1036 cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
\r
1037 // "decode format" on s68k
\r
1038 cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
\r
1039 cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
\r
1040 cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
\r
1041 cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
\r
1045 // update fetchmap..
\r
1049 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1050 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;
\r
1054 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1055 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1056 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1057 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1062 void pcd_state_loaded_mem(void)
\r
1064 u32 r3 = Pico_mcd->s68k_regs[3];
\r
1066 /* after load events */
\r
1067 if (r3 & 4) // 1M mode?
\r
1068 wram_2M_to_1M(Pico_mcd->word_ram2M);
\r
1069 remap_word_ram(r3);
\r
1070 remap_prg_window(Pico_mcd->m.busreq, r3);
\r
1071 Pico_mcd->m.dmna_ret_2m &= 3;
\r
1073 // restore hint vector
\r
1074 *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
\r
1078 static void m68k_mem_setup_cd(void);
\r
1081 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1083 // setup default main68k map
\r
1086 // main68k map (BIOS mapped by PicoMemSetup()):
\r
1088 if (PicoOpt & POPT_EN_MCD_RAMCART) {
\r
1089 cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
\r
1090 cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
\r
1091 cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
\r
1092 cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
\r
1096 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);
\r
1097 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);
\r
1098 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);
\r
1099 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);
\r
1102 cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
\r
1103 cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
\r
1104 cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
\r
1105 cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
\r
1108 cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1109 cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1110 cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1111 cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1112 cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);
\r
1113 cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);
\r
1116 cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
\r
1117 cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
\r
1118 cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
\r
1119 cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
\r
1122 cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
\r
1123 cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
\r
1124 cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
\r
1125 cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
\r
1128 remap_word_ram(1);
\r
1132 PicoCpuCS68k.read8 = (void *)s68k_read8_map;
\r
1133 PicoCpuCS68k.read16 = (void *)s68k_read16_map;
\r
1134 PicoCpuCS68k.read32 = (void *)s68k_read16_map;
\r
1135 PicoCpuCS68k.write8 = (void *)s68k_write8_map;
\r
1136 PicoCpuCS68k.write16 = (void *)s68k_write16_map;
\r
1137 PicoCpuCS68k.write32 = (void *)s68k_write16_map;
\r
1138 PicoCpuCS68k.checkpc = NULL; /* unused */
\r
1139 PicoCpuCS68k.fetch8 = NULL;
\r
1140 PicoCpuCS68k.fetch16 = NULL;
\r
1141 PicoCpuCS68k.fetch32 = NULL;
\r
1145 PicoCpuFS68k.read_byte = s68k_read8;
\r
1146 PicoCpuFS68k.read_word = s68k_read16;
\r
1147 PicoCpuFS68k.read_long = s68k_read32;
\r
1148 PicoCpuFS68k.write_byte = s68k_write8;
\r
1149 PicoCpuFS68k.write_word = s68k_write16;
\r
1150 PicoCpuFS68k.write_long = s68k_write32;
\r
1152 // setup FAME fetchmap
\r
1156 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1157 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1158 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1159 // now real ROM (BIOS)
\r
1160 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1161 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
\r
1163 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1164 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1166 // PRG RAM is default
\r
1167 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1168 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1170 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1171 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;
\r
1172 // WORD RAM 2M area
\r
1173 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1174 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;
\r
1175 // remap_word_ram() will setup word ram for both
\r
1179 m68k_mem_setup_cd();
\r
1185 u32 m68k_read8(u32 a);
\r
1186 u32 m68k_read16(u32 a);
\r
1187 u32 m68k_read32(u32 a);
\r
1188 void m68k_write8(u32 a, u8 d);
\r
1189 void m68k_write16(u32 a, u16 d);
\r
1190 void m68k_write32(u32 a, u32 d);
\r
1192 static unsigned int PicoReadCD8w (unsigned int a) {
\r
1193 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
\r
1195 static unsigned int PicoReadCD16w(unsigned int a) {
\r
1196 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
\r
1198 static unsigned int PicoReadCD32w(unsigned int a) {
\r
1199 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
\r
1201 static void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1202 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
\r
1204 static void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1205 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
\r
1207 static void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1208 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
\r
1211 extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
\r
1212 extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
\r
1213 extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
\r
1214 extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
\r
1215 extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
\r
1216 extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
\r
1218 static void m68k_mem_setup_cd(void)
\r
1220 pm68k_read_memory_8 = PicoReadCD8w;
\r
1221 pm68k_read_memory_16 = PicoReadCD16w;
\r
1222 pm68k_read_memory_32 = PicoReadCD32w;
\r
1223 pm68k_write_memory_8 = PicoWriteCD8w;
\r
1224 pm68k_write_memory_16 = PicoWriteCD16w;
\r
1225 pm68k_write_memory_32 = PicoWriteCD32w;
\r
1227 #endif // EMU_M68K
\r
1229 // vim:shiftwidth=2:ts=2:expandtab
\r