no measurable improvement in most cases anyway
.global DrZ80Ver\r
\r
.equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
.global DrZ80Ver\r
\r
.equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
- .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
+ .equiv FAST_Z80SP, 0 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
.equiv UPDATE_CONTEXT, 0\r
.equiv DRZ80_XMAP, 1\r
.equiv DRZ80_XMAP_MORE_INLINE, 1\r
.equiv UPDATE_CONTEXT, 0\r
.equiv DRZ80_XMAP, 1\r
.equiv DRZ80_XMAP_MORE_INLINE, 1\r
mov z80pc,r0\r
ldmfd sp!,{r3,r12,pc}\r
\r
mov z80pc,r0\r
ldmfd sp!,{r3,r12,pc}\r
\r
z80_xmap_rebase_sp:\r
ldr r1,[cpucontext,#z80_read8]\r
sub r2,r0,#1\r
z80_xmap_rebase_sp:\r
ldr r1,[cpucontext,#z80_read8]\r
sub r2,r0,#1\r
ldr pc,[cpucontext,#z80_rebaseSP]\r
mov z80sp,r0\r
ldmfd sp!,{r3,r12,pc}\r
ldr pc,[cpucontext,#z80_rebaseSP]\r
mov z80sp,r0\r
ldmfd sp!,{r3,r12,pc}\r
\r
.endif @ DRZ80_XMAP\r
\r
\r
.endif @ DRZ80_XMAP\r
\r
uptr z80_write_map[0x10000 >> Z80_MEM_SHIFT];
#ifdef _USE_DRZ80
uptr z80_write_map[0x10000 >> Z80_MEM_SHIFT];
#ifdef _USE_DRZ80
+// this causes trouble in some cases, like doukutsu putting sp in bank area
+// no perf difference for most, upto 1-2% for some others
+//#define FAST_Z80SP
-static u32 drz80_sp_base;
static void drz80_load_pcsp(u32 pc, u32 sp)
{
static void drz80_load_pcsp(u32 pc, u32 sp)
{
drZ80.Z80PC_BASE <<= 1;
drZ80.Z80PC = drZ80.Z80PC_BASE + pc;
}
drZ80.Z80PC_BASE <<= 1;
drZ80.Z80PC = drZ80.Z80PC_BASE + pc;
}
+ drZ80.Z80SP = sp;
+#ifdef FAST_Z80SP
drZ80.Z80SP_BASE = z80_read_map[sp >> Z80_MEM_SHIFT];
if (drZ80.Z80SP_BASE & (1<<31)) {
elprintf(EL_STATUS|EL_ANOMALY, "load_pcsp: bad SP: %04x", sp);
drZ80.Z80SP_BASE = z80_read_map[sp >> Z80_MEM_SHIFT];
if (drZ80.Z80SP_BASE & (1<<31)) {
elprintf(EL_STATUS|EL_ANOMALY, "load_pcsp: bad SP: %04x", sp);
drZ80.Z80SP_BASE <<= 1;
drZ80.Z80SP = drZ80.Z80SP_BASE + sp;
}
drZ80.Z80SP_BASE <<= 1;
drZ80.Z80SP = drZ80.Z80SP_BASE + sp;
}
}
// called only if internal xmap rebase fails
}
// called only if internal xmap rebase fails
return drZ80.Z80PC_BASE;
}
return drZ80.Z80PC_BASE;
}
+#ifdef FAST_Z80SP
+static u32 drz80_sp_base;
+
static unsigned int dz80_rebase_sp(unsigned short sp)
{
elprintf(EL_STATUS|EL_ANOMALY, "dz80_rebase_sp: fail on %04x", sp);
drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1;
return drZ80.Z80SP_BASE + (1 << Z80_MEM_SHIFT) - 0x100;
}
static unsigned int dz80_rebase_sp(unsigned short sp)
{
elprintf(EL_STATUS|EL_ANOMALY, "dz80_rebase_sp: fail on %04x", sp);
drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1;
return drZ80.Z80SP_BASE + (1 << Z80_MEM_SHIFT) - 0x100;
}
+#else
+#define dz80_rebase_sp NULL
drZ80.Z80IX = 0xFFFF << 16;
drZ80.Z80IY = 0xFFFF << 16;
*/
drZ80.Z80IX = 0xFFFF << 16;
drZ80.Z80IY = 0xFFFF << 16;
*/
// drZ80 is locked in single bank
drz80_sp_base = (PicoAHW & PAHW_SMS) ? 0xc000 : 0x0000;
drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1;
// drZ80 is locked in single bank
drz80_sp_base = (PicoAHW & PAHW_SMS) ? 0xc000 : 0x0000;
drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1;
if (PicoAHW & PAHW_SMS)
drZ80.Z80SP = drZ80.Z80SP_BASE + 0xdff0; // simulate BIOS
// XXX: since we use direct SP pointer, it might make sense to force it to RAM,
if (PicoAHW & PAHW_SMS)
drZ80.Z80SP = drZ80.Z80SP_BASE + 0xdff0; // simulate BIOS
// XXX: since we use direct SP pointer, it might make sense to force it to RAM,
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", (unsigned int)(CZ80.PC - CZ80.BasePC), CZ80.SP.W);
#endif
}
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", (unsigned int)(CZ80.PC - CZ80.BasePC), CZ80.SP.W);
#endif
}
+
+// vim:ts=2:sw=2:expandtab