//int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
d&=1; d^=1;\r
if(!d) {\r
- // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
- // if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20); // FIXME: movies\r
- z80stopCycle = SekCyclesDone();\r
- //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r
+ // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
+ if (Pico.m.z80Run) {\r
+ int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
+ z80stopCycle = SekCyclesDone();\r
+ lineCycles=(lineCycles>>1)-(lineCycles>>5);\r
+ z80_run(lineCycles);\r
+ }\r
} else {\r
z80startCycle = SekCyclesDone();\r
//if(Pico.m.scanline != -1)\r
- //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r
}\r
dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);\r
Pico.m.z80Run=(u8)d; return;\r
\r
\r
// -----------------------------------------------------------------\r
-int PicoMemInit()\r
+void PicoMemSetup()\r
{\r
#ifdef EMU_C68K\r
// Setup memory callbacks:\r
PicoCpu.write16=PicoWrite16;\r
PicoCpu.write32=PicoWrite32;\r
#endif\r
- return 0;\r
}\r
\r
#ifdef EMU_A68K\r
#include "sound/sound.h"\r
#include "sound/ym2612.h"\r
\r
-int PicoVer=0x0080;\r
+int PicoVer=0x0110;\r
struct Pico Pico;\r
int PicoOpt=0; // disable everything by default\r
int PicoSkipFrame=0; // skip rendering frame?\r
SekInit();\r
z80_init(); // init even if we aren't going to use it\r
\r
- // Setup memory callbacks:\r
- PicoMemInit();\r
-\r
PicoInitMCD();\r
\r
// notaz: sram\r
\r
if (Pico.romsize<=0) return 1;\r
\r
+ // setup correct memory map\r
+ if (PicoMCD & 1)\r
+ PicoMemSetupCD();\r
+ else PicoMemSetup();\r
PicoMemReset();\r
SekReset();\r
SekCycleCntT=0;\r
{\r
int cyc_do;\r
SekCycleAim+=cyc;\r
-#if 0\r
- if(Pico.m.dma_bytes) {\r
- int burn=0;\r
- if((Pico.video.status&8)||!(Pico.video.reg[1]&0x40)) { // vblank?\r
- if(Pico.m.dma_bytes < 205) {\r
- burn = Pico.m.dma_bytes*(((488<<8)/205))>>8;\r
- Pico.m.dma_bytes = 0;\r
- } else {\r
- burn += 488;\r
- Pico.m.dma_bytes -= 205;\r
- }\r
- } else {\r
- if(Pico.m.dma_bytes < 18) {\r
- burn = Pico.m.dma_bytes*(((488<<8)/18))>>8;\r
- Pico.m.dma_bytes = 0;\r
- } else {\r
- burn += 488;\r
- Pico.m.dma_bytes -= 18;\r
- }\r
- }\r
- SekCycleCnt+=burn;\r
- dprintf("~DmaSlow %i burn=%i do=%i [%i|%i]", Pico.m.dma_bytes, burn, SekCycleAim-SekCycleCnt,\r
- Pico.m.scanline, SekCyclesDone());\r
- }\r
-#endif\r
//dprintf("aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
if((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
//dprintf("cyc_do: %i", cyc_do);\r
// ----------------------- 68000 CPU -----------------------\r
#ifdef EMU_C68K\r
#include "../cpu/Cyclone/Cyclone.h"\r
-extern struct Cyclone PicoCpu;\r
+extern struct Cyclone PicoCpu, PicoCpuS68k;\r
#define SekCyclesLeft PicoCpu.cycles // cycles left for this run\r
#define SekSetCyclesLeft(c) PicoCpu.cycles=c\r
#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
+#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
#endif\r
\r
#ifdef EMU_A68K\r
// Memory.c\r
int PicoInitPc(unsigned int pc);\r
unsigned int CPU_CALL PicoRead32(unsigned int a);\r
-int PicoMemInit();\r
+void PicoMemSetup();\r
void PicoMemReset();\r
-void PicoDasm(int start,int len);\r
+//void PicoDasm(int start,int len);\r
unsigned char z80_read(unsigned short a);\r
unsigned short z80_read16(unsigned short a);\r
void z80_write(unsigned char data, unsigned short a);\r
void z80_write16(unsigned short data, unsigned short a);\r
\r
// cd/Memory.c\r
+void PicoMemSetupCD();\r
unsigned char PicoReadCD8 (unsigned int a);\r
unsigned short PicoReadCD16(unsigned int a);\r
unsigned int PicoReadCD32(unsigned int a);\r
\r
\r
\r
-// interrupt acknowledgment\r
#ifdef EMU_C68K\r
+// interrupt acknowledgment\r
static void SekIntAck(int level)\r
{\r
// try to emulate VDP's reaction to 68000 int ack\r
PicoInitPc(M68000_regs.pc);\r
#endif\r
#ifdef EMU_M68K\r
- {\r
- void *oldcontext = m68ki_cpu_p;\r
- m68k_set_context(&PicoM68kCPU);\r
- m68k_pulse_reset();\r
- m68k_set_context(oldcontext);\r
- }\r
+ m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
+ m68k_pulse_reset();\r
#endif\r
\r
return 0;\r
// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006 notaz, All rights reserved.\r
+// (c) Copyright 2007 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
goto end;\r
}\r
\r
+#if 0\r
+ if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
+ {\r
+ int i;\r
+ FILE *ff;\r
+ unsigned short *ram = (unsigned short *) Pico.ram;\r
+ // unswap and dump RAM\r
+ for (i = 0; i < 0x10000/2; i++)\r
+ ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
+ ff = fopen("ram.bin", "wb");\r
+ fwrite(ram, 1, 0x10000, ff);\r
+ fclose(ff);\r
+ exit(0);\r
+ }\r
+#endif\r
+\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
if ((a&0xffffc0)==0xa12000)\r
rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
\r
-#if 0\r
- if ((a&0x3f) == 0x1c && SekPc == 0xffff05ba)\r
- {\r
- int i;\r
- FILE *ff;\r
- unsigned short *ram = (unsigned short *) Pico.ram;\r
- // unswap and dump RAM\r
- for (i = 0; i < 0x10000/2; i++)\r
- ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
- ff = fopen("ram.bin", "wb");\r
- fwrite(ram, 1, 0x10000, ff);\r
- fclose(ff);\r
- exit(0);\r
- }\r
-#endif\r
-\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
}\r
\r
// -----------------------------------------------------------------\r
\r
+\r
+#if defined(EMU_C68K)\r
+static __inline int PicoMemBaseM68k(u32 pc)\r
+{\r
+ int membase=0;\r
+\r
+ if (pc < 0x20000)\r
+ {\r
+ membase=(int)Pico_mcd->bios; // Program Counter in BIOS\r
+ }\r
+ else if ((pc&0xe00000)==0xe00000)\r
+ {\r
+ membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
+ }\r
+ else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))\r
+ {\r
+ membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram\r
+ }\r
+ else\r
+ {\r
+ // Error - Program Counter is invalid\r
+ dprintf("m68k: unhandled jump to %06x", pc);\r
+ membase=(int)Pico.rom;\r
+ }\r
+\r
+ return membase;\r
+}\r
+\r
+\r
+static u32 PicoCheckPcM68k(u32 pc)\r
+{\r
+ pc-=PicoCpu.membase; // Get real pc\r
+ pc&=0xfffffe;\r
+\r
+ PicoCpu.membase=PicoMemBaseM68k(pc);\r
+\r
+ return PicoCpu.membase+pc;\r
+}\r
+\r
+\r
+static __inline int PicoMemBaseS68k(u32 pc)\r
+{\r
+ int membase;\r
+\r
+ membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM\r
+ if (pc >= 0x80000)\r
+ {\r
+ // Error - Program Counter is invalid\r
+ dprintf("s68k: unhandled jump to %06x", pc);\r
+ }\r
+\r
+ return membase;\r
+}\r
+\r
+\r
+static u32 PicoCheckPcS68k(u32 pc)\r
+{\r
+ pc-=PicoCpuS68k.membase; // Get real pc\r
+ pc&=0xfffffe;\r
+\r
+ PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
+\r
+ return PicoCpuS68k.membase+pc;\r
+}\r
+#endif\r
+\r
+\r
+void PicoMemSetupCD()\r
+{\r
+ dprintf("PicoMemSetupCD()");\r
+#ifdef EMU_C68K\r
+ // Setup m68k memory callbacks:\r
+ PicoCpu.checkpc=PicoCheckPcM68k;\r
+ PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
+ PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
+ PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
+ PicoCpu.write8 =PicoWriteM68k8;\r
+ PicoCpu.write16=PicoWriteM68k16;\r
+ PicoCpu.write32=PicoWriteM68k32;\r
+ // s68k\r
+ PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
+ PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
+ PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
+ PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
+ PicoCpuS68k.write8 =PicoWriteS68k8;\r
+ PicoCpuS68k.write16=PicoWriteS68k16;\r
+ PicoCpuS68k.write32=PicoWriteS68k32;\r
+#endif\r
+}\r
+\r
+\r
#ifdef EMU_M68K\r
unsigned char PicoReadCD8w (unsigned int a) {\r
return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
- else dprintf("s68k read_pcrel8 @ %06x", a);\r
+ dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
+ if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
+ if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
+ return Pico_mcd->word_ram[(a^1)&0x3fffe];\r
+ dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);\r
}\r
return 0;//(u8) lastread_d;\r
}\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
- else dprintf("s68k read_pcrel16 @ %06x", a);\r
+ dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
+ if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
+ if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
+ return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);\r
}\r
- return 0;//(u16) lastread_d;\r
+ return 0;\r
}\r
unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
- else dprintf("s68k read_pcrel32 @ %06x", a);\r
+ dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
+ if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
+ if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
+ { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
+ dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);\r
}\r
- return 0; //lastread_d;\r
+ return 0;\r
}\r
#endif // EMU_M68K\r
\r
// clear everything except BIOS
memset(Pico_mcd->prg_ram, 0, sizeof(mcd_state) - sizeof(Pico_mcd->bios));
*(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
- PicoMCD |= 2; // s68k reset pending
+ PicoMCD |= 2; // s68k reset pending. TODO: move
Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
counter75hz = 0;
int cyc_do;
SekCycleAim+=cyc;
if((cyc_do=SekCycleAim-SekCycleCnt) < 0) return;
-#if defined(EMU_M68K)
+#if defined(EMU_C68K)
+ PicoCpu.cycles=cyc_do;
+ CycloneRun(&PicoCpu);
+ SekCycleCnt+=cyc_do-PicoCpu.cycles;
+#elif defined(EMU_M68K)
m68k_set_context(&PicoM68kCPU);
SekCycleCnt+=m68k_execute(cyc_do);
#endif
int cyc_do;
SekCycleAimS68k+=cyc;
if((cyc_do=SekCycleAimS68k-SekCycleCntS68k) < 0) return;
-#if defined(EMU_M68K)
+#if defined(EMU_C68K)
+ PicoCpuS68k.cycles=cyc_do;
+ CycloneRun(&PicoCpuS68k);
+ SekCycleCntS68k+=cyc_do-PicoCpuS68k.cycles;
+#elif defined(EMU_M68K)
m68k_set_context(&PicoS68kCPU);
SekCycleCntS68k+=m68k_execute(cyc_do);
#endif
Update_CDC_TRansfer(ddx); // now go and do the actual transfer
}
+// to be called on 224 or line_sample scanlines only
+static __inline void getSamples(int y)
+{
+ if(y == 224) {
+ //dprintf("sta%i: %i [%i]", (emustatus & 2), emustatus, y);
+ if(emustatus & 2)
+ sound_render(PsndLen/2, PsndLen-PsndLen/2);
+ else sound_render(0, PsndLen);
+ if (emustatus&1) emustatus|=2; else emustatus&=~2;
+ if (PicoWriteSound) PicoWriteSound();
+ // clear sound buffer
+ memset(PsndOut, 0, (PicoOpt & 8) ? (PsndLen<<2) : (PsndLen<<1));
+ }
+ else if(emustatus & 3) {
+ emustatus|= 2;
+ emustatus&=~1;
+ sound_render(0, PsndLen/2);
+ }
+}
+
+
// Accurate but slower frame which does hints
static int PicoFrameHintsMCD(void)
if(y == 32 && PsndOut)
emustatus &= ~1;
else if((y == 224 || y == line_sample) && PsndOut)
- ;//getSamples(y);
+ getSamples(y);
// Run scanline:
//dprintf("m68k starting exec @ %06x", SekPc);
int SekCycleCntS68k=0; // cycles done in this frame
int SekCycleAimS68k=0; // cycle aim
+#ifdef EMU_C68K
+// ---------------------- Cyclone 68000 ----------------------
+struct Cyclone PicoCpuS68k;
+#endif
+
#ifdef EMU_M68K
// ---------------------- MUSASHI 68000 ----------------------
m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU
#endif
+static int irqs = 0; // TODO: 2 context
+
#ifdef EMU_M68K
-int SekIntAckS68k(int level)
+static int SekIntAckS68k(int level)
{
- dprintf("s68kACK %i", level);
- CPU_INT_LEVEL = 0;
+ int level_new = 0;
+ irqs &= ~(1 << level);
+ irqs &= Pico_mcd->s68k_regs[0x33];
+ if (irqs) {
+ level_new = 6;
+ while (level_new > 0) { if (irqs & (1 << level_new)) break; level_new--; }
+ }
+
+ dprintf("s68kACK %i -> %i", level, level_new);
+ CPU_INT_LEVEL = level_new << 8;
return M68K_INT_ACK_AUTOVECTOR;
}
#endif
+#ifdef EMU_C68K
+// interrupt acknowledgment
+static void SekIntAck(int level)
+{
+ int level_new = 0;
+ irqs &= ~(1 << level);
+ irqs &= Pico_mcd->s68k_regs[0x33];
+ if (irqs) {
+ level_new = 6;
+ while (level_new > 0) { if (irqs & (1 << level_new)) break; level_new--; }
+ }
+
+ dprintf("s68kACK %i -> %i", level, level_new);
+ PicoCpuS68k.irq = level_new;
+}
+
+static void SekResetAck()
+{
+ dprintf("s68k: Reset encountered @ %06x", SekPcS68k);
+}
+
+static int SekUnrecognizedOpcode()
+{
+ unsigned int pc, op;
+ pc = SekPcS68k;
+ op = PicoCpuS68k.read16(pc);
+ dprintf("Unrecognized Opcode %04x @ %06x", op, pc);
+ //exit(1);
+ return 0;
+}
+#endif
+
+
int SekInitS68k()
{
+#ifdef EMU_C68K
+// CycloneInit();
+ memset(&PicoCpuS68k,0,sizeof(PicoCpuS68k));
+ PicoCpuS68k.IrqCallback=SekIntAck;
+ PicoCpuS68k.ResetCallback=SekResetAck;
+ PicoCpuS68k.UnrecognizedCallback=SekUnrecognizedOpcode;
+#endif
#ifdef EMU_M68K
{
// Musashi is not very context friendly..
{
if (Pico.rom==NULL) return 1;
+#ifdef EMU_C68K
+ PicoCpuS68k.stopped=0;
+ PicoCpuS68k.osp=0;
+ PicoCpuS68k.srh =0x27; // Supervisor mode
+ PicoCpuS68k.flags=4; // Z set
+ PicoCpuS68k.irq=0;
+ PicoCpuS68k.a[7]=PicoCpuS68k.read32(0); // Stack Pointer
+ PicoCpuS68k.membase=0;
+ PicoCpuS68k.pc=PicoCpuS68k.checkpc(PicoCpuS68k.read32(4)); // Program Counter
+#endif
#ifdef EMU_M68K
{
void *oldcontext = m68ki_cpu_p;
int SekInterruptS68k(int irq)
{
+ irqs |= 1 << irq;
+#ifdef EMU_C68K
+ PicoCpuS68k.irq=irq;
+#endif
#ifdef EMU_M68K
void *oldcontext = m68ki_cpu_p;
m68k_set_context(&PicoS68kCPU);
#include "940shared.h"\r
\r
-/* this code assumes that we live @ 0x3000000 bank */\r
-//static volatile unsigned short *gp2x_memregs = (void *) 0x0xbd000000;\r
-//static volatile unsigned long *gp2x_memregl = (void *) 0x0xbd000000;\r
-\r
static _940_data_t *shared_data = (_940_data_t *) 0x100000;\r
static _940_ctl_t *shared_ctl = (_940_ctl_t *) 0x200000;\r
YM2612 *ym2612_940;\r
shared_ctl->vstarts[startvector]++;\r
asm volatile ("mcr p15, 0, r0, c7, c10, 4" ::: "r0");\r
\r
- /* unmask IRQs */\r
\r
for (;; shared_ctl->loopc++)\r
{\r
+ int job_num;\r
/*\r
while (!shared_ctl->busy)\r
{\r
wait_irq();\r
}\r
\r
- switch (shared_ctl->job)\r
+ for (job_num = 0; job_num < MAX_940JOBS; job_num++)\r
{\r
- case JOB940_YM2612INIT:\r
- shared_ctl->writebuff0[0] = shared_ctl->writebuff1[0] = 0xffff;\r
- YM2612Init_(shared_ctl->baseclock, shared_ctl->rate);\r
- break;\r
+ switch (shared_ctl->jobs[job_num])\r
+ {\r
+ case JOB940_YM2612INIT:\r
+ shared_ctl->writebuff0[0] = shared_ctl->writebuff1[0] = 0xffff;\r
+ YM2612Init_(shared_ctl->baseclock, shared_ctl->rate);\r
+ break;\r
\r
- case JOB940_YM2612RESETCHIP:\r
- YM2612ResetChip_();\r
- break;\r
+ case JOB940_YM2612RESETCHIP:\r
+ YM2612ResetChip_();\r
+ break;\r
\r
- case JOB940_PICOSTATELOAD:\r
- YM2612PicoStateLoad_();\r
- break;\r
+ case JOB940_PICOSTATELOAD:\r
+ YM2612PicoStateLoad_();\r
+ break;\r
\r
- case JOB940_YM2612UPDATEONE: {\r
- int i, dw, *wbuff;\r
- if (shared_ctl->writebuffsel == 1) {\r
- wbuff = (int *) shared_ctl->writebuff1;\r
- } else {\r
- wbuff = (int *) shared_ctl->writebuff0;\r
- }\r
+ case JOB940_YM2612UPDATEONE: {\r
+ int i, dw, *wbuff;\r
+ if (shared_ctl->writebuffsel == 1) {\r
+ wbuff = (int *) shared_ctl->writebuff1;\r
+ } else {\r
+ wbuff = (int *) shared_ctl->writebuff0;\r
+ }\r
\r
- /* playback all writes */\r
- for (i = 2048/2; i > 0; i--) {\r
- UINT16 d;\r
- dw = *wbuff++;\r
- d = dw;\r
- if (d == 0xffff) break;\r
- YM2612Write_(d >> 8, d);\r
- d = (dw>>16);\r
- if (d == 0xffff) break;\r
- YM2612Write_(d >> 8, d);\r
- }\r
+ /* playback all writes */\r
+ for (i = 2048/2; i > 0; i--) {\r
+ UINT16 d;\r
+ dw = *wbuff++;\r
+ d = dw;\r
+ if (d == 0xffff) break;\r
+ YM2612Write_(d >> 8, d);\r
+ d = (dw>>16);\r
+ if (d == 0xffff) break;\r
+ YM2612Write_(d >> 8, d);\r
+ }\r
\r
- YM2612UpdateOne_(0, shared_ctl->length, shared_ctl->stereo);\r
-// cache_clean_flush();\r
- cache_clean();\r
-// asm volatile ("mov r0, #0" ::: "r0");\r
-// asm volatile ("mcr p15, 0, r0, c7, c10, 4" ::: "r0"); /* drain write buffer, should be done on nonbuffered write */\r
- break;\r
+ YM2612UpdateOne_(0, shared_ctl->length, shared_ctl->stereo);\r
+ break;\r
+ }\r
}\r
}\r
\r
shared_ctl->busy = 0;\r
+// cache_clean_flush();\r
+ cache_clean();\r
+// asm volatile ("mov r0, #0" ::: "r0");\r
+// asm volatile ("mcr p15, 0, r0, c7, c10, 4" ::: "r0"); /* drain write buffer, should be done on nonbuffered write */\r
}\r
}\r
+\r
}\r
\r
\r
-static void add_job_940(int job)\r
+static void add_job_940(int job0, int job1)\r
{\r
- shared_ctl->job = job;\r
+ shared_ctl->jobs[0] = job0;\r
+ shared_ctl->jobs[1] = job1;\r
shared_ctl->busy = 1;\r
gp2x_memregs[0x3B3E>>1] = 0xffff; // cause an IRQ for 940\r
}\r
\r
addr_A1 = old_A1;\r
\r
- add_job_940(JOB940_PICOSTATELOAD);\r
+ add_job_940(JOB940_PICOSTATELOAD, 0);\r
}\r
\r
\r
void YM2612Init_940(int baseclock, int rate)\r
{\r
printf("YM2612Init_940()\n");\r
- //printf("sizeof(*shared_data): %i (%x)\n", sizeof(*shared_data), sizeof(*shared_data));\r
- //printf("sizeof(*shared_ctl): %i (%x)\n", sizeof(*shared_ctl), sizeof(*shared_ctl));\r
+ printf("Mem usage: shared_data: %i, shared_ctl: %i\n", sizeof(*shared_data), sizeof(*shared_ctl));\r
\r
- Reset940(1);\r
+ Reset940(1, 2);\r
Pause940(1);\r
\r
gp2x_memregs[0x3B46>>1] = 0xffff; // clear pending DUALCPU interrupts for 940\r
\r
if (shared_mem == NULL)\r
{\r
- shared_mem = (unsigned char *) mmap(0, 0x210000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0x3000000);\r
+ shared_mem = (unsigned char *) mmap(0, 0x210000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0x2000000);\r
if(shared_mem == MAP_FAILED)\r
{\r
printf("mmap(shared_data) failed with %i\n", errno);\r
/* now cause 940 to init it's ym2612 stuff */\r
shared_ctl->baseclock = baseclock;\r
shared_ctl->rate = rate;\r
- shared_ctl->job = JOB940_YM2612INIT;\r
+ shared_ctl->jobs[0] = JOB940_YM2612INIT;\r
+ shared_ctl->jobs[1] = 0;\r
shared_ctl->busy = 1;\r
\r
/* start the 940 */\r
- Reset940(0);\r
+ Reset940(0, 2);\r
Pause940(0);\r
\r
// YM2612ResetChip_940(); // will be done on JOB940_YM2612INIT\r
\r
internal_reset();\r
\r
- add_job_940(JOB940_YM2612RESETCHIP);\r
+ add_job_940(JOB940_YM2612RESETCHIP, 0);\r
}\r
\r
\r
shared_ctl->writebuffsel ^= 1;\r
shared_ctl->length = length;\r
shared_ctl->stereo = stereo;\r
- add_job_940(JOB940_YM2612UPDATEONE);\r
+ add_job_940(JOB940_YM2612UPDATEONE, 0);\r
//spend_cycles(512);\r
//printf("SRCPND: %08lx, INTMODE: %08lx, INTMASK: %08lx, INTPEND: %08lx\n",\r
// gp2x_memregl[0x4500>>2], gp2x_memregl[0x4504>>2], gp2x_memregl[0x4508>>2], gp2x_memregl[0x4510>>2]);\r
b .Begin\r
.b_irq:\r
mov r12, #6\r
- mov sp, #0x100000 @ reset stack\r
- sub sp, sp, #4\r
- mov r1, #0xbd000000 @ assume we live @ 0x3000000 bank\r
+ mov sp, #0x100000 @ reset stack\r
+ sub sp, sp, #4\r
+ mov r1, #0xbe000000 @ assume we live @ 0x2000000 bank\r
orr r2, r1, #0x3B00\r
orr r2, r2, #0x0046\r
mvn r3, #0\r
b .Begin\r
\r
.Begin:\r
- mov sp, #0x100000 @ set the stack top (1M)\r
- sub sp, sp, #4 @ minus 4\r
+ mov sp, #0x100000 @ set the stack top (1M)\r
+ sub sp, sp, #4 @ minus 4\r
\r
- @ set up memory region 0 -- the whole 4GB address space\r
- mov r0, #(0x1f<<1)|1 @ region data\r
- mcr p15, 0, r0, c6, c0, 0 @ opcode2 ~ data/instr\r
- mcr p15, 0, r0, c6, c0, 1\r
+ @ set up memory region 0 -- the whole 4GB address space\r
+ mov r0, #(0x1f<<1)|1 @ region data\r
+ mcr p15, 0, r0, c6, c0, 0 @ opcode2 ~ data/instr\r
+ mcr p15, 0, r0, c6, c0, 1\r
\r
@ set up region 1 which is the first 2 megabytes.\r
- mov r0, #(0x14<<1)|1 @ region data\r
- mcr p15, 0, r0, c6, c1, 0\r
- mcr p15, 0, r0, c6, c1, 1\r
+ mov r0, #(0x14<<1)|1 @ region data\r
+ mcr p15, 0, r0, c6, c1, 0\r
+ mcr p15, 0, r0, c6, c1, 1\r
\r
@ set up region 2: 64k 0x200000-0x210000\r
- mov r0, #(0x0f<<1)|1\r
+ mov r0, #(0x0f<<1)|1\r
orr r0, r0, #0x200000\r
- mcr p15, 0, r0, c6, c2, 0\r
- mcr p15, 0, r0, c6, c2, 1\r
+ mcr p15, 0, r0, c6, c2, 0\r
+ mcr p15, 0, r0, c6, c2, 1\r
\r
- @ set up region 3: 64k 0xbd000000-0xbd010000 (hw control registers)\r
- mov r0, #(0x0f<<1)|1\r
- orr r0, r0, #0xbd000000\r
- mcr p15, 0, r0, c6, c3, 0\r
- mcr p15, 0, r0, c6, c3, 1\r
+ @ set up region 3: 64k 0xbe000000-0xbe010000 (hw control registers)\r
+ mov r0, #(0x0f<<1)|1\r
+ orr r0, r0, #0xbe000000\r
+ mcr p15, 0, r0, c6, c3, 0\r
+ mcr p15, 0, r0, c6, c3, 1\r
\r
@ set region 1 to be cacheable (so the first 2M will be cacheable)\r
- mov r0, #2\r
- mcr p15, 0, r0, c2, c0, 0\r
- mcr p15, 0, r0, c2, c0, 1\r
+ mov r0, #2\r
+ mcr p15, 0, r0, c2, c0, 0\r
+ mcr p15, 0, r0, c2, c0, 1\r
\r
@ set region 1 to be bufferable too (only data)\r
- mcr p15, 0, r0, c3, c0, 0\r
+ mcr p15, 0, r0, c3, c0, 0\r
\r
@ set protection, allow accsess only to regions 1 and 2\r
- mov r0, #(3<<6)|(3<<4)|(3<<2)|(0) @ data: [full, full, full, no access] for regions [3 2 1 0]\r
- mcr p15, 0, r0, c5, c0, 0\r
- mov r0, #(0<<6)|(0<<4)|(3<<2)|(0) @ instructions: [no access, no, full, no]\r
- mcr p15, 0, r0, c5, c0, 1\r
-\r
- mrc p15, 0, r0, c1, c0, 0 @ fetch current control reg\r
- orr r0, r0, #1 @ 0x00000001: enable protection unit\r
- orr r0, r0, #4 @ 0x00000004: enable D cache\r
- orr r0, r0, #0x1000 @ 0x00001000: enable I cache\r
- orr r0, r0, #0xC0000000 @ 0xC0000000: async+fastbus\r
- mcr p15, 0, r0, c1, c0, 0 @ set control reg\r
+ mov r0, #(3<<6)|(3<<4)|(3<<2)|(0) @ data: [full, full, full, no access] for regions [3 2 1 0]\r
+ mcr p15, 0, r0, c5, c0, 0\r
+ mov r0, #(0<<6)|(0<<4)|(3<<2)|(0) @ instructions: [no access, no, full, no]\r
+ mcr p15, 0, r0, c5, c0, 1\r
+\r
+ mrc p15, 0, r0, c1, c0, 0 @ fetch current control reg\r
+ orr r0, r0, #1 @ 0x00000001: enable protection unit\r
+ orr r0, r0, #4 @ 0x00000004: enable D cache\r
+ orr r0, r0, #0x1000 @ 0x00001000: enable I cache\r
+ orr r0, r0, #0xC0000000 @ 0xC0000000: async+fastbus\r
+ mcr p15, 0, r0, c1, c0, 0 @ set control reg\r
\r
@ flush (invalidate) the cache (just in case)\r
mov r0, #0\r
b .b_reserved\r
\r
.pool\r
+\r
+@ vim:filetype=ignored:\r
JOB940_NUMJOBS\r
};\r
\r
+#define MAX_940JOBS 2\r
\r
typedef struct\r
{\r
YM2612 ym2612; /* current state of the emulated YM2612 */\r
- int mix_buffer[44100/50*2]; /* this is where the YM2612 samples will be mixed to */\r
+ int mix_buffer[44100/50*2]; /* this is where the YM2612 samples will be mixed to */\r
+ short mp3_buffer[2][1152*2]; /* buffer for mp3 decoder's output */\r
} _940_data_t;\r
\r
\r
typedef struct\r
{\r
- int job; /* a job for second core */\r
+ int jobs[MAX_940JOBS]; /* jobs for second core */\r
int busy; /* busy status of the 940 core */\r
int length; /* number of samples to mix (882 max) */\r
int stereo; /* mix samples as stereo, doubles sample count automatically */\r
int baseclock; /* ym2612 settings */\r
int rate;\r
int writebuffsel; /* which write buffer to use (from 940 side) */\r
- UINT16 writebuff0[2048]; /* 1024 for savestates, 1024 extra */\r
+ UINT16 writebuff0[2048]; /* list of writes to ym2612, 1024 for savestates, 1024 extra */\r
UINT16 writebuff1[2048];\r
int vstarts[8]; /* debug: number of starts from each of 8 vectors */\r
int loopc; /* debug: main loop counter */\r
dprint = 1\r
#mz80 = 1\r
#debug_cyclone = 1\r
-asm_memory = 1\r
+asm_memory = 0 # TODO\r
asm_render = 1\r
asm_ym2612 = 1\r
#profile = 1\r
../../Pico/Pico.o ../../Pico/Sek.o ../../Pico/VideoPort.o ../../Pico/Draw2.o ../../Pico/Draw.o\r
# Pico - CD\r
OBJS += ../../Pico/cd/Pico.o ../../Pico/cd/Memory.o ../../Pico/cd/Sek.o ../../Pico/cd/LC89510.o \\r
- ../../Pico/cd/cd_sys.o\r
+ ../../Pico/cd/cd_sys.o ../../Pico/cd/cd_file.o ../../Pico/cd/gfx_cd.o\r
# asm stuff\r
ifeq "$(asm_render)" "1"\r
DEFINC += -D_ASM_DRAW_C\r
}\r
}\r
gettimeofday(¬iceMsgTime, 0);\r
-\r
+printf("PicoMCD: %x\n", PicoMCD);\r
// load SRAM for this ROM\r
if(currentConfig.EmuOpt & 1)\r
emu_SaveLoadGame(1, 1);\r
\r
static void cd_leds(void)\r
{\r
- static int old_reg = 0;\r
- if (!((Pico_mcd->s68k_regs[0] ^ old_reg) & 3)) return; // no change\r
+ // mmu problems?\r
+// static\r
+ int old_reg;\r
+// if (!((Pico_mcd->s68k_regs[0] ^ old_reg) & 3)) return; // no change\r
old_reg = Pico_mcd->s68k_regs[0];\r
\r
if ((PicoOpt&0x10)||!(currentConfig.EmuOpt&0x80)) {\r
if(PsndRate != PsndRate_old || (PicoOpt&0x20b) != (PicoOpt_old&0x20b) || Pico.m.pal != pal_old || crashed_940) {\r
/* if 940 is turned off, we need it to be put back to sleep */\r
if (!(PicoOpt&0x200) && ((PicoOpt^PicoOpt_old)&0x200)) {\r
- Reset940(1);\r
+ Reset940(1, 2);\r
Pause940(1);\r
}\r
sound_rerate();\r
}\r
\r
\r
-void Reset940(int yes)\r
+void Reset940(int yes, int bank)\r
{\r
- gp2x_memregs[0x3B48>>1] = ((yes&1) << 7) | (0x03); /* bank=3 */\r
+ gp2x_memregs[0x3B48>>1] = ((yes&1) << 7) | (bank & 0x03); /* bank=3 */\r
}\r
\r
\r
\r
void gp2x_deinit(void)\r
{\r
- Reset940(1);\r
+ Reset940(1, 3);\r
Pause940(1);\r
\r
gp2x_video_changemode(15);\r
\r
/* 940 core */\r
void Pause940(int yes);\r
-void Reset940(int yes);\r
+void Reset940(int yes, int bank);\r
\r
\r
extern void *gp2x_screen;\r
mmuhack_status = ret;\r
}\r
cpuctrl_init();\r
- Reset940(1);\r
- Pause940(1);\r
+ // Reset940(1);\r
+ // Pause940(1);\r
if (currentConfig.EmuOpt&0x100) {\r
printf("setting RAM timings.. "); fflush(stdout);\r
// craigix: --trc 6 --tras 4 --twr 1 --tmrd 1 --trfc 1 --trp 2 --trcd 2\r
\r
case PGS_Quit:\r
goto endloop;\r
- \r
+\r
default:\r
printf("engine got into unknown state (%i), exitting\n", engineState);\r
goto endloop;\r
} else {\r
y += 30;\r
}\r
- gp2x_text_out8(tl_x, (y+=10), "Load new ROM");\r
+ gp2x_text_out8(tl_x, (y+=10), "Load new ROM/ISO");\r
gp2x_text_out8(tl_x, (y+=10), "Change options");\r
gp2x_text_out8(tl_x, (y+=10), "Configure controls");\r
gp2x_text_out8(tl_x, (y+=10), "Credits");\r
// pico.c\r
#define CAN_HANDLE_240_LINES 1\r
\r
-//#define dprintf(f,...) printf(f"\n",##__VA_ARGS__)\r
+//#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)\r
#define dprintf(x...)\r
\r
#endif //PORT_CONFIG_H\r
-#define VERSION "0.965"\r
+#define VERSION "1.10"\r
\r
{
}
-void Reset940(int yes)
+void Reset940(int yes, int bank)
{
}
notaz.gp2x.de / picodrive.git / commitdiff