6cadc2da |
1 | // common code for Memory.c and cd/Memory.c |
2 | // (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas |
fa1e5e29 |
3 | |
eff55556 |
4 | #ifndef UTYPES_DEFINED |
5 | typedef unsigned char u8; |
6 | typedef unsigned short u16; |
7 | typedef unsigned int u32; |
8 | #define UTYPES_DEFINED |
9 | #endif |
10 | |
fa1e5e29 |
11 | |
12 | #ifndef _ASM_MEMORY_C |
13 | static |
14 | #endif |
15 | u8 z80Read8(u32 a) |
16 | { |
17 | if(Pico.m.z80Run&1) return 0; |
18 | |
19 | a&=0x1fff; |
20 | |
602133e1 |
21 | if (!(PicoOpt&POPT_EN_Z80)) |
22 | { |
fa1e5e29 |
23 | // Z80 disabled, do some faking |
24 | static u8 zerosent = 0; |
25 | if(a == Pico.m.z80_lastaddr) { // probably polling something |
26 | u8 d = Pico.m.z80_fakeval; |
27 | if((d & 0xf) == 0xf && !zerosent) { |
28 | d = 0; zerosent = 1; |
29 | } else { |
30 | Pico.m.z80_fakeval++; |
31 | zerosent = 0; |
32 | } |
33 | return d; |
34 | } else { |
35 | Pico.m.z80_fakeval = 0; |
36 | } |
37 | } |
38 | |
39 | Pico.m.z80_lastaddr = (u16) a; |
40 | return Pico.zram[a]; |
41 | } |
42 | |
fa1e5e29 |
43 | #ifndef _ASM_MEMORY_C |
44 | static |
45 | #endif |
e5503e2f |
46 | u32 z80ReadBusReq(void) |
fa1e5e29 |
47 | { |
e5503e2f |
48 | u32 d=Pico.m.z80Run&1; |
2aa27095 |
49 | if (!d) { |
e5503e2f |
50 | // needed by buggy Terminator (Sega CD) |
51 | int stop_before = SekCyclesDone() - z80stopCycle; |
69996cb7 |
52 | //elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before); |
53 | // note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself. |
5f20bb80 |
54 | // but CD Terminator needs at least 32, so it only works because next frame cycle wrap. |
69996cb7 |
55 | if (stop_before > 0 && stop_before < 20) // Gens uses 16 here |
e5503e2f |
56 | d = 1; // bus not yet available |
57 | } |
2aa27095 |
58 | |
69996cb7 |
59 | elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc); |
e5503e2f |
60 | return d|0x80; |
61 | } |
fa1e5e29 |
62 | |
e5503e2f |
63 | #ifndef _ASM_MEMORY_C |
64 | static |
65 | #endif |
66 | void z80WriteBusReq(u32 d) |
67 | { |
68 | d&=1; d^=1; |
f58f05d2 |
69 | { |
b542be46 |
70 | if (!d) |
71 | { |
bd613473 |
72 | if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) |
73 | { |
f58f05d2 |
74 | z80stopCycle = SekCyclesDone(); |
4b9c5888 |
75 | PicoSyncZ80(z80stopCycle); |
e5503e2f |
76 | } |
f58f05d2 |
77 | } else { |
69996cb7 |
78 | if (!Pico.m.z80Run) |
4b9c5888 |
79 | z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone()); |
fa1e5e29 |
80 | } |
fa1e5e29 |
81 | } |
69996cb7 |
82 | elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc); |
e5503e2f |
83 | Pico.m.z80Run=(u8)d; |
84 | } |
85 | |
86 | #ifndef _ASM_MEMORY_C |
87 | static |
88 | #endif |
89 | u32 OtherRead16(u32 a, int realsize) |
90 | { |
91 | u32 d=0; |
fa1e5e29 |
92 | |
93 | if ((a&0xffffe0)==0xa10000) { // I/O ports |
94 | a=(a>>1)&0xf; |
95 | switch(a) { |
96 | case 0: d=Pico.m.hardware; break; // Hardware value (Version register) |
e5503e2f |
97 | case 1: d=PadRead(0); break; |
98 | case 2: d=PadRead(1); break; |
fa1e5e29 |
99 | default: d=Pico.ioports[a]; break; // IO ports can be used as RAM |
100 | } |
101 | d|=d<<8; |
102 | goto end; |
103 | } |
104 | |
f58f05d2 |
105 | // rotate fakes next fetched instruction for Time Killers |
fa1e5e29 |
106 | if (a==0xa11100) { // z80 busreq |
e5503e2f |
107 | d=(z80ReadBusReq()<<8)|Pico.m.rotate++; |
fa1e5e29 |
108 | goto end; |
109 | } |
110 | |
bd613473 |
111 | if ((a&0xff0000)==0xa00000) |
112 | { |
113 | if (Pico.m.z80Run&1) |
583ab72c |
114 | elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc); |
e5503e2f |
115 | if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped) |
116 | if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled |
43e6eaad |
117 | if (PicoOpt&POPT_EN_FM) d=ym2612_read_local_68k(); |
e5503e2f |
118 | else d=Pico.m.rotate++&3; |
e5503e2f |
119 | goto end; |
120 | } |
bd613473 |
121 | elprintf(EL_ANOMALY, "68k bad read [%06x]", a); |
e5503e2f |
122 | d=0xffff; |
123 | goto end; |
124 | } |
125 | |
f53f286a |
126 | d = PicoRead16Hook(a, realsize); |
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127 | |
128 | end: |
129 | return d; |
130 | } |
131 | |
e5503e2f |
132 | static void IoWrite8(u32 a, u32 d) |
133 | { |
134 | a=(a>>1)&0xf; |
135 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state |
583ab72c |
136 | if (PicoOpt&POPT_6BTN_PAD) |
602133e1 |
137 | { |
138 | if (a==1) { |
e5503e2f |
139 | Pico.m.padDelay[0] = 0; |
140 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++; |
141 | } |
602133e1 |
142 | else if (a==2) { |
e5503e2f |
143 | Pico.m.padDelay[1] = 0; |
144 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++; |
145 | } |
146 | } |
147 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM |
148 | } |
fa1e5e29 |
149 | |
4ff2d527 |
150 | #ifndef _ASM_CD_MEMORY_C |
151 | static |
152 | #endif |
e5503e2f |
153 | void OtherWrite8(u32 a,u32 d) |
fa1e5e29 |
154 | { |
3ec29f01 |
155 | #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS) |
fa1e5e29 |
156 | if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound |
bd613473 |
157 | if ((a&0xff4000)==0xa00000) { // z80 RAM |
760e26c7 |
158 | SekCyclesBurn(2); // hack |
159 | if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)d; |
160 | else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc); |
bd613473 |
161 | return; |
162 | } |
4b9c5888 |
163 | if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound |
e5503e2f |
164 | if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports |
165 | #endif |
166 | if (a==0xa11100) { z80WriteBusReq(d); return; } |
fa1e5e29 |
167 | if (a==0xa11200) { |
5f20bb80 |
168 | elprintf(EL_BUSREQ, "write z80Reset: %02x", d); |
bd613473 |
169 | if (!(d&0x1)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); } |
170 | else if (Pico.m.z80_reset) { |
171 | Pico.m.z80_reset = 0; |
172 | YM2612ResetChip(); |
173 | z80_reset(); |
4b9c5888 |
174 | timers_reset(); |
bd613473 |
175 | } |
fa1e5e29 |
176 | return; |
177 | } |
3ec29f01 |
178 | #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS) |
fa1e5e29 |
179 | if ((a&0xff7f00)==0xa06000) // Z80 BANK register |
180 | { |
181 | Pico.m.z80_bank68k>>=1; |
182 | Pico.m.z80_bank68k|=(d&1)<<8; |
183 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one |
bd613473 |
184 | elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15); |
fa1e5e29 |
185 | return; |
186 | } |
e5503e2f |
187 | #endif |
fa1e5e29 |
188 | if ((a&0xe700e0)==0xc00000) { |
f58f05d2 |
189 | d&=0xff; |
fa1e5e29 |
190 | PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored |
191 | return; |
192 | } |
193 | |
4b9c5888 |
194 | PicoWrite8Hook(a, d&0xff, 8); |
fa1e5e29 |
195 | } |
196 | |
197 | |
4ff2d527 |
198 | #ifndef _ASM_CD_MEMORY_C |
199 | static |
200 | #endif |
201 | void OtherWrite16(u32 a,u32 d) |
fa1e5e29 |
202 | { |
e5503e2f |
203 | if (a==0xa11100) { z80WriteBusReq(d>>8); return; } |
e5503e2f |
204 | if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports |
e5503e2f |
205 | if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound |
4b9c5888 |
206 | if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound |
bd613473 |
207 | if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only) |
760e26c7 |
208 | if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)(d>>8); |
209 | else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %04x @ %06x", a, d&0xffff, SekPc); |
bd613473 |
210 | return; |
211 | } |
212 | if (a==0xa11200) { |
213 | elprintf(EL_BUSREQ, "write z80reset: %04x", d); |
214 | if (!(d&0x100)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); } |
215 | else if (Pico.m.z80_reset) { |
216 | Pico.m.z80_reset = 0; |
217 | YM2612ResetChip(); |
218 | z80_reset(); |
4b9c5888 |
219 | timers_reset(); |
bd613473 |
220 | } |
221 | return; |
222 | } |
e5503e2f |
223 | if ((a&0xff7f00)==0xa06000) // Z80 BANK register |
224 | { |
225 | Pico.m.z80_bank68k>>=1; |
226 | Pico.m.z80_bank68k|=(d&1)<<8; |
227 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one |
bd613473 |
228 | elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15); |
fa1e5e29 |
229 | return; |
230 | } |
fa1e5e29 |
231 | |
69996cb7 |
232 | #ifndef _CD_MEMORY_C |
7969166e |
233 | if (a >= SRam.start && a <= SRam.end) { |
1dceadae |
234 | elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc); |
9dc09829 |
235 | if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled |
7969166e |
236 | u8 *pm=(u8 *)(SRam.data-SRam.start+a); |
237 | *pm++=d>>8; |
238 | *pm++=d; |
239 | SRam.changed = 1; |
240 | } |
241 | else |
1dceadae |
242 | SRAMWrite(a, d); |
7969166e |
243 | return; |
244 | } |
69996cb7 |
245 | #endif |
f53f286a |
246 | |
4b9c5888 |
247 | PicoWrite16Hook(a, d&0xffff, 16); |
fa1e5e29 |
248 | } |
249 | |