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[picodrive.git] / Pico / MemoryCmn.c
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6cadc2da 1// common code for Memory.c and cd/Memory.c
2// (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
fa1e5e29 3
eff55556 4#ifndef UTYPES_DEFINED
5typedef unsigned char u8;
6typedef unsigned short u16;
7typedef unsigned int u32;
8#define UTYPES_DEFINED
9#endif
10
fa1e5e29 11
12#ifndef _ASM_MEMORY_C
13static
14#endif
15u8 z80Read8(u32 a)
16{
17 if(Pico.m.z80Run&1) return 0;
18
19 a&=0x1fff;
20
602133e1 21 if (!(PicoOpt&POPT_EN_Z80))
22 {
fa1e5e29 23 // Z80 disabled, do some faking
24 static u8 zerosent = 0;
25 if(a == Pico.m.z80_lastaddr) { // probably polling something
26 u8 d = Pico.m.z80_fakeval;
27 if((d & 0xf) == 0xf && !zerosent) {
28 d = 0; zerosent = 1;
29 } else {
30 Pico.m.z80_fakeval++;
31 zerosent = 0;
32 }
33 return d;
34 } else {
35 Pico.m.z80_fakeval = 0;
36 }
37 }
38
39 Pico.m.z80_lastaddr = (u16) a;
40 return Pico.zram[a];
41}
42
fa1e5e29 43#ifndef _ASM_MEMORY_C
44static
45#endif
e5503e2f 46u32 z80ReadBusReq(void)
fa1e5e29 47{
e5503e2f 48 u32 d=Pico.m.z80Run&1;
2aa27095 49 if (!d) {
e5503e2f 50 // needed by buggy Terminator (Sega CD)
51 int stop_before = SekCyclesDone() - z80stopCycle;
69996cb7 52 //elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before);
53 // note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself.
5f20bb80 54 // but CD Terminator needs at least 32, so it only works because next frame cycle wrap.
69996cb7 55 if (stop_before > 0 && stop_before < 20) // Gens uses 16 here
e5503e2f 56 d = 1; // bus not yet available
57 }
2aa27095 58
69996cb7 59 elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
e5503e2f 60 return d|0x80;
61}
fa1e5e29 62
be297089 63static void z80WriteBusReq(u32 d)
64{
65 d&=1; d^=1;
66 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
67 if (d ^ Pico.m.z80Run)
68 {
69 if (d)
70 {
71 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
72 }
73 else
74 {
75 z80stopCycle = SekCyclesDone();
76 if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)
77 PicoSyncZ80(z80stopCycle);
78 }
79 Pico.m.z80Run=d;
80 }
81}
82
83static void z80WriteReset(u32 d)
e5503e2f 84{
85 d&=1; d^=1;
be297089 86 elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
87 if (d ^ Pico.m.z80_reset)
f58f05d2 88 {
be297089 89 if (d)
b542be46 90 {
bd613473 91 if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
be297089 92 PicoSyncZ80(SekCyclesDone());
93 }
94 else
95 {
96 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
97 z80_reset();
fa1e5e29 98 }
be297089 99 YM2612ResetChip();
100 timers_reset();
101 Pico.m.z80_reset=d;
fa1e5e29 102 }
e5503e2f 103}
104
105#ifndef _ASM_MEMORY_C
106static
107#endif
108u32 OtherRead16(u32 a, int realsize)
109{
110 u32 d=0;
fa1e5e29 111
112 if ((a&0xffffe0)==0xa10000) { // I/O ports
113 a=(a>>1)&0xf;
114 switch(a) {
115 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
e5503e2f 116 case 1: d=PadRead(0); break;
117 case 2: d=PadRead(1); break;
fa1e5e29 118 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
119 }
120 d|=d<<8;
121 goto end;
122 }
123
f58f05d2 124 // rotate fakes next fetched instruction for Time Killers
fa1e5e29 125 if (a==0xa11100) { // z80 busreq
e5503e2f 126 d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
fa1e5e29 127 goto end;
128 }
129
bd613473 130 if ((a&0xff0000)==0xa00000)
131 {
132 if (Pico.m.z80Run&1)
583ab72c 133 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
e5503e2f 134 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
c060a9ab 135 if ((a&0x6000)==0x4000) { d=ym2612_read_local_68k(); goto end; } // 0x4000-0x5fff
136
bd613473 137 elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
e5503e2f 138 d=0xffff;
139 goto end;
140 }
141
f53f286a 142 d = PicoRead16Hook(a, realsize);
fa1e5e29 143
144end:
145 return d;
146}
147
e5503e2f 148static void IoWrite8(u32 a, u32 d)
149{
150 a=(a>>1)&0xf;
151 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
583ab72c 152 if (PicoOpt&POPT_6BTN_PAD)
602133e1 153 {
154 if (a==1) {
e5503e2f 155 Pico.m.padDelay[0] = 0;
156 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
157 }
602133e1 158 else if (a==2) {
e5503e2f 159 Pico.m.padDelay[1] = 0;
160 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
161 }
162 }
163 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
164}
fa1e5e29 165
4ff2d527 166#ifndef _ASM_CD_MEMORY_C
167static
168#endif
e5503e2f 169void OtherWrite8(u32 a,u32 d)
fa1e5e29 170{
3ec29f01 171#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
fa1e5e29 172 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
bd613473 173 if ((a&0xff4000)==0xa00000) { // z80 RAM
760e26c7 174 SekCyclesBurn(2); // hack
175 if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)d;
176 else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
bd613473 177 return;
178 }
4b9c5888 179 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
e5503e2f 180 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
181#endif
182 if (a==0xa11100) { z80WriteBusReq(d); return; }
be297089 183 if (a==0xa11200) { z80WriteReset(d); return; }
184
3ec29f01 185#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
fa1e5e29 186 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
187 {
188 Pico.m.z80_bank68k>>=1;
189 Pico.m.z80_bank68k|=(d&1)<<8;
190 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
bd613473 191 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
fa1e5e29 192 return;
193 }
e5503e2f 194#endif
fa1e5e29 195 if ((a&0xe700e0)==0xc00000) {
f58f05d2 196 d&=0xff;
fa1e5e29 197 PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
198 return;
199 }
200
4b9c5888 201 PicoWrite8Hook(a, d&0xff, 8);
fa1e5e29 202}
203
204
4ff2d527 205#ifndef _ASM_CD_MEMORY_C
206static
207#endif
208void OtherWrite16(u32 a,u32 d)
fa1e5e29 209{
e5503e2f 210 if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
e5503e2f 211 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
e5503e2f 212 if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
4b9c5888 213 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
bd613473 214 if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
760e26c7 215 if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)(d>>8);
216 else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %04x @ %06x", a, d&0xffff, SekPc);
bd613473 217 return;
218 }
be297089 219 if (a==0xa11200) { z80WriteReset(d>>8); return; }
220
e5503e2f 221 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
222 {
223 Pico.m.z80_bank68k>>=1;
224 Pico.m.z80_bank68k|=(d&1)<<8;
225 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
bd613473 226 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
fa1e5e29 227 return;
228 }
fa1e5e29 229
69996cb7 230#ifndef _CD_MEMORY_C
7969166e 231 if (a >= SRam.start && a <= SRam.end) {
1dceadae 232 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
9dc09829 233 if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
7969166e 234 u8 *pm=(u8 *)(SRam.data-SRam.start+a);
235 *pm++=d>>8;
236 *pm++=d;
237 SRam.changed = 1;
238 }
239 else
1dceadae 240 SRAMWrite(a, d);
7969166e 241 return;
242 }
69996cb7 243#endif
f53f286a 244
4b9c5888 245 PicoWrite16Hook(a, d&0xffff, 16);
fa1e5e29 246}
247