eeprom crash fix, PacMan2 hack
[picodrive.git] / Pico / MemoryCmn.c
CommitLineData
6cadc2da 1// common code for Memory.c and cd/Memory.c
2// (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
fa1e5e29 3
eff55556 4#ifndef UTYPES_DEFINED
5typedef unsigned char u8;
6typedef unsigned short u16;
7typedef unsigned int u32;
8#define UTYPES_DEFINED
9#endif
10
fa1e5e29 11
12#ifndef _ASM_MEMORY_C
13static
14#endif
15u8 z80Read8(u32 a)
16{
17 if(Pico.m.z80Run&1) return 0;
18
19 a&=0x1fff;
20
602133e1 21 if (!(PicoOpt&POPT_EN_Z80))
22 {
fa1e5e29 23 // Z80 disabled, do some faking
24 static u8 zerosent = 0;
25 if(a == Pico.m.z80_lastaddr) { // probably polling something
26 u8 d = Pico.m.z80_fakeval;
27 if((d & 0xf) == 0xf && !zerosent) {
28 d = 0; zerosent = 1;
29 } else {
30 Pico.m.z80_fakeval++;
31 zerosent = 0;
32 }
33 return d;
34 } else {
35 Pico.m.z80_fakeval = 0;
36 }
37 }
38
39 Pico.m.z80_lastaddr = (u16) a;
40 return Pico.zram[a];
41}
42
fa1e5e29 43#ifndef _ASM_MEMORY_C
44static
45#endif
e5503e2f 46u32 z80ReadBusReq(void)
fa1e5e29 47{
e5503e2f 48 u32 d=Pico.m.z80Run&1;
f58f05d2 49 if (!d && Pico.m.scanline != -1) {
e5503e2f 50 // needed by buggy Terminator (Sega CD)
51 int stop_before = SekCyclesDone() - z80stopCycle;
69996cb7 52 //elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before);
53 // note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself.
5f20bb80 54 // but CD Terminator needs at least 32, so it only works because next frame cycle wrap.
69996cb7 55 if (stop_before > 0 && stop_before < 20) // Gens uses 16 here
e5503e2f 56 d = 1; // bus not yet available
57 }
58 // |=0x80 for Shadow of the Beast & Super Offroad
69996cb7 59 elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
e5503e2f 60 return d|0x80;
61}
fa1e5e29 62
e5503e2f 63#ifndef _ASM_MEMORY_C
64static
65#endif
66void z80WriteBusReq(u32 d)
67{
68 d&=1; d^=1;
f58f05d2 69 {
b542be46 70 if (!d)
71 {
f58f05d2 72 // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
bd613473 73 if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
74 {
f58f05d2 75 int lineCycles;
76 z80stopCycle = SekCyclesDone();
9a8ffeee 77 if ((Pico.m.z80Run&2) && Pico.m.scanline != -1)
f58f05d2 78 lineCycles=(488-SekCyclesLeft)&0x1ff;
79 else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
9a8ffeee 80 if (lineCycles > 0) { // && lineCycles <= 488) {
69996cb7 81 //dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
f58f05d2 82 lineCycles=(lineCycles>>1)-(lineCycles>>5);
b542be46 83 z80_run_nr(lineCycles);
f58f05d2 84 }
e5503e2f 85 }
f58f05d2 86 } else {
69996cb7 87 if (!Pico.m.z80Run)
88 z80startCycle = SekCyclesDone();
89 else
90 d|=Pico.m.z80Run;
fa1e5e29 91 }
fa1e5e29 92 }
69996cb7 93 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
e5503e2f 94 Pico.m.z80Run=(u8)d;
95}
96
97#ifndef _ASM_MEMORY_C
98static
99#endif
100u32 OtherRead16(u32 a, int realsize)
101{
102 u32 d=0;
fa1e5e29 103
104 if ((a&0xffffe0)==0xa10000) { // I/O ports
105 a=(a>>1)&0xf;
106 switch(a) {
107 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
e5503e2f 108 case 1: d=PadRead(0); break;
109 case 2: d=PadRead(1); break;
fa1e5e29 110 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
111 }
112 d|=d<<8;
113 goto end;
114 }
115
f58f05d2 116 // rotate fakes next fetched instruction for Time Killers
fa1e5e29 117 if (a==0xa11100) { // z80 busreq
e5503e2f 118 d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
fa1e5e29 119 goto end;
120 }
121
bd613473 122 if ((a&0xff0000)==0xa00000)
123 {
124 if (Pico.m.z80Run&1)
583ab72c 125 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
e5503e2f 126 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
127 if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
602133e1 128 if(PicoOpt&POPT_EN_FM) d=YM2612Read();
e5503e2f 129 else d=Pico.m.rotate++&3;
69996cb7 130 elprintf(EL_YM2612R, "read ym2612: %02x", d);
e5503e2f 131 goto end;
132 }
bd613473 133 elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
e5503e2f 134 d=0xffff;
135 goto end;
136 }
137
f53f286a 138 d = PicoRead16Hook(a, realsize);
fa1e5e29 139
140end:
141 return d;
142}
143
e5503e2f 144static void IoWrite8(u32 a, u32 d)
145{
146 a=(a>>1)&0xf;
147 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
583ab72c 148 if (PicoOpt&POPT_6BTN_PAD)
602133e1 149 {
150 if (a==1) {
e5503e2f 151 Pico.m.padDelay[0] = 0;
152 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
153 }
602133e1 154 else if (a==2) {
e5503e2f 155 Pico.m.padDelay[1] = 0;
156 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
157 }
158 }
159 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
160}
fa1e5e29 161
4ff2d527 162#ifndef _ASM_CD_MEMORY_C
163static
164#endif
e5503e2f 165void OtherWrite8(u32 a,u32 d)
fa1e5e29 166{
3ec29f01 167#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
fa1e5e29 168 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
bd613473 169 if ((a&0xff4000)==0xa00000) { // z80 RAM
170 if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d;
583ab72c 171 else {
172 elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d, SekPc);
173 SekCyclesBurn(4); // hack?
174 }
bd613473 175 return;
176 }
fa283c9a 177 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d)&1; return; } // FM Sound
e5503e2f 178 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
179#endif
180 if (a==0xa11100) { z80WriteBusReq(d); return; }
fa1e5e29 181 if (a==0xa11200) {
5f20bb80 182 elprintf(EL_BUSREQ, "write z80Reset: %02x", d);
bd613473 183 if (!(d&0x1)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
184 else if (Pico.m.z80_reset) {
185 Pico.m.z80_reset = 0;
186 YM2612ResetChip();
187 z80_reset();
188 }
fa1e5e29 189 return;
190 }
3ec29f01 191#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
fa1e5e29 192 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
193 {
194 Pico.m.z80_bank68k>>=1;
195 Pico.m.z80_bank68k|=(d&1)<<8;
196 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
bd613473 197 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
fa1e5e29 198 return;
199 }
e5503e2f 200#endif
fa1e5e29 201 if ((a&0xe700e0)==0xc00000) {
f58f05d2 202 d&=0xff;
fa1e5e29 203 PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
204 return;
205 }
206
f53f286a 207 PicoWrite8Hook(a, d, 8);
fa1e5e29 208}
209
210
4ff2d527 211#ifndef _ASM_CD_MEMORY_C
212static
213#endif
214void OtherWrite16(u32 a,u32 d)
fa1e5e29 215{
e5503e2f 216 if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
e5503e2f 217 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
e5503e2f 218 if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
bd613473 219 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d)&1; return; } // FM Sound (??)
220 if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
221 if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8);
583ab72c 222 else elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d, SekPc);
bd613473 223 return;
224 }
225 if (a==0xa11200) {
226 elprintf(EL_BUSREQ, "write z80reset: %04x", d);
227 if (!(d&0x100)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
228 else if (Pico.m.z80_reset) {
229 Pico.m.z80_reset = 0;
230 YM2612ResetChip();
231 z80_reset();
232 }
233 return;
234 }
e5503e2f 235 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
236 {
237 Pico.m.z80_bank68k>>=1;
238 Pico.m.z80_bank68k|=(d&1)<<8;
239 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
bd613473 240 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
fa1e5e29 241 return;
242 }
fa1e5e29 243
69996cb7 244#ifndef _CD_MEMORY_C
7969166e 245 if (a >= SRam.start && a <= SRam.end) {
1dceadae 246 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
9dc09829 247 if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
7969166e 248 u8 *pm=(u8 *)(SRam.data-SRam.start+a);
249 *pm++=d>>8;
250 *pm++=d;
251 SRam.changed = 1;
252 }
253 else
1dceadae 254 SRAMWrite(a, d);
7969166e 255 return;
256 }
69996cb7 257#endif
f53f286a 258
f8ef8ff7 259 PicoWrite16Hook(a, d, 16);
fa1e5e29 260}
261