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1 | // This is part of Pico Library\r |
2 | \r |
3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
4 | // (c) Copyright 2006 notaz, All rights reserved.\r |
5 | // Free for non-commercial use.\r |
6 | \r |
7 | // For commercial use, separate licencing terms must be obtained.\r |
8 | \r |
9 | \r |
10 | #include "PicoInt.h"\r |
11 | \r |
12 | \r |
13 | int SekCycleCnt=0; // cycles done in this frame\r |
14 | int SekCycleAim=0; // cycle aim\r |
15 | unsigned int SekCycleCntT=0;\r |
16 | \r |
17 | #ifdef EMU_C68K\r |
18 | // ---------------------- Cyclone 68000 ----------------------\r |
19 | struct Cyclone PicoCpu;\r |
20 | #endif\r |
21 | \r |
22 | #ifdef EMU_M68K\r |
23 | // ---------------------- MUSASHI 68000 ----------------------\r |
24 | m68ki_cpu_core PicoM68kCPU; // MD's CPU\r |
25 | #endif\r |
26 | \r |
27 | #ifdef EMU_A68K\r |
28 | // ---------------------- A68K ----------------------\r |
29 | \r |
30 | void __cdecl M68000_RESET();\r |
31 | int m68k_ICount=0;\r |
32 | unsigned int mem_amask=0xffffff; // 24-bit bus\r |
33 | unsigned int mame_debug=0,cur_mrhard=0,m68k_illegal_opcode=0,illegal_op=0,illegal_pc=0,opcode_entry=0; // filler\r |
34 | \r |
35 | static int IrqCallback(int i) { i; return -1; }\r |
36 | static int DoReset() { return 0; }\r |
37 | static int (*ResetCallback)()=DoReset;\r |
38 | \r |
39 | #pragma warning (disable:4152)\r |
40 | #endif\r |
41 | \r |
42 | \r |
43 | \r |
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44 | #ifdef EMU_C68K\r |
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45 | // interrupt acknowledgment\r |
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46 | static void SekIntAck(int level)\r |
47 | {\r |
48 | // try to emulate VDP's reaction to 68000 int ack\r |
49 | if (level == 4) Pico.video.pending_ints = 0;\r |
50 | else if(level == 6) Pico.video.pending_ints &= ~0x20;\r |
51 | PicoCpu.irq = 0;\r |
52 | }\r |
53 | \r |
54 | static void SekResetAck()\r |
55 | {\r |
56 | #if defined(__DEBUG_PRINT) || defined(WIN32)\r |
57 | dprintf("Reset encountered @ %06x", SekPc);\r |
58 | #endif\r |
59 | }\r |
60 | \r |
61 | static int SekUnrecognizedOpcode()\r |
62 | {\r |
63 | unsigned int pc, op;\r |
64 | pc = SekPc;\r |
65 | op = PicoCpu.read16(pc);\r |
66 | #if defined(__DEBUG_PRINT) || defined(WIN32)\r |
67 | dprintf("Unrecognized Opcode %04x @ %06x", op, pc);\r |
68 | #endif\r |
69 | // see if we are not executing trash\r |
70 | if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r |
71 | PicoCpu.cycles = 0;\r |
72 | PicoCpu.stopped = 1;\r |
73 | return 1;\r |
74 | }\r |
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75 | #ifdef EMU_M68K // debugging cyclone\r |
76 | {\r |
77 | extern int have_illegal;\r |
78 | have_illegal = 1;\r |
79 | }\r |
80 | #endif\r |
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81 | //exit(1);\r |
82 | return 0;\r |
83 | }\r |
84 | #endif\r |
85 | \r |
86 | \r |
87 | #ifdef EMU_M68K\r |
88 | static int SekIntAckM68K(int level)\r |
89 | {\r |
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90 | if (level == 4) { Pico.video.pending_ints = 0; dprintf("hack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r |
91 | else if(level == 6) { Pico.video.pending_ints &= ~0x20; dprintf("vack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r |
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92 | CPU_INT_LEVEL = 0;\r |
93 | return M68K_INT_ACK_AUTOVECTOR;\r |
94 | }\r |
95 | #endif\r |
96 | \r |
97 | \r |
98 | \r |
99 | int SekInit()\r |
100 | {\r |
101 | #ifdef EMU_C68K\r |
102 | CycloneInit();\r |
103 | memset(&PicoCpu,0,sizeof(PicoCpu));\r |
104 | PicoCpu.IrqCallback=SekIntAck;\r |
105 | PicoCpu.ResetCallback=SekResetAck;\r |
106 | PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;\r |
107 | #endif\r |
108 | #ifdef EMU_A68K\r |
109 | memset(&M68000_regs,0,sizeof(M68000_regs));\r |
110 | M68000_regs.IrqCallback=IrqCallback;\r |
111 | M68000_regs.pResetCallback=ResetCallback;\r |
112 | M68000_RESET(); // Init cpu emulator\r |
113 | #endif\r |
114 | #ifdef EMU_M68K\r |
115 | {\r |
116 | void *oldcontext = m68ki_cpu_p;\r |
117 | m68k_set_context(&PicoM68kCPU);\r |
118 | m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r |
119 | m68k_init();\r |
120 | m68k_set_int_ack_callback(SekIntAckM68K);\r |
121 | m68k_pulse_reset(); // Init cpu emulator\r |
122 | m68k_set_context(oldcontext);\r |
123 | }\r |
124 | #endif\r |
125 | \r |
126 | return 0;\r |
127 | }\r |
128 | \r |
129 | // Reset the 68000:\r |
130 | int SekReset()\r |
131 | {\r |
132 | if (Pico.rom==NULL) return 1;\r |
133 | \r |
134 | #ifdef EMU_C68K\r |
135 | PicoCpu.stopped=0;\r |
136 | PicoCpu.osp=0;\r |
137 | PicoCpu.srh =0x27; // Supervisor mode\r |
138 | PicoCpu.flags=4; // Z set\r |
139 | PicoCpu.irq=0;\r |
140 | PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer\r |
141 | PicoCpu.membase=0;\r |
142 | PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter\r |
143 | #endif\r |
144 | #ifdef EMU_A68K\r |
145 | // Reset CPU: fetch SP and PC\r |
146 | M68000_regs.srh=0x27; // Supervisor mode\r |
147 | M68000_regs.a[7]=PicoRead32(0);\r |
148 | M68000_regs.pc =PicoRead32(4);\r |
149 | PicoInitPc(M68000_regs.pc);\r |
150 | #endif\r |
151 | #ifdef EMU_M68K\r |
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152 | m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r |
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153 | m68ki_cpu.sp[0]=0;\r |
154 | m68k_set_irq(0);\r |
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155 | m68k_pulse_reset();\r |
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156 | #endif\r |
157 | \r |
158 | return 0;\r |
159 | }\r |
160 | \r |
161 | \r |
162 | int SekInterrupt(int irq)\r |
163 | {\r |
164 | #ifdef EMU_C68K\r |
165 | PicoCpu.irq=irq;\r |
166 | #endif\r |
167 | #ifdef EMU_A68K\r |
168 | M68000_regs.irq=irq; // raise irq (gets lowered after taken)\r |
169 | #endif\r |
170 | #ifdef EMU_M68K\r |
171 | {\r |
172 | void *oldcontext = m68ki_cpu_p;\r |
173 | m68k_set_context(&PicoM68kCPU);\r |
174 | m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r |
175 | m68k_set_context(oldcontext);\r |
176 | }\r |
177 | #endif\r |
178 | return 0;\r |
179 | }\r |
180 | \r |
181 | //int SekPc() { return PicoCpu.pc-PicoCpu.membase; }\r |
182 | //int SekPc() { return M68000_regs.pc; }\r |
183 | //int SekPc() { return m68k_get_reg(NULL, M68K_REG_PC); }\r |
184 | \r |
185 | void SekState(unsigned char *data)\r |
186 | {\r |
187 | #ifdef EMU_C68K\r |
188 | memcpy(data,PicoCpu.d,0x44);\r |
189 | #elif defined(EMU_A68K)\r |
190 | memcpy(data, M68000_regs.d, 0x40);\r |
191 | memcpy(data+0x40,&M68000_regs.pc,0x04);\r |
192 | #elif defined(EMU_M68K)\r |
193 | memcpy(data, PicoM68kCPU.dar,0x40);\r |
194 | memcpy(data+0x40,&PicoM68kCPU.pc, 0x04);\r |
195 | #endif\r |
196 | }\r |
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197 | \r |
198 | void SekSetRealTAS(int use_real)\r |
199 | {\r |
200 | #ifdef EMU_C68K\r |
201 | CycloneSetRealTAS(use_real);\r |
202 | #endif\r |
203 | }\r |
204 | \r |