cc68a136 |
1 | #include "PicoInt.h"\r |
2 | \r |
3 | typedef unsigned char u8;\r |
4 | \r |
5 | static unsigned int pppc, ops=0;\r |
6 | extern unsigned int lastread_a, lastread_d[16], lastwrite_cyc_d[16], lastwrite_mus_d[16];\r |
7 | extern int lrp_cyc, lrp_mus, lwp_cyc, lwp_mus;\r |
8 | unsigned int old_regs[16], old_sr, ppop;\r |
9 | \r |
10 | //static\r |
11 | void dumpPCandExit()\r |
12 | {\r |
13 | char buff[128];\r |
14 | int i;\r |
15 | \r |
16 | m68k_disassemble(buff, pppc, M68K_CPU_TYPE_68000);\r |
17 | dprintf("PC: %06x: %04x: %s", pppc, ppop, buff);\r |
18 | for(i=0; i < 8; i++)\r |
19 | dprintf("d%i=%08x, a%i=%08x | d%i=%08x, a%i=%08x", i, PicoCpu.d[i], i, PicoCpu.a[i], i, old_regs[i], i, old_regs[i+8]);\r |
20 | dprintf("SR: %04x | %04x (??s? 0iii 000x nzvc)", CycloneGetSr(&PicoCpu), old_sr);\r |
21 | dprintf("last_read: %08x @ %06x", lastread_d[--lrp_cyc&15], lastread_a);\r |
22 | dprintf("ops done: %i", ops);\r |
23 | exit(1);\r |
24 | }\r |
25 | \r |
26 | int CM_compareRun(int cyc)\r |
27 | {\r |
28 | char *str;\r |
29 | int cyc_done=0, cyc_cyclone, cyc_musashi, err=0;\r |
30 | unsigned int i, mu_sr;\r |
31 | \r |
32 | lrp_cyc = lrp_mus = 0;\r |
33 | \r |
34 | while(cyc > cyc_done) {\r |
35 | pppc = SekPc;\r |
36 | ppop = m68k_read_disassembler_16(pppc);\r |
37 | memcpy(old_regs, PicoCpu.d, 4*16);\r |
38 | old_sr = CycloneGetSr(&PicoCpu);\r |
39 | \r |
40 | PicoCpu.cycles=1;\r |
41 | CycloneRun(&PicoCpu);\r |
42 | cyc_cyclone=1-PicoCpu.cycles;\r |
43 | cyc_musashi=m68k_execute(1);\r |
44 | \r |
45 | if(cyc_cyclone != cyc_musashi) {\r |
46 | dprintf("cycles: %i vs %i", cyc_cyclone, cyc_musashi);\r |
47 | err=1;\r |
48 | }\r |
49 | \r |
50 | if(lrp_cyc != lrp_mus) {\r |
51 | dprintf("lrp: %i vs %i", lrp_cyc&15, lrp_mus&15);\r |
52 | err=1;\r |
53 | }\r |
54 | \r |
55 | if(lwp_cyc != lwp_mus) {\r |
56 | dprintf("lwp: %i vs %i", lwp_cyc&15, lwp_mus&15);\r |
57 | err=1;\r |
58 | }\r |
59 | \r |
60 | for(i=0; i < 16; i++) {\r |
61 | if(lastwrite_cyc_d[i] != lastwrite_mus_d[i]) {\r |
62 | dprintf("lastwrite: [%i]= %08x vs %08x", i, lastwrite_cyc_d[i], lastwrite_mus_d[i]);\r |
63 | err=1;\r |
64 | break;\r |
65 | }\r |
66 | }\r |
67 | \r |
68 | // compare PC\r |
69 | if( SekPc != (m68ki_cpu.pc&0xffffff) ) {\r |
70 | dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc&0xffffff);\r |
71 | err=1;\r |
72 | }\r |
73 | \r |
74 | #if 0\r |
75 | if( SekPc > Pico.romsize || SekPc < 0x200 ) {\r |
76 | dprintf("PC out of bounds: %06x", SekPc);\r |
77 | err=1;\r |
78 | }\r |
79 | #endif\r |
80 | \r |
81 | // compare regs\r |
82 | for(i=0; i < 16; i++) {\r |
83 | if(PicoCpu.d[i] != m68ki_cpu.dar[i]) {\r |
84 | str = (i < 8) ? "d" : "a";\r |
85 | dprintf("reg: %s%i: %08x vs %08x", str, i&7, PicoCpu.d[i], m68ki_cpu.dar[i]);\r |
86 | err=1;\r |
87 | break;\r |
88 | }\r |
89 | }\r |
90 | \r |
91 | // SR\r |
92 | if((CycloneGetSr(&PicoCpu)) != (mu_sr = m68k_get_reg(NULL, M68K_REG_SR))) {\r |
93 | dprintf("SR: %04x vs %04x (??s? 0iii 000x nzvc)", CycloneGetSr(&PicoCpu), mu_sr);\r |
94 | err=1;\r |
95 | }\r |
96 | \r |
97 | // IRQl\r |
98 | if(PicoCpu.irq != (m68ki_cpu.int_level>>8)) {\r |
99 | dprintf("IRQ: %i vs %i", PicoCpu.irq, (m68ki_cpu.int_level>>8));\r |
100 | err=1;\r |
101 | }\r |
102 | \r |
103 | // OSP/USP\r |
104 | if(PicoCpu.osp != m68ki_cpu.sp[((mu_sr>>11)&4)^4]) {\r |
105 | dprintf("OSP: %06x vs %06x", PicoCpu.osp, m68ki_cpu.sp[0]);\r |
106 | err=1;\r |
107 | }\r |
108 | \r |
109 | // stopped\r |
110 | if((PicoCpu.stopped && !m68ki_cpu.stopped) || (!PicoCpu.stopped && m68ki_cpu.stopped)) {\r |
111 | dprintf("stopped: %i vs %i", PicoCpu.stopped, m68ki_cpu.stopped);\r |
112 | err=1;\r |
113 | }\r |
114 | \r |
115 | if(err) dumpPCandExit();\r |
116 | \r |
117 | #if 0\r |
118 | m68k_set_reg(M68K_REG_SR, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); // broken\r |
119 | CycloneSetSr(&PicoCpu, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000));\r |
120 | PicoCpu.stopped = m68ki_cpu.stopped = 0;\r |
121 | if(SekPc > 0x400 && (PicoCpu.a[7] < 0xff0000 || PicoCpu.a[7] > 0xffffff)) \r |
122 | PicoCpu.a[7] = m68ki_cpu.dar[15] = 0xff8000;\r |
123 | #endif\r |
124 | \r |
125 | cyc_done += cyc_cyclone;\r |
126 | ops++;\r |
127 | }\r |
128 | \r |
129 | return cyc_done;\r |
130 | }\r |