f8ef8ff7 |
1 | |
2 | // register names |
3 | enum { |
4 | SSP_GR0, SSP_X, SSP_Y, SSP_A, |
5 | SSP_ST, SSP_STACK, SSP_PC, SSP_P, |
6 | SSP_PM0, SSP_PM1, SSP_PM2, SSP_XST, |
7 | SSP_PM4, SSP_gr13, SSP_PMC, SSP_AL |
8 | }; |
9 | |
10 | typedef union |
11 | { |
12 | unsigned int v; |
13 | struct { |
14 | unsigned short l; |
15 | unsigned short h; |
16 | }; |
17 | } ssp_reg_t; |
18 | |
19 | typedef struct |
20 | { |
21 | union { |
22 | unsigned short RAM[256*2]; // 2 internal RAM banks |
23 | struct { |
24 | unsigned short RAM0[256]; |
25 | unsigned short RAM1[256]; |
26 | }; |
27 | }; |
28 | ssp_reg_t gr[16]; // general registers |
29 | union { |
30 | unsigned char r[8]; // BANK pointers |
31 | struct { |
32 | unsigned char r0[4]; |
33 | unsigned char r1[4]; |
34 | }; |
35 | }; |
36 | unsigned short stack[6]; |
37 | // |
38 | #define SSP_PMC_HAVE_ADDR 1 // address written to PMAC, waiting for mode |
39 | unsigned int emu_status; |
40 | unsigned int pad[10]; |
41 | } ssp1601_t; |
42 | |
43 | |
44 | void ssp1601_reset(ssp1601_t *ssp); |
45 | void ssp1601_run(ssp1601_t *ssp, int cycles); |
46 | |