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1 | @ vim:filetype=armasm |
2 | |
3 | .if 0 |
4 | #include "compiler.h" |
5 | .endif |
6 | |
7 | .global tcache |
8 | |
9 | .global flush_inval_caches |
10 | .global regfile_load |
11 | .global regfile_store |
12 | |
13 | @ translation cache buffer |
14 | .text |
15 | .align 12 @ 4096 |
16 | .size tcache, TCACHE_SIZE |
17 | tcache: |
18 | .space TCACHE_SIZE |
19 | |
20 | |
21 | .text |
22 | .align 2 |
23 | |
24 | |
25 | flush_inval_caches: |
26 | mov r2, #0x0 @ must be 0 |
27 | swi 0x9f0002 |
28 | bx lr |
29 | |
30 | |
31 | @ SSP_GR0, SSP_X, SSP_Y, SSP_A, |
32 | @ SSP_ST, SSP_STACK, SSP_PC, SSP_P, |
33 | @ SSP_PM0, SSP_PM1, SSP_PM2, SSP_XST, |
34 | @ SSP_PM4, SSP_gr13, SSP_PMC, SSP_AL |
35 | |
36 | @ register map: |
37 | @ r4: XXYY |
38 | @ r5: A |
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39 | @ r6: STACK and emu flags: sss0 * .uu. .lll NZCV (NZCV is PSR bits from ARM) |
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40 | @ r7: SSP context |
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41 | @ r8: r0-r2 (.210) |
42 | @ r9: r4-r6 (.654) |
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43 | @ r10: P |
44 | @ r11: cycles |
45 | |
46 | @ trashes r2,r3 |
47 | |
48 | regfile_load: |
49 | ldr r7, =ssp |
50 | ldr r7, [r7] |
51 | add r2, r7, #0x400 |
52 | add r2, r2, #4 |
53 | ldmia r2, {r3,r4,r5,r6,r8} |
54 | mov r3, r3, lsr #16 |
55 | mov r3, r3, lsl #16 |
56 | orr r4, r3, r4, lsr #16 @ XXYY |
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57 | |
58 | and r8, r8, #0x0f0000 |
59 | mov r8, r8, lsl #13 @ sss0 * |
60 | and r9, r6, #0x670000 |
61 | tst r6, #0x80000000 |
62 | orrne r8, r8, #0x8 |
63 | tst r6, #0x20000000 |
64 | orrne r8, r8, #0x4 @ sss0 * NZ.. |
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65 | orr r6, r8, r9, lsr #12 @ sss0 * .uu. .lll NZ.. |
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66 | |
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67 | ldr r8, [r7, #0x440] @ r0-r2 |
68 | ldr r9, [r7, #0x444] @ r4-r6 |
69 | ldr r10,[r7, #(0x400+7*4)] @ P |
70 | bx lr |
71 | |
72 | |
73 | regfile_store: |
74 | str r10,[r7, #(0x400+7*4)] @ P |
75 | str r8, [r7, #0x440] @ r0-r2 |
76 | str r9, [r7, #0x444] @ r4-r6 |
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77 | |
78 | mov r9, r6, lsr #13 |
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79 | and r9, r9, #(7<<16) @ STACK |
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80 | mov r3, r6, lsl #28 |
81 | msr cpsr_flg, r3 @ to to ARM PSR |
82 | and r6, r6, #0x670 |
83 | mov r6, r6, lsl #12 |
84 | orrmi r6, r6, #0x80000000 @ N |
85 | orreq r6, r6, #0x20000000 @ Z |
86 | |
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87 | mov r3, r4, lsl #16 @ Y |
88 | mov r2, r4, lsr #16 |
89 | mov r2, r2, lsl #16 @ X |
90 | add r8, r7, #0x400 |
91 | add r8, r8, #4 |
92 | stmia r8, {r2,r3,r5,r6,r9} |
93 | bx lr |
94 | |
95 | |
96 | |