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ISO loading, menus, LEDs
[picodrive.git] / Pico / cd / LC89510.c
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bf098bc5 1/***********************************************************\r
2 * *\r
3 * This source is taken from the Gens project *\r
4 * Written by Stéphane Dallongeville *\r
5 * Copyright (c) 2002 by Stéphane Dallongeville *\r
6 * Modified/adapted for Picodrive by notaz, 2007 *\r
7 * *\r
8 ***********************************************************/\r
cc68a136 9\r
10#include "../PicoInt.h"\r
11\r
12#define cdprintf printf\r
13//#define cdprintf(x...)\r
14\r
15\r
16#define CDC_DMA_SPEED 256\r
17\r
18int CDC_Decode_Reg_Read;\r
bf098bc5 19static int Status_CDC; // internal status (TODO: 2 context?)\r
cc68a136 20\r
21\r
22static void CDD_Reset(void)\r
23{\r
24 // Reseting CDD\r
25\r
26 memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r
27 Pico_mcd->cdd.Status = 0;\r
28 Pico_mcd->cdd.Minute = 0;\r
29 Pico_mcd->cdd.Seconde = 0;\r
30 Pico_mcd->cdd.Frame = 0;\r
31 Pico_mcd->cdd.Ext = 0;\r
32\r
33 // clear receive status and transfer command\r
34 memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r
35 Pico_mcd->s68k_regs[0x38+9] = 0xF; // Default checksum\r
36}\r
37\r
38\r
39static void CDC_Reset(void)\r
40{\r
41 // Reseting CDC\r
42\r
43 memset(Pico_mcd->cdc.Buffer, 0, (16 * 1024 * 2) + 2352);\r
44\r
45 CDC_Update_Header();\r
46\r
47 Pico_mcd->cdc.COMIN = 0;\r
48 Pico_mcd->cdc.IFSTAT = 0xFF;\r
49 Pico_mcd->cdc.DAC.N = 0;\r
50 Pico_mcd->cdc.DBC.N = 0;\r
51 Pico_mcd->cdc.HEAD.N = 0x01000000;\r
52 Pico_mcd->cdc.PT.N = 0;\r
53 Pico_mcd->cdc.WA.N = 2352 * 2;\r
54 Pico_mcd->cdc.STAT.N = 0x00000080;\r
55 Pico_mcd->cdc.SBOUT = 0;\r
56 Pico_mcd->cdc.IFCTRL = 0;\r
57 Pico_mcd->cdc.CTRL.N = 0;\r
58\r
59 CDC_Decode_Reg_Read = 0;\r
60 Status_CDC = 0;\r
61}\r
62\r
63\r
64void LC89510_Reset(void)\r
65{\r
66 CDD_Reset();\r
67 CDC_Reset();\r
68\r
69 Pico_mcd->cdc.Host_Data = 0;\r
70 Pico_mcd->cdc.DMA_Adr = 0;\r
71 Pico_mcd->cdc.Stop_Watch = 0;\r
72}\r
73\r
cc68a136 74\r
bf098bc5 75void Update_CDC_TRansfer(int which)\r
76{\r
77 unsigned int dep, length, len;\r
78 unsigned short *dest;\r
79 unsigned char *src;\r
cc68a136 80\r
81 if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
82 {\r
bf098bc5 83 length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
84 Status_CDC &= ~0x08; // Last transfer\r
85 Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
86 Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
87 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
cc68a136 88\r
bf098bc5 89 if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Trasnfer End Interrupt Enable ?\r
cc68a136 90 {\r
91 Pico_mcd->cdc.IFSTAT &= ~0x40;\r
92\r
bf098bc5 93 if (Pico_mcd->s68k_regs[0x33] & (1<<5))\r
94 {\r
95 dprintf("cdc DTE irq 5");\r
96 SekInterruptS68k(5);\r
97 }\r
cc68a136 98 }\r
99 }\r
bf098bc5 100 else length = CDC_DMA_SPEED;\r
101\r
cc68a136 102\r
bf098bc5 103 // TODO: dst bounds checking? DAC.N alignment?\r
104 src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
cc68a136 105\r
106\r
bf098bc5 107 if (which == 7) // WORD RAM\r
cc68a136 108 {\r
bf098bc5 109 if (Pico_mcd->s68k_regs[3] & 4)\r
cc68a136 110 {\r
bf098bc5 111 dep = ((Pico_mcd->cdc.DMA_Adr & 0x3FFF) << 3);\r
112 cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
113 Pico_mcd->cdc.DAC.N, dep, length);\r
114\r
115 dep = ((Pico_mcd->cdc.DMA_Adr & 0x3FFF) << 4);\r
116 if (!(Pico_mcd->s68k_regs[3]&1)) dep += 2;\r
117 dest = (unsigned short *) (Pico_mcd->word_ram + dep);\r
118\r
119 for (len = length; len > 0; len--, src+=2, dest+=2)\r
120 *dest = (src[0]<<8) | src[1];\r
cc68a136 121 }\r
bf098bc5 122 else\r
123 {\r
124 dep = ((Pico_mcd->cdc.DMA_Adr & 0x7FFF) << 3);\r
125 cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
126 Pico_mcd->cdc.DAC.N, dep, length);\r
127 dest = (unsigned short *) (Pico_mcd->word_ram + dep);\r
cc68a136 128\r
bf098bc5 129 for (len = length; len > 0; len--, src+=2, dest++)\r
130 *dest = (src[0]<<8) | src[1];\r
131 }\r
cc68a136 132 }\r
bf098bc5 133 else if (which == 4) // PCM RAM\r
cc68a136 134 {\r
bf098bc5 135#if 0\r
136 dest = (unsigned char *) Ram_PCM;\r
137 dep = ((Pico_mcd->cdc.DMA_Adr & 0x03FF) << 2) + PCM_Chip.Bank;\r
138#else\r
139 cdprintf("TODO: PCM Dma");\r
140#endif\r
141 }\r
142 else if (which == 5) // PRG RAM\r
143 {\r
144 dep = (Pico_mcd->cdc.DMA_Adr & 0xFFFF) << 3;\r
145 dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
146 cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
147 Pico_mcd->cdc.DAC.N, dep, length);\r
cc68a136 148\r
bf098bc5 149 for (len = length; len > 0; len--, src+=2, dest++)\r
150 *dest = (src[0]<<8) | src[1];\r
cc68a136 151 }\r
152\r
bf098bc5 153 length <<= 1;\r
154 Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
155 if (Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
cc68a136 156 else Pico_mcd->cdc.DBC.N = 0;\r
157}\r
cc68a136 158\r
159\r
160unsigned short Read_CDC_Host(int is_sub)\r
161{\r
162 int addr;\r
163\r
164 if (!(Status_CDC & 0x08))\r
165 {\r
166 // Transfer data disabled\r
167 return 0;\r
168 }\r
169\r
170 if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||\r
171 (!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
172 {\r
173 // Wrong setting\r
174 return 0;\r
175 }\r
176\r
177 Pico_mcd->cdc.DBC.N -= 2;\r
178\r
179 if (Pico_mcd->cdc.DBC.N <= 0)\r
180 {\r
181 Pico_mcd->cdc.DBC.N = 0;\r
182 Status_CDC &= ~0x08; // Last transfer\r
183 Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
184 Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
185 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
186\r
187 if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Transfer End Interrupt Enable ?\r
188 {\r
189 Pico_mcd->cdc.IFSTAT &= ~0x40;\r
190\r
191 if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r
192 dprintf("m68k: s68k irq 5");\r
193 SekInterruptS68k(5);\r
194 }\r
195\r
196 cdprintf("CDC - DTE interrupt\n");\r
197 }\r
198 }\r
199\r
200 addr = Pico_mcd->cdc.DAC.N;\r
201 Pico_mcd->cdc.DAC.N += 2;\r
202 return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
203\r
204#if 0\r
205 __asm\r
206 {\r
207 mov esi, Pico_mcd->cdc.DAC.N\r
208 lea ebx, Pico_mcd->cdc.Buffer\r
209// and esi, 0x3FFF\r
210 mov ax, [ebx + esi]\r
211 add esi, 2\r
212 rol ax, 8\r
213 mov Pico_mcd->cdc.DAC.N, esi\r
214 mov val, ax\r
215 }\r
216#endif\r
217}\r
218\r
219\r
220void CDC_Update_Header(void)\r
221{\r
222 if (Pico_mcd->cdc.CTRL.B.B1 & 0x01) // Sub-Header wanted ?\r
223 {\r
224 Pico_mcd->cdc.HEAD.B.B0 = 0;\r
225 Pico_mcd->cdc.HEAD.B.B1 = 0;\r
226 Pico_mcd->cdc.HEAD.B.B2 = 0;\r
227 Pico_mcd->cdc.HEAD.B.B3 = 0;\r
228 }\r
229 else\r
230 {\r
231 _msf MSF;\r
232\r
233 LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
234\r
235 Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r
236 Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r
237 Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r
238 Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r
239 }\r
240}\r
241\r
242\r
243unsigned char CDC_Read_Reg(void)\r
244{\r
245 unsigned char ret;\r
246\r
247 cdprintf("CDC read reg %.2d = ", Pico_mcd->s68k_regs[5] & 0xF);\r
248\r
249 switch(Pico_mcd->s68k_regs[5] & 0xF)\r
250 {\r
251 case 0x0: // COMIN\r
252 cdprintf("%.2X\n", Pico_mcd->cdc.COMIN);\r
253\r
254 Pico_mcd->s68k_regs[5] = 0x1;\r
255 return Pico_mcd->cdc.COMIN;\r
256\r
257 case 0x1: // IFSTAT\r
258 cdprintf("%.2X\n", Pico_mcd->cdc.IFSTAT);\r
259\r
260 CDC_Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)\r
261 Pico_mcd->s68k_regs[5] = 0x2;\r
262 return Pico_mcd->cdc.IFSTAT;\r
263\r
264 case 0x2: // DBCL\r
265 cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.L);\r
266\r
267 Pico_mcd->s68k_regs[5] = 0x3;\r
268 return Pico_mcd->cdc.DBC.B.L;\r
269\r
270 case 0x3: // DBCH\r
271 cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.H);\r
272\r
273 Pico_mcd->s68k_regs[5] = 0x4;\r
274 return Pico_mcd->cdc.DBC.B.H;\r
275\r
276 case 0x4: // HEAD0\r
277 cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B0);\r
278\r
279 CDC_Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)\r
280 Pico_mcd->s68k_regs[5] = 0x5;\r
281 return Pico_mcd->cdc.HEAD.B.B0;\r
282\r
283 case 0x5: // HEAD1\r
284 cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B1);\r
285\r
286 CDC_Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)\r
287 Pico_mcd->s68k_regs[5] = 0x6;\r
288 return Pico_mcd->cdc.HEAD.B.B1;\r
289\r
290 case 0x6: // HEAD2\r
291 cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B2);\r
292\r
293 CDC_Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)\r
294 Pico_mcd->s68k_regs[5] = 0x7;\r
295 return Pico_mcd->cdc.HEAD.B.B2;\r
296\r
297 case 0x7: // HEAD3\r
298 cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B3);\r
299\r
300 CDC_Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)\r
301 Pico_mcd->s68k_regs[5] = 0x8;\r
302 return Pico_mcd->cdc.HEAD.B.B3;\r
303\r
304 case 0x8: // PTL\r
305 cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.L);\r
306\r
307 CDC_Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)\r
308 Pico_mcd->s68k_regs[5] = 0x9;\r
309 return Pico_mcd->cdc.PT.B.L;\r
310\r
311 case 0x9: // PTH\r
312 cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.H);\r
313\r
314 CDC_Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)\r
315 Pico_mcd->s68k_regs[5] = 0xA;\r
316 return Pico_mcd->cdc.PT.B.H;\r
317\r
318 case 0xA: // WAL\r
319 cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.L);\r
320\r
321 Pico_mcd->s68k_regs[5] = 0xB;\r
322 return Pico_mcd->cdc.WA.B.L;\r
323\r
324 case 0xB: // WAH\r
325 cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.H);\r
326\r
327 Pico_mcd->s68k_regs[5] = 0xC;\r
328 return Pico_mcd->cdc.WA.B.H;\r
329\r
330 case 0xC: // STAT0\r
331 cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B0);\r
332\r
333 CDC_Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)\r
334 Pico_mcd->s68k_regs[5] = 0xD;\r
335 return Pico_mcd->cdc.STAT.B.B0;\r
336\r
337 case 0xD: // STAT1\r
338 cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B1);\r
339\r
340 CDC_Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)\r
341 Pico_mcd->s68k_regs[5] = 0xE;\r
342 return Pico_mcd->cdc.STAT.B.B1;\r
343\r
344 case 0xE: // STAT2\r
345 cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B2);\r
346\r
347 CDC_Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)\r
348 Pico_mcd->s68k_regs[5] = 0xF;\r
349 return Pico_mcd->cdc.STAT.B.B2;\r
350\r
351 case 0xF: // STAT3\r
352 cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B3);\r
353\r
354 ret = Pico_mcd->cdc.STAT.B.B3;\r
355 Pico_mcd->cdc.IFSTAT |= 0x20; // decoding interrupt flag cleared\r
356 if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
357 {\r
358 if ((CDC_Decode_Reg_Read & 0x73F2) == 0x73F2)\r
359 Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
360 }\r
361 return ret;\r
362 }\r
363\r
364 return 0;\r
365}\r
366\r
367\r
368void CDC_Write_Reg(unsigned char Data)\r
369{\r
370 cdprintf("CDC write reg%d = %.2X\n", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
371\r
372 switch (Pico_mcd->s68k_regs[5] & 0xF)\r
373 {\r
374 case 0x0: // SBOUT\r
375 Pico_mcd->s68k_regs[5] = 0x1;\r
376 Pico_mcd->cdc.SBOUT = Data;\r
377\r
378 break;\r
379\r
380 case 0x1: // IFCTRL\r
381 Pico_mcd->s68k_regs[5] = 0x2;\r
382 Pico_mcd->cdc.IFCTRL = Data;\r
383\r
384 if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer\r
385 {\r
386 Pico_mcd->cdc.DBC.N = 0;\r
387 Status_CDC &= ~0x08;\r
388 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
389 }\r
390 break;\r
391\r
392 case 0x2: // DBCL\r
393 Pico_mcd->s68k_regs[5] = 0x3;\r
394 Pico_mcd->cdc.DBC.B.L = Data;\r
395\r
396 break;\r
397\r
398 case 0x3: // DBCH\r
399 Pico_mcd->s68k_regs[5] = 0x4;\r
400 Pico_mcd->cdc.DBC.B.H = Data;\r
401\r
402 break;\r
403\r
404 case 0x4: // DACL\r
405 Pico_mcd->s68k_regs[5] = 0x5;\r
406 Pico_mcd->cdc.DAC.B.L = Data;\r
407\r
408 break;\r
409\r
410 case 0x5: // DACH\r
411 Pico_mcd->s68k_regs[5] = 0x6;\r
412 Pico_mcd->cdc.DAC.B.H = Data;\r
413\r
414 break;\r
415\r
416 case 0x6: // DTTRG\r
417 if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?\r
418 {\r
419 Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress\r
420 Status_CDC |= 0x08; // Data transfer in progress\r
421 Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start\r
422\r
423 cdprintf("\n************** Starting Data Transfer ***********\n");\r
424 cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
425 Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, Pico_mcd->cdc.DMA_Adr);\r
426 }\r
427 break;\r
428\r
429 case 0x7: // DTACK\r
430 Pico_mcd->cdc.IFSTAT |= 0x40; // end data transfer interrupt flag cleared\r
431 break;\r
432\r
433 case 0x8: // WAL\r
434 Pico_mcd->s68k_regs[5] = 0x9;\r
435 Pico_mcd->cdc.WA.B.L = Data;\r
436\r
437 break;\r
438\r
439 case 0x9: // WAH\r
440 Pico_mcd->s68k_regs[5] = 0xA;\r
441 Pico_mcd->cdc.WA.B.H = Data;\r
442\r
443 break;\r
444\r
445 case 0xA: // CTRL0\r
446 Pico_mcd->s68k_regs[5] = 0xB;\r
447 Pico_mcd->cdc.CTRL.B.B0 = Data;\r
448\r
449 break;\r
450\r
451 case 0xB: // CTRL1\r
452 Pico_mcd->s68k_regs[5] = 0xC;\r
453 Pico_mcd->cdc.CTRL.B.B1 = Data;\r
454\r
455 break;\r
456\r
457 case 0xC: // PTL\r
458 Pico_mcd->s68k_regs[5] = 0xD;\r
459 Pico_mcd->cdc.PT.B.L = Data;\r
460\r
461 break;\r
462\r
463 case 0xD: // PTH\r
464 Pico_mcd->s68k_regs[5] = 0xE;\r
465 Pico_mcd->cdc.PT.B.H = Data;\r
466\r
467 break;\r
468\r
469 case 0xE: // CTRL2\r
470 Pico_mcd->cdc.CTRL.B.B2 = Data;\r
471 break;\r
472\r
473 case 0xF: // RESET\r
474 CDC_Reset();\r
475 break;\r
476 }\r
477}\r
478\r
479\r
480static int bswapwrite(int a, unsigned short d)\r
481{\r
482 *(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);\r
483 return d + (d >> 8);\r
484}\r
485\r
486void CDD_Export_Status(void)\r
487{\r
488 unsigned int csum;\r
489\r
490 csum = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r
491 csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r
492 csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r
493 csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r
494 Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r
495 csum += Pico_mcd->cdd.Ext;\r
496 Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r
497\r
672ad671 498 Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
cc68a136 499\r
500 if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r
501 {\r
502 dprintf("cdd export irq 4");\r
503 SekInterruptS68k(4);\r
504 }\r
505\r
506 cdprintf("CDD exported status\n");\r
507 cdprintf("Status =%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r
508 (Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
509 (Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
510 (Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
511 (Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],\r
512 (Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);\r
513}\r
514\r
515\r
516void CDD_Import_Command(void)\r
517{\r
518 cdprintf("CDD importing command\n");\r
519 cdprintf("Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r
520 (Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
521 (Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
522 (Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
523 (Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],\r
524 (Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);\r
525\r
526 switch (Pico_mcd->s68k_regs[0x38+10+0])\r
527 {\r
528 case 0x0: // STATUS (?)\r
529 Get_Status_CDD_c0();\r
530 break;\r
531\r
532 case 0x1: // STOP ALL (?)\r
533 Stop_CDD_c1();\r
534 break;\r
535\r
536 case 0x2: // GET TOC INFORMATIONS\r
537 switch(Pico_mcd->s68k_regs[0x38+10+3])\r
538 {\r
539 case 0x0: // get current position (MSF format)\r
540 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r
541 Get_Pos_CDD_c20();\r
542 break;\r
543\r
544 case 0x1: // get elapsed time of current track played/scanned (relative MSF format)\r
545 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;\r
546 Get_Track_Pos_CDD_c21();\r
547 break;\r
548\r
549 case 0x2: // get current track in RS2-RS3\r
550 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 2;\r
551 Get_Current_Track_CDD_c22();\r
552 break;\r
553\r
bf098bc5 554 case 0x3: // get total length (MSF format)\r
cc68a136 555 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;\r
556 Get_Total_Lenght_CDD_c23();\r
557 break;\r
558\r
559 case 0x4: // first & last track number\r
560 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;\r
561 Get_First_Last_Track_CDD_c24();\r
562 break;\r
563\r
564 case 0x5: // get track addresse (MSF format)\r
565 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;\r
566 Get_Track_Adr_CDD_c25();\r
567 break;\r
568\r
569 default : // invalid, then we return status\r
570 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;\r
571 Get_Status_CDD_c0();\r
572 break;\r
573 }\r
574 break;\r
575\r
576 case 0x3: // READ\r
577 Play_CDD_c3();\r
578 break;\r
579\r
580 case 0x4: // SEEK\r
581 Seek_CDD_c4();\r
582 break;\r
583\r
584 case 0x6: // PAUSE/STOP\r
585 Pause_CDD_c6();\r
586 break;\r
587\r
588 case 0x7: // RESUME\r
589 Resume_CDD_c7();\r
590 break;\r
591\r
592 case 0x8: // FAST FOWARD\r
593 Fast_Foward_CDD_c8();\r
594 break;\r
595\r
596 case 0x9: // FAST REWIND\r
597 Fast_Rewind_CDD_c9();\r
598 break;\r
599\r
600 case 0xA: // RECOVER INITIAL STATE (?)\r
601 CDD_cA();\r
602 break;\r
603\r
604 case 0xC: // CLOSE TRAY\r
605 Close_Tray_CDD_cC();\r
606 break;\r
607\r
608 case 0xD: // OPEN TRAY\r
609 Open_Tray_CDD_cD();\r
610 break;\r
611\r
612 default: // UNKNOWN\r
613 CDD_Def();\r
614 break;\r
615 }\r
616}\r
617\r
fast MegaDrive/MegaCD/32X emulator