cc68a136 |
1 | #if 0\r |
2 | #include <stdio.h>\r |
3 | #include <windows.h>\r |
4 | #include "misc.h"\r |
5 | #include "lc89510.h"\r |
6 | #include "cd_aspi.h"\r |
7 | #include "Star_68k.h"\r |
8 | #include "mem_S68k.h"\r |
9 | #include "pcm.h"\r |
10 | #endif\r |
11 | \r |
12 | #include "../PicoInt.h"\r |
13 | \r |
14 | #define cdprintf printf\r |
15 | //#define cdprintf(x...)\r |
16 | \r |
17 | \r |
18 | #define CDC_DMA_SPEED 256\r |
19 | \r |
20 | int CDC_Decode_Reg_Read;\r |
21 | static int Status_CDC; // internal status\r |
22 | \r |
23 | \r |
24 | static void CDD_Reset(void)\r |
25 | {\r |
26 | // Reseting CDD\r |
27 | \r |
28 | memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r |
29 | Pico_mcd->cdd.Status = 0;\r |
30 | Pico_mcd->cdd.Minute = 0;\r |
31 | Pico_mcd->cdd.Seconde = 0;\r |
32 | Pico_mcd->cdd.Frame = 0;\r |
33 | Pico_mcd->cdd.Ext = 0;\r |
34 | \r |
35 | // clear receive status and transfer command\r |
36 | memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r |
37 | Pico_mcd->s68k_regs[0x38+9] = 0xF; // Default checksum\r |
38 | }\r |
39 | \r |
40 | \r |
41 | static void CDC_Reset(void)\r |
42 | {\r |
43 | // Reseting CDC\r |
44 | \r |
45 | memset(Pico_mcd->cdc.Buffer, 0, (16 * 1024 * 2) + 2352);\r |
46 | \r |
47 | CDC_Update_Header();\r |
48 | \r |
49 | Pico_mcd->cdc.COMIN = 0;\r |
50 | Pico_mcd->cdc.IFSTAT = 0xFF;\r |
51 | Pico_mcd->cdc.DAC.N = 0;\r |
52 | Pico_mcd->cdc.DBC.N = 0;\r |
53 | Pico_mcd->cdc.HEAD.N = 0x01000000;\r |
54 | Pico_mcd->cdc.PT.N = 0;\r |
55 | Pico_mcd->cdc.WA.N = 2352 * 2;\r |
56 | Pico_mcd->cdc.STAT.N = 0x00000080;\r |
57 | Pico_mcd->cdc.SBOUT = 0;\r |
58 | Pico_mcd->cdc.IFCTRL = 0;\r |
59 | Pico_mcd->cdc.CTRL.N = 0;\r |
60 | \r |
61 | CDC_Decode_Reg_Read = 0;\r |
62 | Status_CDC = 0;\r |
63 | }\r |
64 | \r |
65 | \r |
66 | void LC89510_Reset(void)\r |
67 | {\r |
68 | CDD_Reset();\r |
69 | CDC_Reset();\r |
70 | \r |
71 | Pico_mcd->cdc.Host_Data = 0;\r |
72 | Pico_mcd->cdc.DMA_Adr = 0;\r |
73 | Pico_mcd->cdc.Stop_Watch = 0;\r |
74 | }\r |
75 | \r |
76 | #if 0 // TODO\r |
77 | void Update_CDC_TRansfer(void)\r |
78 | {\r |
79 | unsigned int i, dep, lenght, add_dest;\r |
80 | unsigned char *dest;\r |
81 | \r |
82 | if ((Status_CDC & 0x08) == 0) return;\r |
83 | \r |
84 | switch(Pico_mcd->s68k_regs[4] & 7)\r |
85 | {\r |
86 | case 0x0200: // MAIN CPU\r |
87 | case 0x0300: // SUB CPU\r |
88 | Pico_mcd->s68k_regs[4] |= 0x40; // Data ready in host port\r |
89 | return;\r |
90 | \r |
91 | case 0x0400: // PCM RAM\r |
92 | dest = (unsigned char *) Ram_PCM;\r |
93 | dep = ((Pico_mcd->cdc.DMA_Adr & 0x03FF) << 2) + PCM_Chip.Bank;\r |
94 | add_dest = 2;\r |
95 | break;\r |
96 | \r |
97 | case 0x0500: // PRG RAM\r |
98 | dest = (unsigned char *) Ram_Prg;\r |
99 | dep = (Pico_mcd->cdc.DMA_Adr & 0xFFFF) << 3;\r |
100 | add_dest = 2;\r |
101 | // cdprintf("DMA transfer PRG RAM : adr = %.8X ", dep);\r |
102 | break;\r |
103 | \r |
104 | case 0x0700: // WORD RAM\r |
105 | if (Ram_Word_State >= 2)\r |
106 | {\r |
107 | dest = (unsigned char *) Ram_Word_1M;\r |
108 | add_dest = 2;\r |
109 | if (Ram_Word_State & 1) dep = ((Pico_mcd->cdc.DMA_Adr & 0x3FFF) << 3);\r |
110 | else dep = ((Pico_mcd->cdc.DMA_Adr & 0x3FFF) << 3) + 0x20000;\r |
111 | }\r |
112 | else\r |
113 | {\r |
114 | dest = (unsigned char *) Ram_Word_2M;\r |
115 | dep = ((Pico_mcd->cdc.DMA_Adr & 0x7FFF) << 3);\r |
116 | add_dest = 2;\r |
117 | }\r |
118 | break;\r |
119 | \r |
120 | default:\r |
121 | return;\r |
122 | }\r |
123 | \r |
124 | if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r |
125 | {\r |
126 | lenght = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r |
127 | Status_CDC &= ~0x08; // Last transfer\r |
128 | Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r |
129 | Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r |
130 | Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r |
131 | \r |
132 | if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Trasnfer End Interrupt Enable ?\r |
133 | {\r |
134 | Pico_mcd->cdc.IFSTAT &= ~0x40;\r |
135 | \r |
136 | if (Int_Mask_S68K & 0x20) sub68k_interrupt(5, -1);\r |
137 | \r |
138 | cdprintf("CDC - DTE interrupt\n");\r |
139 | }\r |
140 | }\r |
141 | else lenght = CDC_DMA_SPEED;\r |
142 | \r |
143 | // cdprintf("DMA lenght = %.4X\n", lenght);\r |
144 | \r |
145 | \r |
146 | if ((Pico_mcd->s68k_regs[4] & 7) == 4) // PCM DMA\r |
147 | {\r |
148 | __asm\r |
149 | {\r |
150 | mov ecx, lenght\r |
151 | mov edi, dest\r |
152 | lea esi, Pico_mcd->cdc.Buffer\r |
153 | add edi, dep\r |
154 | add esi, Pico_mcd->cdc.DAC.N\r |
155 | mov ebx, add_dest\r |
156 | \r |
157 | Loop_DMA_PCM:\r |
158 | mov ax, [esi]\r |
159 | add esi, 2\r |
160 | mov [edi], ax\r |
161 | add edi, ebx\r |
162 | dec ecx\r |
163 | jnz Loop_DMA_PCM\r |
164 | }\r |
165 | \r |
166 | lenght <<= 1;\r |
167 | Pico_mcd->cdc.DMA_Adr += lenght >> 2;\r |
168 | }\r |
169 | else // OTHER DMA\r |
170 | {\r |
171 | __asm\r |
172 | {\r |
173 | mov ecx, lenght\r |
174 | mov edi, dest\r |
175 | lea esi, Pico_mcd->cdc.Buffer\r |
176 | add edi, dep\r |
177 | add esi, Pico_mcd->cdc.DAC.N\r |
178 | mov ebx, add_dest\r |
179 | \r |
180 | Loop_DMA:\r |
181 | mov ax, [esi]\r |
182 | add esi, 2\r |
183 | rol ax, 8\r |
184 | mov [edi], ax\r |
185 | add edi, ebx\r |
186 | dec ecx\r |
187 | jnz Loop_DMA\r |
188 | }\r |
189 | \r |
190 | lenght <<= 1;\r |
191 | Pico_mcd->cdc.DMA_Adr += lenght >> 3;\r |
192 | }\r |
193 | \r |
194 | Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + lenght) & 0xFFFF;\r |
195 | if (Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= lenght;\r |
196 | else Pico_mcd->cdc.DBC.N = 0;\r |
197 | }\r |
198 | #endif\r |
199 | \r |
200 | \r |
201 | unsigned short Read_CDC_Host(int is_sub)\r |
202 | {\r |
203 | int addr;\r |
204 | \r |
205 | if (!(Status_CDC & 0x08))\r |
206 | {\r |
207 | // Transfer data disabled\r |
208 | return 0;\r |
209 | }\r |
210 | \r |
211 | if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||\r |
212 | (!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r |
213 | {\r |
214 | // Wrong setting\r |
215 | return 0;\r |
216 | }\r |
217 | \r |
218 | Pico_mcd->cdc.DBC.N -= 2;\r |
219 | \r |
220 | if (Pico_mcd->cdc.DBC.N <= 0)\r |
221 | {\r |
222 | Pico_mcd->cdc.DBC.N = 0;\r |
223 | Status_CDC &= ~0x08; // Last transfer\r |
224 | Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r |
225 | Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r |
226 | Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r |
227 | \r |
228 | if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Transfer End Interrupt Enable ?\r |
229 | {\r |
230 | Pico_mcd->cdc.IFSTAT &= ~0x40;\r |
231 | \r |
232 | if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r |
233 | dprintf("m68k: s68k irq 5");\r |
234 | SekInterruptS68k(5);\r |
235 | }\r |
236 | \r |
237 | cdprintf("CDC - DTE interrupt\n");\r |
238 | }\r |
239 | }\r |
240 | \r |
241 | addr = Pico_mcd->cdc.DAC.N;\r |
242 | Pico_mcd->cdc.DAC.N += 2;\r |
243 | return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r |
244 | \r |
245 | #if 0\r |
246 | __asm\r |
247 | {\r |
248 | mov esi, Pico_mcd->cdc.DAC.N\r |
249 | lea ebx, Pico_mcd->cdc.Buffer\r |
250 | // and esi, 0x3FFF\r |
251 | mov ax, [ebx + esi]\r |
252 | add esi, 2\r |
253 | rol ax, 8\r |
254 | mov Pico_mcd->cdc.DAC.N, esi\r |
255 | mov val, ax\r |
256 | }\r |
257 | #endif\r |
258 | }\r |
259 | \r |
260 | \r |
261 | void CDC_Update_Header(void)\r |
262 | {\r |
263 | if (Pico_mcd->cdc.CTRL.B.B1 & 0x01) // Sub-Header wanted ?\r |
264 | {\r |
265 | Pico_mcd->cdc.HEAD.B.B0 = 0;\r |
266 | Pico_mcd->cdc.HEAD.B.B1 = 0;\r |
267 | Pico_mcd->cdc.HEAD.B.B2 = 0;\r |
268 | Pico_mcd->cdc.HEAD.B.B3 = 0;\r |
269 | }\r |
270 | else\r |
271 | {\r |
272 | _msf MSF;\r |
273 | \r |
274 | LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r |
275 | \r |
276 | Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r |
277 | Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r |
278 | Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r |
279 | Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r |
280 | }\r |
281 | }\r |
282 | \r |
283 | \r |
284 | unsigned char CDC_Read_Reg(void)\r |
285 | {\r |
286 | unsigned char ret;\r |
287 | \r |
288 | cdprintf("CDC read reg %.2d = ", Pico_mcd->s68k_regs[5] & 0xF);\r |
289 | \r |
290 | switch(Pico_mcd->s68k_regs[5] & 0xF)\r |
291 | {\r |
292 | case 0x0: // COMIN\r |
293 | cdprintf("%.2X\n", Pico_mcd->cdc.COMIN);\r |
294 | \r |
295 | Pico_mcd->s68k_regs[5] = 0x1;\r |
296 | return Pico_mcd->cdc.COMIN;\r |
297 | \r |
298 | case 0x1: // IFSTAT\r |
299 | cdprintf("%.2X\n", Pico_mcd->cdc.IFSTAT);\r |
300 | \r |
301 | CDC_Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)\r |
302 | Pico_mcd->s68k_regs[5] = 0x2;\r |
303 | return Pico_mcd->cdc.IFSTAT;\r |
304 | \r |
305 | case 0x2: // DBCL\r |
306 | cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.L);\r |
307 | \r |
308 | Pico_mcd->s68k_regs[5] = 0x3;\r |
309 | return Pico_mcd->cdc.DBC.B.L;\r |
310 | \r |
311 | case 0x3: // DBCH\r |
312 | cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.H);\r |
313 | \r |
314 | Pico_mcd->s68k_regs[5] = 0x4;\r |
315 | return Pico_mcd->cdc.DBC.B.H;\r |
316 | \r |
317 | case 0x4: // HEAD0\r |
318 | cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B0);\r |
319 | \r |
320 | CDC_Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)\r |
321 | Pico_mcd->s68k_regs[5] = 0x5;\r |
322 | return Pico_mcd->cdc.HEAD.B.B0;\r |
323 | \r |
324 | case 0x5: // HEAD1\r |
325 | cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B1);\r |
326 | \r |
327 | CDC_Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)\r |
328 | Pico_mcd->s68k_regs[5] = 0x6;\r |
329 | return Pico_mcd->cdc.HEAD.B.B1;\r |
330 | \r |
331 | case 0x6: // HEAD2\r |
332 | cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B2);\r |
333 | \r |
334 | CDC_Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)\r |
335 | Pico_mcd->s68k_regs[5] = 0x7;\r |
336 | return Pico_mcd->cdc.HEAD.B.B2;\r |
337 | \r |
338 | case 0x7: // HEAD3\r |
339 | cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B3);\r |
340 | \r |
341 | CDC_Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)\r |
342 | Pico_mcd->s68k_regs[5] = 0x8;\r |
343 | return Pico_mcd->cdc.HEAD.B.B3;\r |
344 | \r |
345 | case 0x8: // PTL\r |
346 | cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.L);\r |
347 | \r |
348 | CDC_Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)\r |
349 | Pico_mcd->s68k_regs[5] = 0x9;\r |
350 | return Pico_mcd->cdc.PT.B.L;\r |
351 | \r |
352 | case 0x9: // PTH\r |
353 | cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.H);\r |
354 | \r |
355 | CDC_Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)\r |
356 | Pico_mcd->s68k_regs[5] = 0xA;\r |
357 | return Pico_mcd->cdc.PT.B.H;\r |
358 | \r |
359 | case 0xA: // WAL\r |
360 | cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.L);\r |
361 | \r |
362 | Pico_mcd->s68k_regs[5] = 0xB;\r |
363 | return Pico_mcd->cdc.WA.B.L;\r |
364 | \r |
365 | case 0xB: // WAH\r |
366 | cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.H);\r |
367 | \r |
368 | Pico_mcd->s68k_regs[5] = 0xC;\r |
369 | return Pico_mcd->cdc.WA.B.H;\r |
370 | \r |
371 | case 0xC: // STAT0\r |
372 | cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B0);\r |
373 | \r |
374 | CDC_Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)\r |
375 | Pico_mcd->s68k_regs[5] = 0xD;\r |
376 | return Pico_mcd->cdc.STAT.B.B0;\r |
377 | \r |
378 | case 0xD: // STAT1\r |
379 | cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B1);\r |
380 | \r |
381 | CDC_Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)\r |
382 | Pico_mcd->s68k_regs[5] = 0xE;\r |
383 | return Pico_mcd->cdc.STAT.B.B1;\r |
384 | \r |
385 | case 0xE: // STAT2\r |
386 | cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B2);\r |
387 | \r |
388 | CDC_Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)\r |
389 | Pico_mcd->s68k_regs[5] = 0xF;\r |
390 | return Pico_mcd->cdc.STAT.B.B2;\r |
391 | \r |
392 | case 0xF: // STAT3\r |
393 | cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B3);\r |
394 | \r |
395 | ret = Pico_mcd->cdc.STAT.B.B3;\r |
396 | Pico_mcd->cdc.IFSTAT |= 0x20; // decoding interrupt flag cleared\r |
397 | if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r |
398 | {\r |
399 | if ((CDC_Decode_Reg_Read & 0x73F2) == 0x73F2)\r |
400 | Pico_mcd->cdc.STAT.B.B3 = 0x80;\r |
401 | }\r |
402 | return ret;\r |
403 | }\r |
404 | \r |
405 | return 0;\r |
406 | }\r |
407 | \r |
408 | \r |
409 | void CDC_Write_Reg(unsigned char Data)\r |
410 | {\r |
411 | cdprintf("CDC write reg%d = %.2X\n", Pico_mcd->s68k_regs[5] & 0xF, Data);\r |
412 | \r |
413 | switch (Pico_mcd->s68k_regs[5] & 0xF)\r |
414 | {\r |
415 | case 0x0: // SBOUT\r |
416 | Pico_mcd->s68k_regs[5] = 0x1;\r |
417 | Pico_mcd->cdc.SBOUT = Data;\r |
418 | \r |
419 | break;\r |
420 | \r |
421 | case 0x1: // IFCTRL\r |
422 | Pico_mcd->s68k_regs[5] = 0x2;\r |
423 | Pico_mcd->cdc.IFCTRL = Data;\r |
424 | \r |
425 | if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer\r |
426 | {\r |
427 | Pico_mcd->cdc.DBC.N = 0;\r |
428 | Status_CDC &= ~0x08;\r |
429 | Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r |
430 | }\r |
431 | break;\r |
432 | \r |
433 | case 0x2: // DBCL\r |
434 | Pico_mcd->s68k_regs[5] = 0x3;\r |
435 | Pico_mcd->cdc.DBC.B.L = Data;\r |
436 | \r |
437 | break;\r |
438 | \r |
439 | case 0x3: // DBCH\r |
440 | Pico_mcd->s68k_regs[5] = 0x4;\r |
441 | Pico_mcd->cdc.DBC.B.H = Data;\r |
442 | \r |
443 | break;\r |
444 | \r |
445 | case 0x4: // DACL\r |
446 | Pico_mcd->s68k_regs[5] = 0x5;\r |
447 | Pico_mcd->cdc.DAC.B.L = Data;\r |
448 | \r |
449 | break;\r |
450 | \r |
451 | case 0x5: // DACH\r |
452 | Pico_mcd->s68k_regs[5] = 0x6;\r |
453 | Pico_mcd->cdc.DAC.B.H = Data;\r |
454 | \r |
455 | break;\r |
456 | \r |
457 | case 0x6: // DTTRG\r |
458 | if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?\r |
459 | {\r |
460 | Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress\r |
461 | Status_CDC |= 0x08; // Data transfer in progress\r |
462 | Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start\r |
463 | \r |
464 | cdprintf("\n************** Starting Data Transfer ***********\n");\r |
465 | cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r |
466 | Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, Pico_mcd->cdc.DMA_Adr);\r |
467 | }\r |
468 | break;\r |
469 | \r |
470 | case 0x7: // DTACK\r |
471 | Pico_mcd->cdc.IFSTAT |= 0x40; // end data transfer interrupt flag cleared\r |
472 | break;\r |
473 | \r |
474 | case 0x8: // WAL\r |
475 | Pico_mcd->s68k_regs[5] = 0x9;\r |
476 | Pico_mcd->cdc.WA.B.L = Data;\r |
477 | \r |
478 | break;\r |
479 | \r |
480 | case 0x9: // WAH\r |
481 | Pico_mcd->s68k_regs[5] = 0xA;\r |
482 | Pico_mcd->cdc.WA.B.H = Data;\r |
483 | \r |
484 | break;\r |
485 | \r |
486 | case 0xA: // CTRL0\r |
487 | Pico_mcd->s68k_regs[5] = 0xB;\r |
488 | Pico_mcd->cdc.CTRL.B.B0 = Data;\r |
489 | \r |
490 | break;\r |
491 | \r |
492 | case 0xB: // CTRL1\r |
493 | Pico_mcd->s68k_regs[5] = 0xC;\r |
494 | Pico_mcd->cdc.CTRL.B.B1 = Data;\r |
495 | \r |
496 | break;\r |
497 | \r |
498 | case 0xC: // PTL\r |
499 | Pico_mcd->s68k_regs[5] = 0xD;\r |
500 | Pico_mcd->cdc.PT.B.L = Data;\r |
501 | \r |
502 | break;\r |
503 | \r |
504 | case 0xD: // PTH\r |
505 | Pico_mcd->s68k_regs[5] = 0xE;\r |
506 | Pico_mcd->cdc.PT.B.H = Data;\r |
507 | \r |
508 | break;\r |
509 | \r |
510 | case 0xE: // CTRL2\r |
511 | Pico_mcd->cdc.CTRL.B.B2 = Data;\r |
512 | break;\r |
513 | \r |
514 | case 0xF: // RESET\r |
515 | CDC_Reset();\r |
516 | break;\r |
517 | }\r |
518 | }\r |
519 | \r |
520 | \r |
521 | static int bswapwrite(int a, unsigned short d)\r |
522 | {\r |
523 | *(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);\r |
524 | return d + (d >> 8);\r |
525 | }\r |
526 | \r |
527 | void CDD_Export_Status(void)\r |
528 | {\r |
529 | unsigned int csum;\r |
530 | \r |
531 | csum = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r |
532 | csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r |
533 | csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r |
534 | csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r |
535 | Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r |
536 | csum += Pico_mcd->cdd.Ext;\r |
537 | Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r |
538 | \r |
539 | Pico_mcd->s68k_regs[0x36] &= 3; // CDD.Control\r |
540 | \r |
541 | if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r |
542 | {\r |
543 | dprintf("cdd export irq 4");\r |
544 | SekInterruptS68k(4);\r |
545 | }\r |
546 | \r |
547 | cdprintf("CDD exported status\n");\r |
548 | cdprintf("Status =%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r |
549 | (Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r |
550 | (Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r |
551 | (Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r |
552 | (Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],\r |
553 | (Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);\r |
554 | }\r |
555 | \r |
556 | \r |
557 | void CDD_Import_Command(void)\r |
558 | {\r |
559 | cdprintf("CDD importing command\n");\r |
560 | cdprintf("Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r |
561 | (Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r |
562 | (Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r |
563 | (Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r |
564 | (Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],\r |
565 | (Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);\r |
566 | \r |
567 | switch (Pico_mcd->s68k_regs[0x38+10+0])\r |
568 | {\r |
569 | case 0x0: // STATUS (?)\r |
570 | Get_Status_CDD_c0();\r |
571 | break;\r |
572 | \r |
573 | case 0x1: // STOP ALL (?)\r |
574 | Stop_CDD_c1();\r |
575 | break;\r |
576 | \r |
577 | case 0x2: // GET TOC INFORMATIONS\r |
578 | switch(Pico_mcd->s68k_regs[0x38+10+3])\r |
579 | {\r |
580 | case 0x0: // get current position (MSF format)\r |
581 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r |
582 | Get_Pos_CDD_c20();\r |
583 | break;\r |
584 | \r |
585 | case 0x1: // get elapsed time of current track played/scanned (relative MSF format)\r |
586 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;\r |
587 | Get_Track_Pos_CDD_c21();\r |
588 | break;\r |
589 | \r |
590 | case 0x2: // get current track in RS2-RS3\r |
591 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 2;\r |
592 | Get_Current_Track_CDD_c22();\r |
593 | break;\r |
594 | \r |
595 | case 0x3: // get total lenght (MSF format)\r |
596 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;\r |
597 | Get_Total_Lenght_CDD_c23();\r |
598 | break;\r |
599 | \r |
600 | case 0x4: // first & last track number\r |
601 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;\r |
602 | Get_First_Last_Track_CDD_c24();\r |
603 | break;\r |
604 | \r |
605 | case 0x5: // get track addresse (MSF format)\r |
606 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;\r |
607 | Get_Track_Adr_CDD_c25();\r |
608 | break;\r |
609 | \r |
610 | default : // invalid, then we return status\r |
611 | Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;\r |
612 | Get_Status_CDD_c0();\r |
613 | break;\r |
614 | }\r |
615 | break;\r |
616 | \r |
617 | case 0x3: // READ\r |
618 | Play_CDD_c3();\r |
619 | break;\r |
620 | \r |
621 | case 0x4: // SEEK\r |
622 | Seek_CDD_c4();\r |
623 | break;\r |
624 | \r |
625 | case 0x6: // PAUSE/STOP\r |
626 | Pause_CDD_c6();\r |
627 | break;\r |
628 | \r |
629 | case 0x7: // RESUME\r |
630 | Resume_CDD_c7();\r |
631 | break;\r |
632 | \r |
633 | case 0x8: // FAST FOWARD\r |
634 | Fast_Foward_CDD_c8();\r |
635 | break;\r |
636 | \r |
637 | case 0x9: // FAST REWIND\r |
638 | Fast_Rewind_CDD_c9();\r |
639 | break;\r |
640 | \r |
641 | case 0xA: // RECOVER INITIAL STATE (?)\r |
642 | CDD_cA();\r |
643 | break;\r |
644 | \r |
645 | case 0xC: // CLOSE TRAY\r |
646 | Close_Tray_CDD_cC();\r |
647 | break;\r |
648 | \r |
649 | case 0xD: // OPEN TRAY\r |
650 | Open_Tray_CDD_cD();\r |
651 | break;\r |
652 | \r |
653 | default: // UNKNOWN\r |
654 | CDD_Def();\r |
655 | break;\r |
656 | }\r |
657 | }\r |
658 | \r |